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[picodrive.git] / Pico / PicoInt.h
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cc68a136 1// Pico Library - Header File\r
2\r
3// (c) Copyright 2004 Dave, All rights reserved.\r
4// (c) Copyright 2006 notaz, All rights reserved.\r
5// Free for non-commercial use.\r
6\r
7// For commercial use, separate licencing terms must be obtained.\r
8\r
9\r
10#include <stdio.h>\r
11#include <stdlib.h>\r
12#include <string.h>\r
13#include "Pico.h"\r
14\r
15\r
ab0607f7 16// to select core, define EMU_C68K, EMU_M68K or EMU_A68K in your makefile or project\r
cc68a136 17\r
18#ifdef __cplusplus\r
19extern "C" {\r
20#endif\r
21\r
22\r
23// ----------------------- 68000 CPU -----------------------\r
24#ifdef EMU_C68K\r
25#include "../cpu/Cyclone/Cyclone.h"\r
b837b69b 26extern struct Cyclone PicoCpu, PicoCpuS68k;\r
7336a99a 27#define SekCyclesLeftNoMCD PicoCpu.cycles // cycles left for this run\r
28#define SekCyclesLeft \\r
29 (((PicoMCD&1) && (PicoOpt & 0x2000)) ? (SekCycleAim-SekCycleCnt) : SekCyclesLeftNoMCD)\r
30#define SekSetCyclesLeftNoMCD(c) PicoCpu.cycles=c\r
31#define SekSetCyclesLeft(c) { \\r
32 if ((PicoMCD&1) && (PicoOpt & 0x2000)) SekCycleCnt=SekCycleAim-(c); else SekSetCyclesLeftNoMCD(c); \\r
33}\r
cc68a136 34#define SekPc (PicoCpu.pc-PicoCpu.membase)\r
b837b69b 35#define SekPcS68k (PicoCpuS68k.pc-PicoCpuS68k.membase)\r
cc68a136 36#endif\r
37\r
38#ifdef EMU_A68K\r
39void __cdecl M68000_RUN();\r
40// The format of the data in a68k.asm (at the _M68000_regs location)\r
41struct A68KContext\r
42{\r
43 unsigned int d[8],a[8];\r
44 unsigned int isp,srh,ccr,xc,pc,irq,sr;\r
45 int (*IrqCallback) (int nIrq);\r
46 unsigned int ppc;\r
47 void *pResetCallback;\r
48 unsigned int sfc,dfc,usp,vbr;\r
49 unsigned int AsmBank,CpuVersion;\r
50};\r
51struct A68KContext M68000_regs;\r
52extern int m68k_ICount;\r
53#define SekCyclesLeft m68k_ICount\r
54#define SekSetCyclesLeft(c) m68k_ICount=c\r
55#define SekPc M68000_regs.pc\r
56#endif\r
57\r
58#ifdef EMU_M68K\r
59#include "../cpu/musashi/m68kcpu.h"\r
60extern m68ki_cpu_core PicoM68kCPU; // MD's CPU\r
61extern m68ki_cpu_core PicoS68kCPU; // Mega CD's CPU\r
62#ifndef SekCyclesLeft\r
7336a99a 63#define SekCyclesLeftNoMCD m68k_cycles_remaining()\r
64#define SekCyclesLeft \\r
65 (((PicoMCD&1) && (PicoOpt & 0x2000)) ? (SekCycleAim-SekCycleCnt) : SekCyclesLeftNoMCD)\r
66#define SekSetCyclesLeftNoMCD(c) SET_CYCLES(c)\r
67#define SekSetCyclesLeft(c) { \\r
68 if ((PicoMCD&1) && (PicoOpt & 0x2000)) SekCycleCnt=SekCycleAim-(c); else SET_CYCLES(c); \\r
69}\r
cc68a136 70#define SekPc m68k_get_reg(&PicoM68kCPU, M68K_REG_PC)\r
71#define SekPcS68k m68k_get_reg(&PicoS68kCPU, M68K_REG_PC)\r
72#endif\r
73#endif\r
74\r
75extern int SekCycleCnt; // cycles done in this frame\r
76extern int SekCycleAim; // cycle aim\r
77extern unsigned int SekCycleCntT; // total cycle counter, updated once per frame\r
78\r
79#define SekCyclesReset() {SekCycleCntT+=SekCycleCnt;SekCycleCnt=SekCycleAim=0;}\r
80#define SekCyclesBurn(c) SekCycleCnt+=c\r
81#define SekCyclesDone() (SekCycleAim-SekCyclesLeft) // nuber of cycles done in this frame (can be checked anywhere)\r
82#define SekCyclesDoneT() (SekCycleCntT+SekCyclesDone()) // total nuber of cycles done for this rom\r
83\r
84#define SekEndRun(after) { \\r
85 SekCycleCnt -= SekCyclesLeft - after; \\r
86 if(SekCycleCnt < 0) SekCycleCnt = 0; \\r
87 SekSetCyclesLeft(after); \\r
88}\r
89\r
90extern int SekCycleCntS68k;\r
91extern int SekCycleAimS68k;\r
92\r
93#define SekCyclesResetS68k() {SekCycleCntS68k=SekCycleAimS68k=0;}\r
94\r
95// does not work as expected\r
96//extern int z80ExtraCycles; // extra z80 cycles, used when z80 is [en|dis]abled\r
97\r
98extern int PicoMCD;\r
99\r
100// ---------------------------------------------------------\r
101\r
102// main oscillator clock which controls timing\r
103#define OSC_NTSC 53693100\r
104#define OSC_PAL 53203424 // not accurate\r
105\r
106struct PicoVideo\r
107{\r
108 unsigned char reg[0x20];\r
109 unsigned int command; // 32-bit Command\r
110 unsigned char pending; // 1 if waiting for second half of 32-bit command\r
111 unsigned char type; // Command type (v/c/vsram read/write)\r
112 unsigned short addr; // Read/Write address\r
113 int status; // Status bits\r
114 unsigned char pending_ints; // pending interrupts: ??VH????\r
115 unsigned char pad[0x13];\r
116};\r
117\r
118struct PicoMisc\r
119{\r
120 unsigned char rotate;\r
121 unsigned char z80Run;\r
122 unsigned char padTHPhase[2]; // phase of gamepad TH switches\r
123 short scanline; // 0 to 261||311; -1 in fast mode\r
124 char dirtyPal; // Is the palette dirty (1 - change @ this frame, 2 - some time before)\r
125 unsigned char hardware; // Hardware value for country\r
126 unsigned char pal; // 1=PAL 0=NTSC\r
127 unsigned char sram_reg; // SRAM mode register. bit0: allow read? bit1: deny write? bit2: EEPROM?\r
128 unsigned short z80_bank68k;\r
129 unsigned short z80_lastaddr; // this is for Z80 faking\r
130 unsigned char z80_fakeval;\r
131 unsigned char pad0;\r
132 unsigned char padDelay[2]; // gamepad phase time outs, so we count a delay\r
133 unsigned short sram_addr; // EEPROM address register\r
134 unsigned char sram_cycle; // EEPROM SRAM cycle number\r
135 unsigned char sram_slave; // EEPROM slave word for X24C02 and better SRAMs\r
136 unsigned char prot_bytes[2]; // simple protection fakeing\r
4f672280 137 unsigned short dma_bytes; //\r
312e9ce1 138 unsigned char pad[2];\r
139 unsigned int frame_count; // mainly for movies\r
cc68a136 140};\r
141\r
142// some assembly stuff depend on these, do not touch!\r
143struct Pico\r
144{\r
145 unsigned char ram[0x10000]; // 0x00000 scratch ram\r
146 unsigned short vram[0x8000]; // 0x10000\r
147 unsigned char zram[0x2000]; // 0x20000 Z80 ram\r
148 unsigned char ioports[0x10];\r
149 unsigned int pad[0x3c]; // unused\r
150 unsigned short cram[0x40]; // 0x22100\r
151 unsigned short vsram[0x40]; // 0x22180\r
152\r
153 unsigned char *rom; // 0x22200\r
154 unsigned int romsize; // 0x22204\r
155\r
156 struct PicoMisc m;\r
157 struct PicoVideo video;\r
158};\r
159\r
160// sram\r
161struct PicoSRAM\r
162{\r
163 unsigned char *data; // actual data\r
164 unsigned int start; // start address in 68k address space\r
165 unsigned int end;\r
166 unsigned char resize; // 1=SRAM size changed and needs to be reallocated on PicoReset\r
167 unsigned char reg_back; // copy of Pico.m.sram_reg to set after reset\r
168 unsigned char changed;\r
169 unsigned char pad;\r
170};\r
171\r
172// MCD\r
173#include "cd/cd_sys.h"\r
174#include "cd/LC89510.h"\r
d1df8786 175#include "cd/gfx_cd.h"\r
cc68a136 176\r
4f265db7 177struct mcd_pcm\r
178{\r
179 unsigned char control; // reg7\r
180 unsigned char enabled; // reg8\r
181 unsigned char cur_ch;\r
182 unsigned char bank;\r
183 int pad1;\r
184\r
185 struct pcm_chan\r
186 {\r
187 unsigned char regs[8];\r
188 unsigned int addr; // played sample address\r
189 int pad;\r
190 } ch[8];\r
191};\r
192\r
c459aefd 193struct mcd_misc\r
194{\r
195 unsigned short hint_vector;\r
196 unsigned char busreq;\r
51a902ae 197 unsigned char s68k_pend_ints;\r
198 unsigned int state_flags; // emu state: reset_pending,\r
199 unsigned int counter75hz;\r
75736070 200 unsigned short audio_offset; // for savestates: play pointer offset (0-1023)\r
201 unsigned char audio_track; // playing audio track # (zero based)\r
202 char pad1;\r
4f265db7 203 int timer_int3;\r
204 unsigned int timer_stopwatch;\r
205 int pad[10];\r
c459aefd 206};\r
207\r
cc68a136 208typedef struct\r
209{\r
ab0607f7 210 unsigned char bios[0x20000]; // 128K\r
fa1e5e29 211 union { // 512K\r
212 unsigned char prg_ram[0x80000];\r
cc68a136 213 unsigned char prg_ram_b[4][0x20000];\r
214 };\r
fa1e5e29 215 union { // 256K\r
216 struct {\r
217 unsigned char word_ram2M[0x40000];\r
218 unsigned char unused[0x20000];\r
219 };\r
220 struct {\r
221 unsigned char unused[0x20000];\r
222 unsigned char word_ram1M[2][0x20000];\r
223 };\r
224 };\r
225 union { // 64K\r
226 unsigned char pcm_ram[0x10000];\r
4f265db7 227 unsigned char pcm_ram_b[0x10][0x1000];\r
228 };\r
ab0607f7 229 unsigned char bram[0x2000]; // 8K\r
4f265db7 230 unsigned char s68k_regs[0x200]; // GA, not CPU regs\r
231 struct mcd_pcm pcm;\r
75736070 232 _scd_toc TOC; // not to be saved\r
cc68a136 233 CDD cdd;\r
234 CDC cdc;\r
235 _scd scd;\r
d1df8786 236 Rot_Comp rot_comp;\r
c459aefd 237 struct mcd_misc m;\r
cc68a136 238} mcd_state;\r
239\r
240#define Pico_mcd ((mcd_state *)Pico.rom)\r
241\r
51a902ae 242// Area.c\r
243int PicoAreaPackCpu(unsigned char *cpu, int is_sub);\r
244int PicoAreaUnpackCpu(unsigned char *cpu, int is_sub);\r
245\r
246// cd/Area.c\r
247int PicoCdSaveState(void *file);\r
248int PicoCdLoadState(void *file);\r
860c6322 249int PicoCdLoadStateGfx(void *file);\r
cc68a136 250\r
251// Draw.c\r
252int PicoLine(int scan);\r
253void PicoFrameStart();\r
254\r
255// Draw2.c\r
256void PicoFrameFull();\r
257\r
258// Memory.c\r
259int PicoInitPc(unsigned int pc);\r
260unsigned int CPU_CALL PicoRead32(unsigned int a);\r
b837b69b 261void PicoMemSetup();\r
cc68a136 262void PicoMemReset();\r
b837b69b 263//void PicoDasm(int start,int len);\r
cc68a136 264unsigned char z80_read(unsigned short a);\r
265unsigned short z80_read16(unsigned short a);\r
266void z80_write(unsigned char data, unsigned short a);\r
267void z80_write16(unsigned short data, unsigned short a);\r
268\r
269// cd/Memory.c\r
83bd0b76 270void PicoMemSetupCD(void);\r
cc68a136 271unsigned char PicoReadCD8 (unsigned int a);\r
272unsigned short PicoReadCD16(unsigned int a);\r
273unsigned int PicoReadCD32(unsigned int a);\r
274void PicoWriteCD8 (unsigned int a, unsigned char d);\r
275void PicoWriteCD16(unsigned int a, unsigned short d);\r
276void PicoWriteCD32(unsigned int a, unsigned int d);\r
277\r
278// Pico.c\r
279extern struct Pico Pico;\r
280extern struct PicoSRAM SRam;\r
281extern int emustatus;\r
312e9ce1 282int CheckDMA(void);\r
cc68a136 283\r
284// cd/Pico.c\r
285int PicoInitMCD(void);\r
286void PicoExitMCD(void);\r
287int PicoResetMCD(int hard);\r
288\r
289// Sek.c\r
290int SekInit(void);\r
291int SekReset(void);\r
292int SekInterrupt(int irq);\r
293void SekState(unsigned char *data);\r
294\r
295// cd/Sek.c\r
296int SekInitS68k(void);\r
297int SekResetS68k(void);\r
298int SekInterruptS68k(int irq);\r
299\r
7a93adeb 300// sound/sound.c\r
301extern int PsndLen_exc_cnt;\r
302extern int PsndLen_exc_add;\r
303\r
cc68a136 304// VideoPort.c\r
305void PicoVideoWrite(unsigned int a,unsigned short d);\r
306unsigned int PicoVideoRead(unsigned int a);\r
307\r
308// Misc.c\r
309void SRAMWriteEEPROM(unsigned int d);\r
310unsigned int SRAMReadEEPROM();\r
311void SRAMUpdPending(unsigned int a, unsigned int d);\r
cea65903 312void memcpy16(unsigned short *dest, unsigned short *src, int count);\r
0a051f55 313void memcpy16bswap(unsigned short *dest, void *src, int count);\r
cea65903 314void memcpy32(int *dest, int *src, int count);\r
315void memset32(int *dest, int c, int count);\r
cc68a136 316\r
fa1e5e29 317// cd/Misc.c\r
318void wram_2M_to_1M(unsigned char *m);\r
319void wram_1M_to_2M(unsigned char *m);\r
320\r
cc68a136 321\r
322#ifdef __cplusplus\r
323} // End of extern "C"\r
324#endif\r
fast MegaDrive/MegaCD/32X emulator