UI adjustments, nub support
[picodrive.git] / Pico / Sek.c
CommitLineData
cc68a136 1// This is part of Pico Library\r
2\r
3// (c) Copyright 2004 Dave, All rights reserved.\r
4// (c) Copyright 2006 notaz, All rights reserved.\r
5// Free for non-commercial use.\r
6\r
7// For commercial use, separate licencing terms must be obtained.\r
8\r
9\r
10#include "PicoInt.h"\r
11\r
12\r
13int SekCycleCnt=0; // cycles done in this frame\r
14int SekCycleAim=0; // cycle aim\r
15unsigned int SekCycleCntT=0;\r
16\r
70357ce5 17\r
18/* context */\r
19// Cyclone 68000\r
cc68a136 20#ifdef EMU_C68K\r
3aa1e148 21struct Cyclone PicoCpuCM68k;\r
cc68a136 22#endif\r
70357ce5 23// MUSASHI 68000\r
cc68a136 24#ifdef EMU_M68K\r
3aa1e148 25m68ki_cpu_core PicoCpuMM68k;\r
cc68a136 26#endif\r
70357ce5 27// FAME 68000\r
28#ifdef EMU_F68K\r
3aa1e148 29M68K_CONTEXT PicoCpuFM68k;\r
cc68a136 30#endif\r
31\r
32\r
70357ce5 33/* callbacks */\r
cc68a136 34#ifdef EMU_C68K\r
b837b69b 35// interrupt acknowledgment\r
0af33fe0 36static int SekIntAck(int level)\r
cc68a136 37{\r
38 // try to emulate VDP's reaction to 68000 int ack\r
69996cb7 39 if (level == 4) { Pico.video.pending_ints = 0; elprintf(EL_INTS, "hack: @ %06x [%i]", SekPc, SekCycleCnt); }\r
40 else if(level == 6) { Pico.video.pending_ints &= ~0x20; elprintf(EL_INTS, "vack: @ %06x [%i]", SekPc, SekCycleCnt); }\r
3aa1e148 41 PicoCpuCM68k.irq = 0;\r
0af33fe0 42 return CYCLONE_INT_ACK_AUTOVECTOR;\r
cc68a136 43}\r
44\r
69996cb7 45static void SekResetAck(void)\r
cc68a136 46{\r
69996cb7 47 elprintf(EL_ANOMALY, "Reset encountered @ %06x", SekPc);\r
cc68a136 48}\r
49\r
50static int SekUnrecognizedOpcode()\r
51{\r
52 unsigned int pc, op;\r
53 pc = SekPc;\r
3aa1e148 54 op = PicoCpuCM68k.read16(pc);\r
69996cb7 55 elprintf(EL_ANOMALY, "Unrecognized Opcode %04x @ %06x", op, pc);\r
cc68a136 56 // see if we are not executing trash\r
57 if (pc < 0x200 || (pc > Pico.romsize+4 && (pc&0xe00000)!=0xe00000)) {\r
3aa1e148 58 PicoCpuCM68k.cycles = 0;\r
59 PicoCpuCM68k.state_flags |= 1;\r
cc68a136 60 return 1;\r
61 }\r
2d0b15bb 62#ifdef EMU_M68K // debugging cyclone\r
63 {\r
64 extern int have_illegal;\r
65 have_illegal = 1;\r
66 }\r
67#endif\r
cc68a136 68 return 0;\r
69}\r
70#endif\r
71\r
72\r
73#ifdef EMU_M68K\r
74static int SekIntAckM68K(int level)\r
75{\r
69996cb7 76 if (level == 4) { Pico.video.pending_ints = 0; elprintf(EL_INTS, "hack: @ %06x [%i]", SekPc, SekCycleCnt); }\r
77 else if(level == 6) { Pico.video.pending_ints &= ~0x20; elprintf(EL_INTS, "vack: @ %06x [%i]", SekPc, SekCycleCnt); }\r
cc68a136 78 CPU_INT_LEVEL = 0;\r
79 return M68K_INT_ACK_AUTOVECTOR;\r
80}\r
0af33fe0 81\r
82static int SekTasCallback(void)\r
83{\r
84 return 0; // no writeback\r
85}\r
cc68a136 86#endif\r
87\r
88\r
70357ce5 89#ifdef EMU_F68K\r
3aa1e148 90static void SekIntAckF68K(unsigned level)\r
70357ce5 91{\r
92 if (level == 4) { Pico.video.pending_ints = 0; elprintf(EL_INTS, "hack: @ %06x [%i]", SekPc, SekCycleCnt); }\r
93 else if(level == 6) { Pico.video.pending_ints &= ~0x20; elprintf(EL_INTS, "vack: @ %06x [%i]", SekPc, SekCycleCnt); }\r
3aa1e148 94 PicoCpuFM68k.interrupts[0] = 0;\r
70357ce5 95}\r
96#endif\r
97\r
cc68a136 98\r
eff55556 99PICO_INTERNAL int SekInit()\r
cc68a136 100{\r
101#ifdef EMU_C68K\r
102 CycloneInit();\r
3aa1e148 103 memset(&PicoCpuCM68k,0,sizeof(PicoCpuCM68k));\r
104 PicoCpuCM68k.IrqCallback=SekIntAck;\r
105 PicoCpuCM68k.ResetCallback=SekResetAck;\r
106 PicoCpuCM68k.UnrecognizedCallback=SekUnrecognizedOpcode;\r
03e4f2a3 107 PicoCpuCM68k.flags=4; // Z set\r
cc68a136 108#endif\r
cc68a136 109#ifdef EMU_M68K\r
110 {\r
111 void *oldcontext = m68ki_cpu_p;\r
3aa1e148 112 m68k_set_context(&PicoCpuMM68k);\r
cc68a136 113 m68k_set_cpu_type(M68K_CPU_TYPE_68000);\r
114 m68k_init();\r
115 m68k_set_int_ack_callback(SekIntAckM68K);\r
0af33fe0 116 m68k_set_tas_instr_callback(SekTasCallback);\r
cc68a136 117 m68k_pulse_reset(); // Init cpu emulator\r
118 m68k_set_context(oldcontext);\r
119 }\r
120#endif\r
70357ce5 121#ifdef EMU_F68K\r
122 {\r
123 void *oldcontext = g_m68kcontext;\r
3aa1e148 124 g_m68kcontext = &PicoCpuFM68k;\r
125 memset(&PicoCpuFM68k, 0, sizeof(PicoCpuFM68k));\r
03e4f2a3 126 fm68k_init();\r
3aa1e148 127 PicoCpuFM68k.iack_handler = SekIntAckF68K;\r
70357ce5 128 g_m68kcontext = oldcontext;\r
129 }\r
130#endif\r
cc68a136 131\r
132 return 0;\r
133}\r
134\r
70357ce5 135\r
cc68a136 136// Reset the 68000:\r
eff55556 137PICO_INTERNAL int SekReset()\r
cc68a136 138{\r
139 if (Pico.rom==NULL) return 1;\r
140\r
141#ifdef EMU_C68K\r
3aa1e148 142 PicoCpuCM68k.state_flags=0;\r
143 PicoCpuCM68k.osp=0;\r
144 PicoCpuCM68k.srh =0x27; // Supervisor mode\r
3aa1e148 145 PicoCpuCM68k.irq=0;\r
146 PicoCpuCM68k.a[7]=PicoCpuCM68k.read32(0); // Stack Pointer\r
147 PicoCpuCM68k.membase=0;\r
148 PicoCpuCM68k.pc=PicoCpuCM68k.checkpc(PicoCpuCM68k.read32(4)); // Program Counter\r
cc68a136 149#endif\r
cc68a136 150#ifdef EMU_M68K\r
3aa1e148 151 m68k_set_context(&PicoCpuMM68k); // if we ever reset m68k, we always need it's context to be set\r
2d0b15bb 152 m68ki_cpu.sp[0]=0;\r
153 m68k_set_irq(0);\r
b837b69b 154 m68k_pulse_reset();\r
cc68a136 155#endif\r
70357ce5 156#ifdef EMU_F68K\r
157 {\r
3aa1e148 158 g_m68kcontext = &PicoCpuFM68k;\r
03e4f2a3 159 fm68k_reset();\r
70357ce5 160 }\r
161#endif\r
cc68a136 162\r
163 return 0;\r
164}\r
165\r
166\r
eff55556 167PICO_INTERNAL int SekInterrupt(int irq)\r
cc68a136 168{\r
03e4f2a3 169#ifdef EMU_CORE_DEBUG\r
0af33fe0 170 {\r
171 extern unsigned int dbg_irq_level;\r
172 dbg_irq_level=irq;\r
173 return 0;\r
174 }\r
175#endif\r
cc68a136 176#ifdef EMU_C68K\r
3aa1e148 177 PicoCpuCM68k.irq=irq;\r
cc68a136 178#endif\r
cc68a136 179#ifdef EMU_M68K\r
180 {\r
181 void *oldcontext = m68ki_cpu_p;\r
3aa1e148 182 m68k_set_context(&PicoCpuMM68k);\r
cc68a136 183 m68k_set_irq(irq); // raise irq (gets lowered after taken or must be done in ack)\r
184 m68k_set_context(oldcontext);\r
185 }\r
186#endif\r
70357ce5 187#ifdef EMU_F68K\r
3aa1e148 188 PicoCpuFM68k.interrupts[0]=irq;\r
70357ce5 189#endif\r
190\r
cc68a136 191 return 0;\r
192}\r
193\r
3aa1e148 194// data must be word aligned\r
195PICO_INTERNAL void SekState(int *data)\r
cc68a136 196{\r
197#ifdef EMU_C68K\r
03e4f2a3 198 memcpy32(data,(int *)PicoCpuCM68k.d,0x44/4);\r
cc68a136 199#elif defined(EMU_M68K)\r
03e4f2a3 200 memcpy32(data, (int *)PicoCpuMM68k.dar, 0x40/4);\r
3aa1e148 201 data[0x10] = PicoCpuMM68k.pc;\r
70357ce5 202#elif defined(EMU_F68K)\r
3aa1e148 203 memcpy32(data, (int *)PicoCpuFM68k.dreg, 0x40/4);\r
204 data[0x10] = PicoCpuFM68k.pc;\r
cc68a136 205#endif\r
206}\r
2433f409 207\r
eff55556 208PICO_INTERNAL void SekSetRealTAS(int use_real)\r
2433f409 209{\r
210#ifdef EMU_C68K\r
211 CycloneSetRealTAS(use_real);\r
212#endif\r
70357ce5 213#ifdef EMU_F68K\r
214 // TODO\r
215#endif\r
2433f409 216}\r
217\r