cff531af |
1 | /*\r |
2 | * Memory I/O handlers for Sega/Mega CD.\r |
3 | * (C) notaz, 2007-2009\r |
4 | *\r |
5 | * This work is licensed under the terms of MAME license.\r |
6 | * See COPYING file in the top-level directory.\r |
7 | */\r |
cc68a136 |
8 | \r |
efcba75f |
9 | #include "../pico_int.h"\r |
af37bca8 |
10 | #include "../memory.h"\r |
cc68a136 |
11 | \r |
cb4a513a |
12 | #include "gfx_cd.h"\r |
4f265db7 |
13 | #include "pcm.h"\r |
cb4a513a |
14 | \r |
bcf65fd6 |
15 | uptr s68k_read8_map [0x1000000 >> M68K_MEM_SHIFT];\r |
16 | uptr s68k_read16_map [0x1000000 >> M68K_MEM_SHIFT];\r |
17 | uptr s68k_write8_map [0x1000000 >> M68K_MEM_SHIFT];\r |
18 | uptr s68k_write16_map[0x1000000 >> M68K_MEM_SHIFT];\r |
cc68a136 |
19 | \r |
af37bca8 |
20 | MAKE_68K_READ8(s68k_read8, s68k_read8_map)\r |
21 | MAKE_68K_READ16(s68k_read16, s68k_read16_map)\r |
22 | MAKE_68K_READ32(s68k_read32, s68k_read16_map)\r |
23 | MAKE_68K_WRITE8(s68k_write8, s68k_write8_map)\r |
24 | MAKE_68K_WRITE16(s68k_write16, s68k_write16_map)\r |
25 | MAKE_68K_WRITE32(s68k_write32, s68k_write16_map)\r |
b5e5172d |
26 | \r |
cc68a136 |
27 | // -----------------------------------------------------------------\r |
28 | \r |
0ace9b9a |
29 | // provided by ASM code:\r |
30 | #ifdef _ASM_CD_MEMORY_C\r |
31 | u32 PicoReadM68k8_io(u32 a);\r |
32 | u32 PicoReadM68k16_io(u32 a);\r |
33 | void PicoWriteM68k8_io(u32 a, u32 d);\r |
34 | void PicoWriteM68k16_io(u32 a, u32 d);\r |
35 | \r |
36 | u32 PicoReadS68k8_pr(u32 a);\r |
37 | u32 PicoReadS68k16_pr(u32 a);\r |
38 | void PicoWriteS68k8_pr(u32 a, u32 d);\r |
39 | void PicoWriteS68k16_pr(u32 a, u32 d);\r |
40 | \r |
41 | u32 PicoReadM68k8_cell0(u32 a);\r |
42 | u32 PicoReadM68k8_cell1(u32 a);\r |
43 | u32 PicoReadM68k16_cell0(u32 a);\r |
44 | u32 PicoReadM68k16_cell1(u32 a);\r |
45 | void PicoWriteM68k8_cell0(u32 a, u32 d);\r |
46 | void PicoWriteM68k8_cell1(u32 a, u32 d);\r |
47 | void PicoWriteM68k16_cell0(u32 a, u32 d);\r |
48 | void PicoWriteM68k16_cell1(u32 a, u32 d);\r |
49 | \r |
50 | u32 PicoReadS68k8_dec0(u32 a);\r |
51 | u32 PicoReadS68k8_dec1(u32 a);\r |
52 | u32 PicoReadS68k16_dec0(u32 a);\r |
53 | u32 PicoReadS68k16_dec1(u32 a);\r |
54 | void PicoWriteS68k8_dec_m0b0(u32 a, u32 d);\r |
55 | void PicoWriteS68k8_dec_m1b0(u32 a, u32 d);\r |
56 | void PicoWriteS68k8_dec_m2b0(u32 a, u32 d);\r |
57 | void PicoWriteS68k8_dec_m0b1(u32 a, u32 d);\r |
58 | void PicoWriteS68k8_dec_m1b1(u32 a, u32 d);\r |
59 | void PicoWriteS68k8_dec_m2b1(u32 a, u32 d);\r |
60 | void PicoWriteS68k16_dec_m0b0(u32 a, u32 d);\r |
61 | void PicoWriteS68k16_dec_m1b0(u32 a, u32 d);\r |
62 | void PicoWriteS68k16_dec_m2b0(u32 a, u32 d);\r |
63 | void PicoWriteS68k16_dec_m0b1(u32 a, u32 d);\r |
64 | void PicoWriteS68k16_dec_m1b1(u32 a, u32 d);\r |
65 | void PicoWriteS68k16_dec_m2b1(u32 a, u32 d);\r |
66 | #endif\r |
67 | \r |
68 | static void remap_prg_window(void);\r |
69 | static void remap_word_ram(int r3);\r |
70 | \r |
7a1f6e45 |
71 | // poller detection\r |
7a1f6e45 |
72 | #define POLL_LIMIT 16\r |
73 | #define POLL_CYCLES 124\r |
7a1f6e45 |
74 | unsigned int s68k_poll_adclk, s68k_poll_cnt;\r |
cc68a136 |
75 | \r |
bc3c13d3 |
76 | void m68k_comm_check(u32 a)\r |
77 | {\r |
78 | pcd_sync_s68k(SekCyclesDone());\r |
79 | /*if (Pico_mcd->m.m68k_comm_dirty & (1 << a/2)) {\r |
80 | Pico_mcd->m.m68k_comm_dirty &= ~(1 << a/2);\r |
81 | Pico_mcd->m.m68k_poll_a = Pico_mcd->m.m68k_poll_cnt = 0;\r |
82 | return;\r |
83 | }\r |
84 | if (a != Pico_mcd->m.m68k_poll_a) {\r |
85 | Pico_mcd->m.m68k_poll_a = a;\r |
86 | Pico_mcd->m.m68k_poll_cnt = 0;\r |
87 | return;\r |
88 | }\r |
89 | if (++Pico_mcd->m.m68k_poll_cnt > 5)\r |
90 | SekCyclesBurnRun(122);\r |
91 | \r |
92 | elprintf(EL_CDPOLL, "m68k poll [%02x] %d %u", a,\r |
93 | Pico_mcd->m.m68k_poll_cnt, SekCyclesDone());*/\r |
94 | }\r |
95 | \r |
4ff2d527 |
96 | #ifndef _ASM_CD_MEMORY_C\r |
cb4a513a |
97 | static u32 m68k_reg_read16(u32 a)\r |
cc68a136 |
98 | {\r |
99 | u32 d=0;\r |
100 | a &= 0x3e;\r |
cc68a136 |
101 | \r |
102 | switch (a) {\r |
672ad671 |
103 | case 0:\r |
c459aefd |
104 | d = ((Pico_mcd->s68k_regs[0x33]<<13)&0x8000) | Pico_mcd->m.busreq; // here IFL2 is always 0, just like in Gens\r |
672ad671 |
105 | goto end;\r |
cc68a136 |
106 | case 2:\r |
bc3c13d3 |
107 | m68k_comm_check(a);\r |
672ad671 |
108 | d = (Pico_mcd->s68k_regs[a]<<8) | (Pico_mcd->s68k_regs[a+1]&0xc7);\r |
af37bca8 |
109 | elprintf(EL_CDREG3, "m68k_regs r3: %02x @%06x", (u8)d, SekPc);\r |
cc68a136 |
110 | goto end;\r |
c459aefd |
111 | case 4:\r |
112 | d = Pico_mcd->s68k_regs[4]<<8;\r |
113 | goto end;\r |
114 | case 6:\r |
913ef4b7 |
115 | d = *(u16 *)(Pico_mcd->bios + 0x72);\r |
c459aefd |
116 | goto end;\r |
cc68a136 |
117 | case 8:\r |
cc68a136 |
118 | d = Read_CDC_Host(0);\r |
119 | goto end;\r |
c459aefd |
120 | case 0xA:\r |
ca61ee42 |
121 | elprintf(EL_UIO, "m68k FIXME: reserved read");\r |
c459aefd |
122 | goto end;\r |
ae214f1c |
123 | case 0xC: // 384 cycle stopwatch timer\r |
124 | // ugh..\r |
125 | d = pcd_cycles_m68k_to_s68k(SekCyclesDone());\r |
126 | d = (d - Pico_mcd->m.stopwatch_base_c) / 384;\r |
127 | d &= 0x0fff;\r |
af37bca8 |
128 | elprintf(EL_CDREGS, "m68k stopwatch timer read (%04x)", d);\r |
1cd356a3 |
129 | goto end;\r |
cc68a136 |
130 | }\r |
131 | \r |
cc68a136 |
132 | if (a < 0x30) {\r |
133 | // comm flag/cmd/status (0xE-0x2F)\r |
bc3c13d3 |
134 | m68k_comm_check(a);\r |
cc68a136 |
135 | d = (Pico_mcd->s68k_regs[a]<<8) | Pico_mcd->s68k_regs[a+1];\r |
136 | goto end;\r |
137 | }\r |
138 | \r |
ca61ee42 |
139 | elprintf(EL_UIO, "m68k_regs FIXME invalid read @ %02x", a);\r |
cc68a136 |
140 | \r |
141 | end:\r |
142 | \r |
cc68a136 |
143 | return d;\r |
144 | }\r |
4ff2d527 |
145 | #endif\r |
cc68a136 |
146 | \r |
4ff2d527 |
147 | #ifndef _ASM_CD_MEMORY_C\r |
148 | static\r |
149 | #endif\r |
150 | void m68k_reg_write8(u32 a, u32 d)\r |
cc68a136 |
151 | {\r |
af37bca8 |
152 | u32 dold;\r |
cc68a136 |
153 | a &= 0x3f;\r |
cc68a136 |
154 | \r |
bc3c13d3 |
155 | Pico_mcd->m.m68k_poll_a = 0;\r |
156 | \r |
cc68a136 |
157 | switch (a) {\r |
158 | case 0:\r |
672ad671 |
159 | d &= 1;\r |
ca61ee42 |
160 | if ((d&1) && (Pico_mcd->s68k_regs[0x33]&(1<<2))) { elprintf(EL_INTS, "m68k: s68k irq 2"); SekInterruptS68k(2); }\r |
c459aefd |
161 | return;\r |
cc68a136 |
162 | case 1:\r |
672ad671 |
163 | d &= 3;\r |
bc3c13d3 |
164 | elprintf(EL_CDREGS, "d m.busreq %u %u", d, Pico_mcd->m.busreq);\r |
165 | if (d == Pico_mcd->m.busreq)\r |
166 | return;\r |
167 | pcd_sync_s68k(SekCyclesDone());\r |
168 | \r |
169 | if ((Pico_mcd->m.busreq ^ d) & 1) {\r |
170 | elprintf(EL_INTSW, "m68k: s68k reset %i", !(d&1));\r |
171 | if (!(d & 1))\r |
172 | d |= 2; // verified: reset also gives bus\r |
173 | else {\r |
174 | elprintf(EL_CDREGS, "m68k: resetting s68k");\r |
175 | SekResetS68k();\r |
176 | }\r |
cc68a136 |
177 | }\r |
bc3c13d3 |
178 | if ((Pico_mcd->m.busreq ^ d) & 2) {\r |
179 | elprintf(EL_INTSW, "m68k: s68k brq %i", d >> 1);\r |
0ace9b9a |
180 | remap_prg_window();\r |
bc3c13d3 |
181 | }\r |
c459aefd |
182 | Pico_mcd->m.busreq = d;\r |
183 | return;\r |
672ad671 |
184 | case 2:\r |
af37bca8 |
185 | elprintf(EL_CDREGS, "m68k: prg wp=%02x", d);\r |
672ad671 |
186 | Pico_mcd->s68k_regs[2] = d; // really use s68k side register\r |
187 | return;\r |
af37bca8 |
188 | case 3:\r |
189 | dold = Pico_mcd->s68k_regs[3];\r |
190 | elprintf(EL_CDREG3, "m68k_regs w3: %02x @%06x", (u8)d, SekPc);\r |
672ad671 |
191 | //if ((Pico_mcd->s68k_regs[3]&4) != (d&4)) dprintf("m68k: ram mode %i mbit", (d&4) ? 1 : 2);\r |
192 | //if ((Pico_mcd->s68k_regs[3]&2) != (d&2)) dprintf("m68k: %s", (d&4) ? ((d&2) ? "word swap req" : "noop?") :\r |
193 | // ((d&2) ? "word ram to s68k" : "word ram to m68k"));\r |
ef090115 |
194 | if (dold & 4) { // 1M mode\r |
195 | d ^= 2; // writing 0 to DMNA actually sets it, 1 does nothing\r |
66fdc0f0 |
196 | } else {\r |
ef090115 |
197 | if ((d ^ dold) & d & 2) { // DMNA is being set\r |
198 | dold &= ~1; // return word RAM to s68k\r |
199 | /* Silpheed hack: bset(w3), r3, btst, bne, r3 */\r |
200 | SekEndRun(20+16+10+12+16);\r |
201 | }\r |
66fdc0f0 |
202 | }\r |
af37bca8 |
203 | Pico_mcd->s68k_regs[3] = (d & 0xc2) | (dold & 0x1f);\r |
204 | if ((d ^ dold) & 0xc0) {\r |
205 | elprintf(EL_CDREGS, "m68k: prg bank: %i -> %i", (Pico_mcd->s68k_regs[a]>>6), ((d>>6)&3));\r |
0ace9b9a |
206 | remap_prg_window();\r |
af37bca8 |
207 | }\r |
7a1f6e45 |
208 | #ifdef USE_POLL_DETECT\r |
209 | if ((s68k_poll_adclk&0xfe) == 2 && s68k_poll_cnt > POLL_LIMIT) {\r |
210 | SekSetStopS68k(0); s68k_poll_adclk = 0;\r |
8f8fe01e |
211 | elprintf(EL_CDPOLL, "s68k poll release, a=%02x", a);\r |
7a1f6e45 |
212 | }\r |
213 | #endif\r |
672ad671 |
214 | return;\r |
c459aefd |
215 | case 6:\r |
d1df8786 |
216 | Pico_mcd->bios[0x72 + 1] = d; // simple hint vector changer\r |
c459aefd |
217 | return;\r |
218 | case 7:\r |
d1df8786 |
219 | Pico_mcd->bios[0x72] = d;\r |
af37bca8 |
220 | elprintf(EL_CDREGS, "hint vector set to %04x%04x",\r |
221 | ((u16 *)Pico_mcd->bios)[0x70/2], ((u16 *)Pico_mcd->bios)[0x72/2]);\r |
c459aefd |
222 | return;\r |
7a1f6e45 |
223 | case 0xf:\r |
224 | d = (d << 1) | ((d >> 7) & 1); // rol8 1 (special case)\r |
cc68a136 |
225 | case 0xe:\r |
bc3c13d3 |
226 | if (d != Pico_mcd->s68k_regs[0xe]) {\r |
227 | pcd_sync_s68k(SekCyclesDone());\r |
228 | Pico_mcd->s68k_regs[0xe] = d;\r |
229 | }\r |
7a1f6e45 |
230 | #ifdef USE_POLL_DETECT\r |
231 | if ((s68k_poll_adclk&0xfe) == 0xe && s68k_poll_cnt > POLL_LIMIT) {\r |
232 | SekSetStopS68k(0); s68k_poll_adclk = 0;\r |
8f8fe01e |
233 | elprintf(EL_CDPOLL, "s68k poll release, a=%02x", a);\r |
7a1f6e45 |
234 | }\r |
235 | #endif\r |
c459aefd |
236 | return;\r |
672ad671 |
237 | }\r |
238 | \r |
239 | if ((a&0xf0) == 0x10) {\r |
cc68a136 |
240 | Pico_mcd->s68k_regs[a] = d;\r |
7a1f6e45 |
241 | #ifdef USE_POLL_DETECT\r |
242 | if ((a&0xfe) == (s68k_poll_adclk&0xfe) && s68k_poll_cnt > POLL_LIMIT) {\r |
243 | SekSetStopS68k(0); s68k_poll_adclk = 0;\r |
8f8fe01e |
244 | elprintf(EL_CDPOLL, "s68k poll release, a=%02x", a);\r |
7a1f6e45 |
245 | }\r |
246 | #endif\r |
672ad671 |
247 | return;\r |
cc68a136 |
248 | }\r |
249 | \r |
ca61ee42 |
250 | elprintf(EL_UIO, "m68k FIXME: invalid write? [%02x] %02x", a, d);\r |
cc68a136 |
251 | }\r |
252 | \r |
2433f409 |
253 | #ifndef _ASM_CD_MEMORY_C\r |
254 | static\r |
255 | #endif\r |
256 | u32 s68k_poll_detect(u32 a, u32 d)\r |
257 | {\r |
258 | #ifdef USE_POLL_DETECT\r |
ca61ee42 |
259 | // needed mostly for Cyclone, which doesn't always check it's cycle counter\r |
260 | if (SekIsStoppedS68k()) return d;\r |
2433f409 |
261 | // polling detection\r |
262 | if (a == (s68k_poll_adclk&0xff)) {\r |
263 | unsigned int clkdiff = SekCyclesDoneS68k() - (s68k_poll_adclk>>8);\r |
264 | if (clkdiff <= POLL_CYCLES) {\r |
265 | s68k_poll_cnt++;\r |
266 | //printf("-- diff: %u, cnt = %i\n", clkdiff, s68k_poll_cnt);\r |
267 | if (s68k_poll_cnt > POLL_LIMIT) {\r |
268 | SekSetStopS68k(1);\r |
8f8fe01e |
269 | elprintf(EL_CDPOLL, "s68k poll detected @ %06x, a=%02x", SekPcS68k, a);\r |
2433f409 |
270 | }\r |
271 | s68k_poll_adclk = (SekCyclesDoneS68k() << 8) | a;\r |
272 | return d;\r |
273 | }\r |
274 | }\r |
275 | s68k_poll_adclk = (SekCyclesDoneS68k() << 8) | a;\r |
276 | s68k_poll_cnt = 0;\r |
277 | #endif\r |
278 | return d;\r |
279 | }\r |
cc68a136 |
280 | \r |
913ef4b7 |
281 | #define READ_FONT_DATA(basemask) \\r |
282 | { \\r |
283 | unsigned int fnt = *(unsigned int *)(Pico_mcd->s68k_regs + 0x4c); \\r |
284 | unsigned int col0 = (fnt >> 8) & 0x0f, col1 = (fnt >> 12) & 0x0f; \\r |
285 | if (fnt & (basemask << 0)) d = col1 ; else d = col0; \\r |
286 | if (fnt & (basemask << 1)) d |= col1 << 4; else d |= col0 << 4; \\r |
287 | if (fnt & (basemask << 2)) d |= col1 << 8; else d |= col0 << 8; \\r |
288 | if (fnt & (basemask << 3)) d |= col1 << 12; else d |= col0 << 12; \\r |
289 | }\r |
290 | \r |
cc68a136 |
291 | \r |
4ff2d527 |
292 | #ifndef _ASM_CD_MEMORY_C\r |
293 | static\r |
294 | #endif\r |
295 | u32 s68k_reg_read16(u32 a)\r |
cc68a136 |
296 | {\r |
297 | u32 d=0;\r |
cc68a136 |
298 | \r |
cc68a136 |
299 | switch (a) {\r |
300 | case 0:\r |
7a1f6e45 |
301 | return ((Pico_mcd->s68k_regs[0]&3)<<8) | 1; // ver = 0, not in reset state\r |
672ad671 |
302 | case 2:\r |
2433f409 |
303 | d = (Pico_mcd->s68k_regs[2]<<8) | (Pico_mcd->s68k_regs[3]&0x1f);\r |
af37bca8 |
304 | elprintf(EL_CDREG3, "s68k_regs r3: %02x @%06x", (u8)d, SekPcS68k);\r |
2433f409 |
305 | return s68k_poll_detect(a, d);\r |
cc68a136 |
306 | case 6:\r |
7a1f6e45 |
307 | return CDC_Read_Reg();\r |
cc68a136 |
308 | case 8:\r |
7a1f6e45 |
309 | return Read_CDC_Host(1); // Gens returns 0 here on byte reads\r |
cc68a136 |
310 | case 0xC:\r |
ae214f1c |
311 | d = SekCyclesDoneS68k() - Pico_mcd->m.stopwatch_base_c;\r |
312 | d /= 384;\r |
313 | d &= 0x0fff;\r |
af37bca8 |
314 | elprintf(EL_CDREGS, "s68k stopwatch timer read (%04x)", d);\r |
7a1f6e45 |
315 | return d;\r |
d1df8786 |
316 | case 0x30:\r |
af37bca8 |
317 | elprintf(EL_CDREGS, "s68k int3 timer read (%02x)", Pico_mcd->s68k_regs[31]);\r |
7a1f6e45 |
318 | return Pico_mcd->s68k_regs[31];\r |
cc68a136 |
319 | case 0x34: // fader\r |
7a1f6e45 |
320 | return 0; // no busy bit\r |
913ef4b7 |
321 | case 0x50: // font data (check: Lunar 2, Silpheed)\r |
322 | READ_FONT_DATA(0x00100000);\r |
7a1f6e45 |
323 | return d;\r |
913ef4b7 |
324 | case 0x52:\r |
325 | READ_FONT_DATA(0x00010000);\r |
7a1f6e45 |
326 | return d;\r |
913ef4b7 |
327 | case 0x54:\r |
328 | READ_FONT_DATA(0x10000000);\r |
7a1f6e45 |
329 | return d;\r |
913ef4b7 |
330 | case 0x56:\r |
331 | READ_FONT_DATA(0x01000000);\r |
7a1f6e45 |
332 | return d;\r |
cc68a136 |
333 | }\r |
334 | \r |
335 | d = (Pico_mcd->s68k_regs[a]<<8) | Pico_mcd->s68k_regs[a+1];\r |
336 | \r |
2433f409 |
337 | if (a >= 0x0e && a < 0x30)\r |
338 | return s68k_poll_detect(a, d);\r |
7a1f6e45 |
339 | \r |
cc68a136 |
340 | return d;\r |
341 | }\r |
342 | \r |
4ff2d527 |
343 | #ifndef _ASM_CD_MEMORY_C\r |
344 | static\r |
345 | #endif\r |
346 | void s68k_reg_write8(u32 a, u32 d)\r |
cc68a136 |
347 | {\r |
48e8482f |
348 | // Warning: d might have upper bits set\r |
cc68a136 |
349 | switch (a) {\r |
672ad671 |
350 | case 2:\r |
351 | return; // only m68k can change WP\r |
fa1e5e29 |
352 | case 3: {\r |
353 | int dold = Pico_mcd->s68k_regs[3];\r |
af37bca8 |
354 | elprintf(EL_CDREG3, "s68k_regs w3: %02x @%06x", (u8)d, SekPcS68k);\r |
672ad671 |
355 | d &= 0x1d;\r |
af37bca8 |
356 | d |= dold & 0xc2;\r |
357 | if (d & 4)\r |
39230401 |
358 | {\r |
0ace9b9a |
359 | if ((d ^ dold) & 0x1d) {\r |
4ff2d527 |
360 | d &= ~2; // in case of mode or bank change we clear DMNA (m68k req) bit\r |
0ace9b9a |
361 | remap_word_ram(d);\r |
4ff2d527 |
362 | }\r |
fa1e5e29 |
363 | if (!(dold & 4)) {\r |
af37bca8 |
364 | elprintf(EL_CDREG3, "wram mode 2M->1M");\r |
fa1e5e29 |
365 | wram_2M_to_1M(Pico_mcd->word_ram2M);\r |
4ff2d527 |
366 | }\r |
39230401 |
367 | }\r |
368 | else\r |
369 | {\r |
fa1e5e29 |
370 | if (dold & 4) {\r |
af37bca8 |
371 | elprintf(EL_CDREG3, "wram mode 1M->2M");\r |
4ff2d527 |
372 | if (!(d&1)) { // it didn't set the ret bit, which means it doesn't want to give WRAM to m68k\r |
373 | d &= ~3;\r |
374 | d |= (dold&1) ? 2 : 1; // then give it to the one which had bank0 in 1M mode\r |
375 | }\r |
fa1e5e29 |
376 | wram_1M_to_2M(Pico_mcd->word_ram2M);\r |
0ace9b9a |
377 | remap_word_ram(d);\r |
4ff2d527 |
378 | }\r |
ef090115 |
379 | // s68k can only set RET, writing 0 has no effect\r |
07ceafdb |
380 | else if ((dold ^ d) & d & 1) { // RET being set\r |
381 | SekEndRunS68k(20+16+10+12+16); // see DMNA case\r |
382 | } else\r |
383 | d |= dold & 1;\r |
384 | if (d & 1)\r |
385 | d &= ~2; // DMNA clears\r |
d0d47c5b |
386 | }\r |
672ad671 |
387 | break;\r |
fa1e5e29 |
388 | }\r |
cc68a136 |
389 | case 4:\r |
af37bca8 |
390 | elprintf(EL_CDREGS, "s68k CDC dest: %x", d&7);\r |
cc68a136 |
391 | Pico_mcd->s68k_regs[4] = (Pico_mcd->s68k_regs[4]&0xC0) | (d&7); // CDC mode\r |
392 | return;\r |
393 | case 5:\r |
c459aefd |
394 | //dprintf("s68k CDC reg addr: %x", d&0xf);\r |
cc68a136 |
395 | break;\r |
396 | case 7:\r |
397 | CDC_Write_Reg(d);\r |
398 | return;\r |
399 | case 0xa:\r |
af37bca8 |
400 | elprintf(EL_CDREGS, "s68k set CDC dma addr");\r |
cc68a136 |
401 | break;\r |
d1df8786 |
402 | case 0xc:\r |
ae214f1c |
403 | case 0xd: // 384 cycle stopwatch timer\r |
404 | elprintf(EL_CDREGS|EL_CD, "s68k clear stopwatch (%x)", d);\r |
405 | // does this also reset internal 384 cycle counter?\r |
406 | Pico_mcd->m.stopwatch_base_c = SekCyclesDoneS68k();\r |
4f265db7 |
407 | return;\r |
1cd356a3 |
408 | case 0xe:\r |
bc3c13d3 |
409 | d = (d>>1) | (d<<7); // ror8 1, Gens note: Dragons lair\r |
410 | break;\r |
ae214f1c |
411 | case 0x31: // 384 cycle int3 timer\r |
412 | d &= 0xff;\r |
413 | elprintf(EL_CDREGS|EL_CD, "s68k set int3 timer: %02x", d);\r |
414 | Pico_mcd->s68k_regs[a] = (u8) d;\r |
415 | if (d) // d or d+1??\r |
416 | pcd_event_schedule_s68k(PCD_EVENT_TIMER3, d * 384);\r |
417 | else\r |
418 | pcd_event_schedule(0, PCD_EVENT_TIMER3, 0);\r |
d1df8786 |
419 | break;\r |
cc68a136 |
420 | case 0x33: // IRQ mask\r |
ae214f1c |
421 | elprintf(EL_CDREGS|EL_CD, "s68k irq mask: %02x", d);\r |
422 | d &= 0x7e;\r |
423 | if ((d ^ Pico_mcd->s68k_regs[0x33]) & d & PCDS_IEN4) {\r |
424 | if (Pico_mcd->s68k_regs[0x37] & 4)\r |
425 | CDD_Export_Status();\r |
cc68a136 |
426 | }\r |
427 | break;\r |
428 | case 0x34: // fader\r |
429 | Pico_mcd->s68k_regs[a] = (u8) d & 0x7f;\r |
430 | return;\r |
672ad671 |
431 | case 0x36:\r |
432 | return; // d/m bit is unsetable\r |
433 | case 0x37: {\r |
434 | u32 d_old = Pico_mcd->s68k_regs[0x37];\r |
435 | Pico_mcd->s68k_regs[0x37] = d&7;\r |
436 | if ((d&4) && !(d_old&4)) {\r |
cc68a136 |
437 | CDD_Export_Status();\r |
cc68a136 |
438 | }\r |
672ad671 |
439 | return;\r |
440 | }\r |
cc68a136 |
441 | case 0x4b:\r |
442 | Pico_mcd->s68k_regs[a] = (u8) d;\r |
443 | CDD_Import_Command();\r |
444 | return;\r |
445 | }\r |
446 | \r |
1cd356a3 |
447 | if ((a&0x1f0) == 0x10 || (a >= 0x38 && a < 0x42))\r |
cc68a136 |
448 | {\r |
ca61ee42 |
449 | elprintf(EL_UIO, "s68k FIXME: invalid write @ %02x?", a);\r |
cc68a136 |
450 | return;\r |
451 | }\r |
452 | \r |
bc3c13d3 |
453 | if (a < 0x30)\r |
454 | Pico_mcd->m.m68k_comm_dirty |= (1 << a/2);\r |
455 | \r |
cc68a136 |
456 | Pico_mcd->s68k_regs[a] = (u8) d;\r |
457 | }\r |
458 | \r |
af37bca8 |
459 | // -----------------------------------------------------------------\r |
460 | // Main 68k\r |
461 | // -----------------------------------------------------------------\r |
cc68a136 |
462 | \r |
af37bca8 |
463 | #ifndef _ASM_CD_MEMORY_C\r |
464 | #include "cell_map.c"\r |
af37bca8 |
465 | \r |
466 | // WORD RAM, cell aranged area (220000 - 23ffff)\r |
0ace9b9a |
467 | static u32 PicoReadM68k8_cell0(u32 a)\r |
cc68a136 |
468 | {\r |
af37bca8 |
469 | a = (a&3) | (cell_map(a >> 2) << 2); // cell arranged\r |
0ace9b9a |
470 | return Pico_mcd->word_ram1M[0][a ^ 1];\r |
471 | }\r |
472 | \r |
473 | static u32 PicoReadM68k8_cell1(u32 a)\r |
474 | {\r |
475 | a = (a&3) | (cell_map(a >> 2) << 2);\r |
476 | return Pico_mcd->word_ram1M[1][a ^ 1];\r |
477 | }\r |
478 | \r |
479 | static u32 PicoReadM68k16_cell0(u32 a)\r |
480 | {\r |
481 | a = (a&2) | (cell_map(a >> 2) << 2);\r |
482 | return *(u16 *)(Pico_mcd->word_ram1M[0] + a);\r |
af37bca8 |
483 | }\r |
cc68a136 |
484 | \r |
0ace9b9a |
485 | static u32 PicoReadM68k16_cell1(u32 a)\r |
af37bca8 |
486 | {\r |
af37bca8 |
487 | a = (a&2) | (cell_map(a >> 2) << 2);\r |
0ace9b9a |
488 | return *(u16 *)(Pico_mcd->word_ram1M[1] + a);\r |
af37bca8 |
489 | }\r |
cc68a136 |
490 | \r |
0ace9b9a |
491 | static void PicoWriteM68k8_cell0(u32 a, u32 d)\r |
af37bca8 |
492 | {\r |
af37bca8 |
493 | a = (a&3) | (cell_map(a >> 2) << 2);\r |
0ace9b9a |
494 | Pico_mcd->word_ram1M[0][a ^ 1] = d;\r |
af37bca8 |
495 | }\r |
8022f53d |
496 | \r |
0ace9b9a |
497 | static void PicoWriteM68k8_cell1(u32 a, u32 d)\r |
af37bca8 |
498 | {\r |
af37bca8 |
499 | a = (a&3) | (cell_map(a >> 2) << 2);\r |
0ace9b9a |
500 | Pico_mcd->word_ram1M[1][a ^ 1] = d;\r |
af37bca8 |
501 | }\r |
502 | \r |
0ace9b9a |
503 | static void PicoWriteM68k16_cell0(u32 a, u32 d)\r |
504 | {\r |
505 | a = (a&3) | (cell_map(a >> 2) << 2);\r |
506 | *(u16 *)(Pico_mcd->word_ram1M[0] + a) = d;\r |
507 | }\r |
508 | \r |
509 | static void PicoWriteM68k16_cell1(u32 a, u32 d)\r |
510 | {\r |
511 | a = (a&3) | (cell_map(a >> 2) << 2);\r |
512 | *(u16 *)(Pico_mcd->word_ram1M[1] + a) = d;\r |
513 | }\r |
514 | #endif\r |
515 | \r |
af37bca8 |
516 | // RAM cart (40000 - 7fffff, optional)\r |
517 | static u32 PicoReadM68k8_ramc(u32 a)\r |
518 | {\r |
519 | u32 d = 0;\r |
520 | if (a == 0x400001) {\r |
521 | if (SRam.data != NULL)\r |
522 | d = 3; // 64k cart\r |
523 | return d;\r |
8022f53d |
524 | }\r |
525 | \r |
af37bca8 |
526 | if ((a & 0xfe0000) == 0x600000) {\r |
527 | if (SRam.data != NULL)\r |
528 | d = SRam.data[((a >> 1) & 0xffff) + 0x2000];\r |
529 | return d;\r |
8022f53d |
530 | }\r |
531 | \r |
af37bca8 |
532 | if (a == 0x7fffff)\r |
533 | return Pico_mcd->m.bcram_reg;\r |
cc68a136 |
534 | \r |
af37bca8 |
535 | elprintf(EL_UIO, "m68k unmapped r8 [%06x] @%06x", a, SekPc);\r |
cc68a136 |
536 | return d;\r |
537 | }\r |
538 | \r |
af37bca8 |
539 | static u32 PicoReadM68k16_ramc(u32 a)\r |
cc68a136 |
540 | {\r |
af37bca8 |
541 | elprintf(EL_ANOMALY, "ramcart r16: [%06x] @%06x", a, SekPcS68k);\r |
542 | return PicoReadM68k8_ramc(a + 1);\r |
543 | }\r |
cc68a136 |
544 | \r |
af37bca8 |
545 | static void PicoWriteM68k8_ramc(u32 a, u32 d)\r |
546 | {\r |
547 | if ((a & 0xfe0000) == 0x600000) {\r |
548 | if (SRam.data != NULL && (Pico_mcd->m.bcram_reg & 1)) {\r |
549 | SRam.data[((a>>1) & 0xffff) + 0x2000] = d;\r |
8022f53d |
550 | SRam.changed = 1;\r |
551 | }\r |
552 | return;\r |
553 | }\r |
554 | \r |
af37bca8 |
555 | if (a == 0x7fffff) {\r |
556 | Pico_mcd->m.bcram_reg = d;\r |
8022f53d |
557 | return;\r |
558 | }\r |
559 | \r |
af37bca8 |
560 | elprintf(EL_UIO, "m68k unmapped w8 [%06x] %02x @%06x", a, d & 0xff, SekPc);\r |
cc68a136 |
561 | }\r |
562 | \r |
af37bca8 |
563 | static void PicoWriteM68k16_ramc(u32 a, u32 d)\r |
cc68a136 |
564 | {\r |
af37bca8 |
565 | elprintf(EL_ANOMALY, "ramcart w16: [%06x] %04x @%06x", a, d, SekPcS68k);\r |
566 | PicoWriteM68k8_ramc(a + 1, d);\r |
cc68a136 |
567 | }\r |
568 | \r |
af37bca8 |
569 | // IO/control/cd registers (a10000 - ...)\r |
0ace9b9a |
570 | #ifndef _ASM_CD_MEMORY_C\r |
af37bca8 |
571 | static u32 PicoReadM68k8_io(u32 a)\r |
cc68a136 |
572 | {\r |
af37bca8 |
573 | u32 d;\r |
574 | if ((a & 0xff00) == 0x2000) { // a12000 - a120ff\r |
575 | d = m68k_reg_read16(a); // TODO: m68k_reg_read8\r |
576 | if (!(a & 1))\r |
577 | d >>= 8;\r |
578 | d &= 0xff;\r |
579 | elprintf(EL_CDREGS, "m68k_regs r8: [%02x] %02x @%06x", a & 0x3f, d, SekPc);\r |
580 | return d;\r |
581 | }\r |
582 | \r |
583 | // fallback to default MD handler\r |
584 | return PicoRead8_io(a);\r |
cc68a136 |
585 | }\r |
586 | \r |
af37bca8 |
587 | static u32 PicoReadM68k16_io(u32 a)\r |
cc68a136 |
588 | {\r |
af37bca8 |
589 | u32 d;\r |
590 | if ((a & 0xff00) == 0x2000) {\r |
591 | d = m68k_reg_read16(a);\r |
592 | elprintf(EL_CDREGS, "m68k_regs r16: [%02x] %04x @%06x", a & 0x3f, d, SekPc);\r |
593 | return d;\r |
b542be46 |
594 | }\r |
cc68a136 |
595 | \r |
af37bca8 |
596 | return PicoRead16_io(a);\r |
cc68a136 |
597 | }\r |
598 | \r |
af37bca8 |
599 | static void PicoWriteM68k8_io(u32 a, u32 d)\r |
cc68a136 |
600 | {\r |
af37bca8 |
601 | if ((a & 0xff00) == 0x2000) { // a12000 - a120ff\r |
602 | elprintf(EL_CDREGS, "m68k_regs w8: [%02x] %02x @%06x", a&0x3f, d, SekPc);\r |
2433f409 |
603 | m68k_reg_write8(a, d);\r |
604 | return;\r |
605 | }\r |
672ad671 |
606 | \r |
af37bca8 |
607 | PicoWrite16_io(a, d);\r |
cc68a136 |
608 | }\r |
ab0607f7 |
609 | \r |
af37bca8 |
610 | static void PicoWriteM68k16_io(u32 a, u32 d)\r |
cc68a136 |
611 | {\r |
af37bca8 |
612 | if ((a & 0xff00) == 0x2000) { // a12000 - a120ff\r |
613 | elprintf(EL_CDREGS, "m68k_regs w16: [%02x] %04x @%06x", a&0x3f, d, SekPc);\r |
614 | /* TODO FIXME?\r |
7a1f6e45 |
615 | if (a == 0xe) { // special case, 2 byte writes would be handled differently\r |
616 | Pico_mcd->s68k_regs[0xe] = d >> 8;\r |
617 | #ifdef USE_POLL_DETECT\r |
618 | if ((s68k_poll_adclk&0xfe) == 0xe && s68k_poll_cnt > POLL_LIMIT) {\r |
6cadc2da |
619 | SekSetStopS68k(0); s68k_poll_adclk = 0;\r |
8f8fe01e |
620 | elprintf(EL_CDPOLL, "s68k poll release, a=%02x", a);\r |
7a1f6e45 |
621 | }\r |
622 | #endif\r |
623 | return;\r |
624 | }\r |
af37bca8 |
625 | */\r |
626 | m68k_reg_write8(a, d >> 8);\r |
627 | m68k_reg_write8(a + 1, d & 0xff);\r |
b542be46 |
628 | return;\r |
629 | }\r |
630 | \r |
af37bca8 |
631 | PicoWrite16_io(a, d);\r |
cc68a136 |
632 | }\r |
0ace9b9a |
633 | #endif\r |
cc68a136 |
634 | \r |
721cd396 |
635 | // -----------------------------------------------------------------\r |
af37bca8 |
636 | // Sub 68k\r |
cc68a136 |
637 | // -----------------------------------------------------------------\r |
638 | \r |
af37bca8 |
639 | static u32 s68k_unmapped_read8(u32 a)\r |
cc68a136 |
640 | {\r |
af37bca8 |
641 | elprintf(EL_UIO, "s68k unmapped r8 [%06x] @%06x", a, SekPc);\r |
642 | return 0;\r |
cc68a136 |
643 | }\r |
644 | \r |
af37bca8 |
645 | static u32 s68k_unmapped_read16(u32 a)\r |
cc68a136 |
646 | {\r |
af37bca8 |
647 | elprintf(EL_UIO, "s68k unmapped r16 [%06x] @%06x", a, SekPc);\r |
648 | return 0;\r |
649 | }\r |
4f265db7 |
650 | \r |
af37bca8 |
651 | static void s68k_unmapped_write8(u32 a, u32 d)\r |
652 | {\r |
653 | elprintf(EL_UIO, "s68k unmapped w8 [%06x] %02x @%06x", a, d & 0xff, SekPc);\r |
654 | }\r |
cc68a136 |
655 | \r |
af37bca8 |
656 | static void s68k_unmapped_write16(u32 a, u32 d)\r |
657 | {\r |
658 | elprintf(EL_UIO, "s68k unmapped w16 [%06x] %04x @%06x", a, d & 0xffff, SekPc);\r |
659 | }\r |
cc68a136 |
660 | \r |
0ace9b9a |
661 | // PRG RAM protected range (000000 - 00ff00)?\r |
662 | // XXX verify: ff00 or 1fe00 max?\r |
663 | static void PicoWriteS68k8_prgwp(u32 a, u32 d)\r |
664 | {\r |
665 | if (a >= (Pico_mcd->s68k_regs[2] << 8))\r |
666 | Pico_mcd->prg_ram[a ^ 1] = d;\r |
667 | }\r |
668 | \r |
669 | static void PicoWriteS68k16_prgwp(u32 a, u32 d)\r |
670 | {\r |
671 | if (a >= (Pico_mcd->s68k_regs[2] << 8))\r |
672 | *(u16 *)(Pico_mcd->prg_ram + a) = d;\r |
673 | }\r |
674 | \r |
675 | #ifndef _ASM_CD_MEMORY_C\r |
676 | \r |
af37bca8 |
677 | // decode (080000 - 0bffff, in 1M mode)\r |
0ace9b9a |
678 | static u32 PicoReadS68k8_dec0(u32 a)\r |
679 | {\r |
680 | u32 d = Pico_mcd->word_ram1M[0][((a >> 1) ^ 1) & 0x1ffff];\r |
681 | if (a & 1)\r |
682 | d &= 0x0f;\r |
683 | else\r |
684 | d >>= 4;\r |
685 | return d;\r |
686 | }\r |
687 | \r |
688 | static u32 PicoReadS68k8_dec1(u32 a)\r |
af37bca8 |
689 | {\r |
0ace9b9a |
690 | u32 d = Pico_mcd->word_ram1M[1][((a >> 1) ^ 1) & 0x1ffff];\r |
af37bca8 |
691 | if (a & 1)\r |
692 | d &= 0x0f;\r |
693 | else\r |
694 | d >>= 4;\r |
cc68a136 |
695 | return d;\r |
696 | }\r |
697 | \r |
0ace9b9a |
698 | static u32 PicoReadS68k16_dec0(u32 a)\r |
cc68a136 |
699 | {\r |
0ace9b9a |
700 | u32 d = Pico_mcd->word_ram1M[0][((a >> 1) ^ 1) & 0x1ffff];\r |
af37bca8 |
701 | d |= d << 4;\r |
702 | d &= ~0xf0;\r |
cc68a136 |
703 | return d;\r |
704 | }\r |
ab0607f7 |
705 | \r |
0ace9b9a |
706 | static u32 PicoReadS68k16_dec1(u32 a)\r |
0a051f55 |
707 | {\r |
0ace9b9a |
708 | u32 d = Pico_mcd->word_ram1M[1][((a >> 1) ^ 1) & 0x1ffff];\r |
709 | d |= d << 4;\r |
710 | d &= ~0xf0;\r |
711 | return d;\r |
0a051f55 |
712 | }\r |
713 | \r |
0ace9b9a |
714 | /* check: jaguar xj 220 (draws entire world using decode) */\r |
715 | #define mk_decode_w8(bank) \\r |
716 | static void PicoWriteS68k8_dec_m0b##bank(u32 a, u32 d) \\r |
717 | { \\r |
718 | u8 *pd = &Pico_mcd->word_ram1M[bank][((a >> 1) ^ 1) & 0x1ffff]; \\r |
719 | \\r |
720 | if (!(a & 1)) \\r |
721 | *pd = (*pd & 0x0f) | (d << 4); \\r |
722 | else \\r |
723 | *pd = (*pd & 0xf0) | (d & 0x0f); \\r |
724 | } \\r |
725 | \\r |
726 | static void PicoWriteS68k8_dec_m1b##bank(u32 a, u32 d) \\r |
727 | { \\r |
728 | u8 *pd = &Pico_mcd->word_ram1M[bank][((a >> 1) ^ 1) & 0x1ffff]; \\r |
729 | u8 mask = (a & 1) ? 0x0f : 0xf0; \\r |
730 | \\r |
731 | if (!(*pd & mask) && (d & 0x0f)) /* underwrite */ \\r |
732 | PicoWriteS68k8_dec_m0b##bank(a, d); \\r |
733 | } \\r |
734 | \\r |
735 | static void PicoWriteS68k8_dec_m2b##bank(u32 a, u32 d) /* ...and m3? */ \\r |
736 | { \\r |
737 | if (d & 0x0f) /* overwrite */ \\r |
738 | PicoWriteS68k8_dec_m0b##bank(a, d); \\r |
739 | }\r |
0a051f55 |
740 | \r |
0ace9b9a |
741 | mk_decode_w8(0)\r |
742 | mk_decode_w8(1)\r |
743 | \r |
744 | #define mk_decode_w16(bank) \\r |
745 | static void PicoWriteS68k16_dec_m0b##bank(u32 a, u32 d) \\r |
746 | { \\r |
747 | u8 *pd = &Pico_mcd->word_ram1M[bank][((a >> 1) ^ 1) & 0x1ffff]; \\r |
748 | \\r |
749 | d &= 0x0f0f; \\r |
750 | *pd = d | (d >> 4); \\r |
751 | } \\r |
752 | \\r |
753 | static void PicoWriteS68k16_dec_m1b##bank(u32 a, u32 d) \\r |
754 | { \\r |
755 | u8 *pd = &Pico_mcd->word_ram1M[bank][((a >> 1) ^ 1) & 0x1ffff]; \\r |
756 | \\r |
757 | d &= 0x0f0f; /* underwrite */ \\r |
758 | if (!(*pd & 0xf0)) *pd |= d >> 4; \\r |
759 | if (!(*pd & 0x0f)) *pd |= d; \\r |
760 | } \\r |
761 | \\r |
762 | static void PicoWriteS68k16_dec_m2b##bank(u32 a, u32 d) \\r |
763 | { \\r |
764 | u8 *pd = &Pico_mcd->word_ram1M[bank][((a >> 1) ^ 1) & 0x1ffff]; \\r |
765 | \\r |
766 | d &= 0x0f0f; /* overwrite */ \\r |
767 | d |= d >> 4; \\r |
768 | \\r |
769 | if (!(d & 0xf0)) d |= *pd & 0xf0; \\r |
770 | if (!(d & 0x0f)) d |= *pd & 0x0f; \\r |
771 | *pd = d; \\r |
772 | }\r |
0a051f55 |
773 | \r |
0ace9b9a |
774 | mk_decode_w16(0)\r |
775 | mk_decode_w16(1)\r |
0a051f55 |
776 | \r |
0ace9b9a |
777 | #endif\r |
0a051f55 |
778 | \r |
af37bca8 |
779 | // backup RAM (fe0000 - feffff)\r |
780 | static u32 PicoReadS68k8_bram(u32 a)\r |
781 | {\r |
782 | return Pico_mcd->bram[(a>>1)&0x1fff];\r |
783 | }\r |
cc68a136 |
784 | \r |
af37bca8 |
785 | static u32 PicoReadS68k16_bram(u32 a)\r |
cc68a136 |
786 | {\r |
af37bca8 |
787 | u32 d;\r |
788 | elprintf(EL_ANOMALY, "FIXME: s68k_bram r16: [%06x] @%06x", a, SekPcS68k);\r |
789 | a = (a >> 1) & 0x1fff;\r |
790 | d = Pico_mcd->bram[a++];\r |
791 | d|= Pico_mcd->bram[a++] << 8; // probably wrong, TODO: verify\r |
792 | return d;\r |
793 | }\r |
cc68a136 |
794 | \r |
af37bca8 |
795 | static void PicoWriteS68k8_bram(u32 a, u32 d)\r |
796 | {\r |
797 | Pico_mcd->bram[(a >> 1) & 0x1fff] = d;\r |
798 | SRam.changed = 1;\r |
799 | }\r |
cc68a136 |
800 | \r |
af37bca8 |
801 | static void PicoWriteS68k16_bram(u32 a, u32 d)\r |
802 | {\r |
803 | elprintf(EL_ANOMALY, "s68k_bram w16: [%06x] %04x @%06x", a, d, SekPcS68k);\r |
804 | a = (a >> 1) & 0x1fff;\r |
805 | Pico_mcd->bram[a++] = d;\r |
806 | Pico_mcd->bram[a++] = d >> 8; // TODO: verify..\r |
807 | SRam.changed = 1;\r |
808 | }\r |
b5e5172d |
809 | \r |
0ace9b9a |
810 | #ifndef _ASM_CD_MEMORY_C\r |
811 | \r |
af37bca8 |
812 | // PCM and registers (ff0000 - ffffff)\r |
813 | static u32 PicoReadS68k8_pr(u32 a)\r |
814 | {\r |
815 | u32 d = 0;\r |
cc68a136 |
816 | \r |
817 | // regs\r |
af37bca8 |
818 | if ((a & 0xfe00) == 0x8000) {\r |
cb4a513a |
819 | a &= 0x1ff;\r |
af37bca8 |
820 | elprintf(EL_CDREGS, "s68k_regs r8: [%02x] @ %06x", a, SekPcS68k);\r |
821 | if (a >= 0x0e && a < 0x30) {\r |
822 | d = Pico_mcd->s68k_regs[a];\r |
823 | s68k_poll_detect(a, d);\r |
824 | elprintf(EL_CDREGS, "ret = %02x", (u8)d);\r |
825 | return d;\r |
d0d47c5b |
826 | }\r |
af37bca8 |
827 | else if (a >= 0x58 && a < 0x68)\r |
828 | d = gfx_cd_read(a & ~1);\r |
829 | else d = s68k_reg_read16(a & ~1);\r |
830 | if (!(a & 1))\r |
831 | d >>= 8;\r |
832 | elprintf(EL_CDREGS, "ret = %02x", (u8)d);\r |
833 | return d & 0xff;\r |
d0d47c5b |
834 | }\r |
835 | \r |
4f265db7 |
836 | // PCM\r |
0ace9b9a |
837 | // XXX: verify: probably odd addrs only?\r |
af37bca8 |
838 | if ((a & 0x8000) == 0x0000) {\r |
4f265db7 |
839 | a &= 0x7fff;\r |
840 | if (a >= 0x2000)\r |
af37bca8 |
841 | d = Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a >> 1) & 0xfff];\r |
842 | else if (a >= 0x20) {\r |
843 | a &= 0x1e;\r |
844 | d = Pico_mcd->pcm.ch[a>>2].addr >> PCM_STEP_SHIFT;\r |
845 | if (a & 2)\r |
846 | d >>= 8;\r |
847 | }\r |
848 | return d & 0xff;\r |
ab0607f7 |
849 | }\r |
850 | \r |
af37bca8 |
851 | return s68k_unmapped_read8(a);\r |
cc68a136 |
852 | }\r |
853 | \r |
af37bca8 |
854 | static u32 PicoReadS68k16_pr(u32 a)\r |
cc68a136 |
855 | {\r |
af37bca8 |
856 | u32 d = 0;\r |
cc68a136 |
857 | \r |
858 | // regs\r |
af37bca8 |
859 | if ((a & 0xfe00) == 0x8000) {\r |
cb4a513a |
860 | a &= 0x1fe;\r |
af37bca8 |
861 | elprintf(EL_CDREGS, "s68k_regs r16: [%02x] @ %06x", a, SekPcS68k);\r |
862 | if (0x58 <= a && a < 0x68)\r |
863 | d = gfx_cd_read(a);\r |
864 | else d = s68k_reg_read16(a);\r |
865 | elprintf(EL_CDREGS, "ret = %04x", d);\r |
866 | return d;\r |
cc68a136 |
867 | }\r |
868 | \r |
af37bca8 |
869 | // PCM\r |
870 | if ((a & 0x8000) == 0x0000) {\r |
871 | //elprintf(EL_ANOMALY, "FIXME: s68k_pcm r16: [%06x] @%06x", a, SekPcS68k);\r |
872 | a &= 0x7fff;\r |
873 | if (a >= 0x2000)\r |
874 | d = Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff];\r |
875 | else if (a >= 0x20) {\r |
876 | a &= 0x1e;\r |
877 | d = Pico_mcd->pcm.ch[a>>2].addr >> PCM_STEP_SHIFT;\r |
878 | if (a & 2) d >>= 8;\r |
d0d47c5b |
879 | }\r |
af37bca8 |
880 | elprintf(EL_CDREGS, "ret = %04x", d);\r |
881 | return d;\r |
d0d47c5b |
882 | }\r |
883 | \r |
af37bca8 |
884 | return s68k_unmapped_read16(a);\r |
885 | }\r |
886 | \r |
887 | static void PicoWriteS68k8_pr(u32 a, u32 d)\r |
888 | {\r |
889 | // regs\r |
890 | if ((a & 0xfe00) == 0x8000) {\r |
891 | a &= 0x1ff;\r |
892 | elprintf(EL_CDREGS, "s68k_regs w8: [%02x] %02x @ %06x", a, d, SekPcS68k);\r |
893 | if (0x58 <= a && a < 0x68)\r |
894 | gfx_cd_write16(a&~1, (d<<8)|d);\r |
895 | else s68k_reg_write8(a,d);\r |
d0d47c5b |
896 | return;\r |
897 | }\r |
898 | \r |
4f265db7 |
899 | // PCM\r |
af37bca8 |
900 | if ((a & 0x8000) == 0x0000) {\r |
4f265db7 |
901 | a &= 0x7fff;\r |
902 | if (a >= 0x2000)\r |
903 | Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff] = d;\r |
904 | else if (a < 0x12)\r |
af37bca8 |
905 | pcm_write(a>>1, d);\r |
ab0607f7 |
906 | return;\r |
907 | }\r |
908 | \r |
af37bca8 |
909 | s68k_unmapped_write8(a, d);\r |
cc68a136 |
910 | }\r |
ab0607f7 |
911 | \r |
af37bca8 |
912 | static void PicoWriteS68k16_pr(u32 a, u32 d)\r |
cc68a136 |
913 | {\r |
cc68a136 |
914 | // regs\r |
af37bca8 |
915 | if ((a & 0xfe00) == 0x8000) {\r |
cb4a513a |
916 | a &= 0x1fe;\r |
af37bca8 |
917 | elprintf(EL_CDREGS, "s68k_regs w16: [%02x] %04x @ %06x", a, d, SekPcS68k);\r |
918 | if (a >= 0x58 && a < 0x68)\r |
919 | gfx_cd_write16(a, d);\r |
920 | else {\r |
921 | if (a == 0xe) {\r |
922 | // special case, 2 byte writes would be handled differently\r |
923 | // TODO: verify\r |
924 | Pico_mcd->s68k_regs[0xf] = d;\r |
925 | return;\r |
926 | }\r |
927 | s68k_reg_write8(a, d >> 8);\r |
928 | s68k_reg_write8(a + 1, d & 0xff);\r |
d0d47c5b |
929 | }\r |
930 | return;\r |
931 | }\r |
932 | \r |
4f265db7 |
933 | // PCM\r |
af37bca8 |
934 | if ((a & 0x8000) == 0x0000) {\r |
4f265db7 |
935 | a &= 0x7fff;\r |
af37bca8 |
936 | if (a >= 0x2000)\r |
937 | Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff] = d;\r |
938 | else if (a < 0x12)\r |
939 | pcm_write(a>>1, d & 0xff);\r |
ab0607f7 |
940 | return;\r |
941 | }\r |
942 | \r |
af37bca8 |
943 | s68k_unmapped_write16(a, d);\r |
cc68a136 |
944 | }\r |
cc68a136 |
945 | \r |
0ace9b9a |
946 | #endif\r |
947 | \r |
948 | static const void *m68k_cell_read8[] = { PicoReadM68k8_cell0, PicoReadM68k8_cell1 };\r |
949 | static const void *m68k_cell_read16[] = { PicoReadM68k16_cell0, PicoReadM68k16_cell1 };\r |
950 | static const void *m68k_cell_write8[] = { PicoWriteM68k8_cell0, PicoWriteM68k8_cell1 };\r |
951 | static const void *m68k_cell_write16[] = { PicoWriteM68k16_cell0, PicoWriteM68k16_cell1 };\r |
952 | \r |
953 | static const void *s68k_dec_read8[] = { PicoReadS68k8_dec0, PicoReadS68k8_dec1 };\r |
954 | static const void *s68k_dec_read16[] = { PicoReadS68k16_dec0, PicoReadS68k16_dec1 };\r |
955 | \r |
956 | static const void *s68k_dec_write8[2][4] = {\r |
957 | { PicoWriteS68k8_dec_m0b0, PicoWriteS68k8_dec_m1b0, PicoWriteS68k8_dec_m2b0, PicoWriteS68k8_dec_m2b0 },\r |
958 | { PicoWriteS68k8_dec_m0b1, PicoWriteS68k8_dec_m1b1, PicoWriteS68k8_dec_m2b1, PicoWriteS68k8_dec_m2b1 },\r |
959 | };\r |
960 | \r |
961 | static const void *s68k_dec_write16[2][4] = {\r |
962 | { PicoWriteS68k16_dec_m0b0, PicoWriteS68k16_dec_m1b0, PicoWriteS68k16_dec_m2b0, PicoWriteS68k16_dec_m2b0 },\r |
963 | { PicoWriteS68k16_dec_m0b1, PicoWriteS68k16_dec_m1b1, PicoWriteS68k16_dec_m2b1, PicoWriteS68k16_dec_m2b1 },\r |
964 | };\r |
965 | \r |
cc68a136 |
966 | // -----------------------------------------------------------------\r |
967 | \r |
0ace9b9a |
968 | static void remap_prg_window(void)\r |
3aa1e148 |
969 | {\r |
af37bca8 |
970 | // PRG RAM\r |
971 | if (Pico_mcd->m.busreq & 2) {\r |
0ace9b9a |
972 | void *bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3] >> 6];\r |
af37bca8 |
973 | cpu68k_map_all_ram(0x020000, 0x03ffff, bank, 0);\r |
974 | }\r |
975 | else {\r |
976 | m68k_map_unmap(0x020000, 0x03ffff);\r |
977 | }\r |
0ace9b9a |
978 | }\r |
979 | \r |
980 | static void remap_word_ram(int r3)\r |
981 | {\r |
982 | void *bank;\r |
af37bca8 |
983 | \r |
984 | // WORD RAM\r |
985 | if (!(r3 & 4)) {\r |
986 | // 2M mode. XXX: allowing access in all cases for simplicity\r |
987 | bank = Pico_mcd->word_ram2M;\r |
988 | cpu68k_map_all_ram(0x200000, 0x23ffff, bank, 0);\r |
989 | cpu68k_map_all_ram(0x080000, 0x0bffff, bank, 1);\r |
990 | // TODO: handle 0x0c0000\r |
991 | }\r |
992 | else {\r |
0ace9b9a |
993 | int b0 = r3 & 1;\r |
994 | int m = (r3 & 0x18) >> 3;\r |
995 | bank = Pico_mcd->word_ram1M[b0];\r |
af37bca8 |
996 | cpu68k_map_all_ram(0x200000, 0x21ffff, bank, 0);\r |
0ace9b9a |
997 | bank = Pico_mcd->word_ram1M[b0 ^ 1];\r |
af37bca8 |
998 | cpu68k_map_all_ram(0x0c0000, 0x0effff, bank, 1);\r |
999 | // "cell arrange" on m68k\r |
0ace9b9a |
1000 | cpu68k_map_set(m68k_read8_map, 0x220000, 0x23ffff, m68k_cell_read8[b0], 1);\r |
1001 | cpu68k_map_set(m68k_read16_map, 0x220000, 0x23ffff, m68k_cell_read16[b0], 1);\r |
1002 | cpu68k_map_set(m68k_write8_map, 0x220000, 0x23ffff, m68k_cell_write8[b0], 1);\r |
1003 | cpu68k_map_set(m68k_write16_map, 0x220000, 0x23ffff, m68k_cell_write16[b0], 1);\r |
af37bca8 |
1004 | // "decode format" on s68k\r |
0ace9b9a |
1005 | cpu68k_map_set(s68k_read8_map, 0x080000, 0x0bffff, s68k_dec_read8[b0 ^ 1], 1);\r |
1006 | cpu68k_map_set(s68k_read16_map, 0x080000, 0x0bffff, s68k_dec_read16[b0 ^ 1], 1);\r |
1007 | cpu68k_map_set(s68k_write8_map, 0x080000, 0x0bffff, s68k_dec_write8[b0 ^ 1][m], 1);\r |
1008 | cpu68k_map_set(s68k_write16_map, 0x080000, 0x0bffff, s68k_dec_write16[b0 ^ 1][m], 1);\r |
af37bca8 |
1009 | }\r |
1010 | \r |
3aa1e148 |
1011 | #ifdef EMU_F68K\r |
1012 | // update fetchmap..\r |
1013 | int i;\r |
1014 | if (!(r3 & 4))\r |
1015 | {\r |
1016 | for (i = M68K_FETCHBANK1*2/16; (i<<(24-FAMEC_FETCHBITS)) < 0x240000; i++)\r |
be26eb23 |
1017 | PicoCpuFM68k.Fetch[i] = (unsigned long)Pico_mcd->word_ram2M - 0x200000;\r |
3aa1e148 |
1018 | }\r |
1019 | else\r |
1020 | {\r |
1021 | for (i = M68K_FETCHBANK1*2/16; (i<<(24-FAMEC_FETCHBITS)) < 0x220000; i++)\r |
be26eb23 |
1022 | PicoCpuFM68k.Fetch[i] = (unsigned long)Pico_mcd->word_ram1M[r3 & 1] - 0x200000;\r |
3aa1e148 |
1023 | for (i = M68K_FETCHBANK1*0x0c/0x100; (i<<(24-FAMEC_FETCHBITS)) < 0x0e0000; i++)\r |
be26eb23 |
1024 | PicoCpuFS68k.Fetch[i] = (unsigned long)Pico_mcd->word_ram1M[(r3&1)^1] - 0x0c0000;\r |
3aa1e148 |
1025 | }\r |
1026 | #endif\r |
1027 | }\r |
b837b69b |
1028 | \r |
ae214f1c |
1029 | void pcd_state_loaded_mem(void)\r |
0ace9b9a |
1030 | {\r |
1031 | int r3 = Pico_mcd->s68k_regs[3];\r |
1032 | \r |
1033 | /* after load events */\r |
1034 | if (r3 & 4) // 1M mode?\r |
1035 | wram_2M_to_1M(Pico_mcd->word_ram2M);\r |
1036 | remap_word_ram(r3);\r |
1037 | remap_prg_window();\r |
1038 | \r |
1039 | // restore hint vector\r |
1040 | *(unsigned short *)(Pico_mcd->bios + 0x72) = Pico_mcd->m.hint_vector;\r |
1041 | }\r |
1042 | \r |
9037e45d |
1043 | #ifdef EMU_M68K\r |
1044 | static void m68k_mem_setup_cd(void);\r |
1045 | #endif\r |
1046 | \r |
eff55556 |
1047 | PICO_INTERNAL void PicoMemSetupCD(void)\r |
b837b69b |
1048 | {\r |
af37bca8 |
1049 | // setup default main68k map\r |
1050 | PicoMemSetup();\r |
1051 | \r |
af37bca8 |
1052 | // main68k map (BIOS mapped by PicoMemSetup()):\r |
1053 | // RAM cart\r |
1054 | if (PicoOpt & POPT_EN_MCD_RAMCART) {\r |
1055 | cpu68k_map_set(m68k_read8_map, 0x400000, 0x7fffff, PicoReadM68k8_ramc, 1);\r |
1056 | cpu68k_map_set(m68k_read16_map, 0x400000, 0x7fffff, PicoReadM68k16_ramc, 1);\r |
1057 | cpu68k_map_set(m68k_write8_map, 0x400000, 0x7fffff, PicoWriteM68k8_ramc, 1);\r |
1058 | cpu68k_map_set(m68k_write16_map, 0x400000, 0x7fffff, PicoWriteM68k16_ramc, 1);\r |
1059 | }\r |
1060 | \r |
1061 | // registers/IO:\r |
1062 | cpu68k_map_set(m68k_read8_map, 0xa10000, 0xa1ffff, PicoReadM68k8_io, 1);\r |
1063 | cpu68k_map_set(m68k_read16_map, 0xa10000, 0xa1ffff, PicoReadM68k16_io, 1);\r |
1064 | cpu68k_map_set(m68k_write8_map, 0xa10000, 0xa1ffff, PicoWriteM68k8_io, 1);\r |
1065 | cpu68k_map_set(m68k_write16_map, 0xa10000, 0xa1ffff, PicoWriteM68k16_io, 1);\r |
1066 | \r |
1067 | // sub68k map\r |
1068 | cpu68k_map_set(s68k_read8_map, 0x000000, 0xffffff, s68k_unmapped_read8, 1);\r |
1069 | cpu68k_map_set(s68k_read16_map, 0x000000, 0xffffff, s68k_unmapped_read16, 1);\r |
1070 | cpu68k_map_set(s68k_write8_map, 0x000000, 0xffffff, s68k_unmapped_write8, 1);\r |
1071 | cpu68k_map_set(s68k_write16_map, 0x000000, 0xffffff, s68k_unmapped_write16, 1);\r |
1072 | \r |
1073 | // PRG RAM\r |
1074 | cpu68k_map_set(s68k_read8_map, 0x000000, 0x07ffff, Pico_mcd->prg_ram, 0);\r |
1075 | cpu68k_map_set(s68k_read16_map, 0x000000, 0x07ffff, Pico_mcd->prg_ram, 0);\r |
1076 | cpu68k_map_set(s68k_write8_map, 0x000000, 0x07ffff, Pico_mcd->prg_ram, 0);\r |
1077 | cpu68k_map_set(s68k_write16_map, 0x000000, 0x07ffff, Pico_mcd->prg_ram, 0);\r |
0ace9b9a |
1078 | cpu68k_map_set(s68k_write8_map, 0x000000, 0x00ffff, PicoWriteS68k8_prgwp, 1);\r |
1079 | cpu68k_map_set(s68k_write16_map, 0x000000, 0x00ffff, PicoWriteS68k16_prgwp, 1);\r |
af37bca8 |
1080 | \r |
1081 | // BRAM\r |
1082 | cpu68k_map_set(s68k_read8_map, 0xfe0000, 0xfeffff, PicoReadS68k8_bram, 1);\r |
1083 | cpu68k_map_set(s68k_read16_map, 0xfe0000, 0xfeffff, PicoReadS68k16_bram, 1);\r |
1084 | cpu68k_map_set(s68k_write8_map, 0xfe0000, 0xfeffff, PicoWriteS68k8_bram, 1);\r |
1085 | cpu68k_map_set(s68k_write16_map, 0xfe0000, 0xfeffff, PicoWriteS68k16_bram, 1);\r |
1086 | \r |
1087 | // PCM, regs\r |
1088 | cpu68k_map_set(s68k_read8_map, 0xff0000, 0xffffff, PicoReadS68k8_pr, 1);\r |
1089 | cpu68k_map_set(s68k_read16_map, 0xff0000, 0xffffff, PicoReadS68k16_pr, 1);\r |
1090 | cpu68k_map_set(s68k_write8_map, 0xff0000, 0xffffff, PicoWriteS68k8_pr, 1);\r |
1091 | cpu68k_map_set(s68k_write16_map, 0xff0000, 0xffffff, PicoWriteS68k16_pr, 1);\r |
f53f286a |
1092 | \r |
0ace9b9a |
1093 | // RAMs\r |
1094 | remap_word_ram(1);\r |
1095 | \r |
b837b69b |
1096 | #ifdef EMU_C68K\r |
b837b69b |
1097 | // s68k\r |
5e89f0f5 |
1098 | PicoCpuCS68k.read8 = (void *)s68k_read8_map;\r |
1099 | PicoCpuCS68k.read16 = (void *)s68k_read16_map;\r |
1100 | PicoCpuCS68k.read32 = (void *)s68k_read16_map;\r |
1101 | PicoCpuCS68k.write8 = (void *)s68k_write8_map;\r |
1102 | PicoCpuCS68k.write16 = (void *)s68k_write16_map;\r |
1103 | PicoCpuCS68k.write32 = (void *)s68k_write16_map;\r |
1104 | PicoCpuCS68k.checkpc = NULL; /* unused */\r |
1105 | PicoCpuCS68k.fetch8 = NULL;\r |
1106 | PicoCpuCS68k.fetch16 = NULL;\r |
1107 | PicoCpuCS68k.fetch32 = NULL;\r |
b837b69b |
1108 | #endif\r |
3aa1e148 |
1109 | #ifdef EMU_F68K\r |
3aa1e148 |
1110 | // s68k\r |
af37bca8 |
1111 | PicoCpuFS68k.read_byte = s68k_read8;\r |
1112 | PicoCpuFS68k.read_word = s68k_read16;\r |
1113 | PicoCpuFS68k.read_long = s68k_read32;\r |
1114 | PicoCpuFS68k.write_byte = s68k_write8;\r |
1115 | PicoCpuFS68k.write_word = s68k_write16;\r |
1116 | PicoCpuFS68k.write_long = s68k_write32;\r |
3aa1e148 |
1117 | \r |
1118 | // setup FAME fetchmap\r |
1119 | {\r |
1120 | int i;\r |
1121 | // M68k\r |
1122 | // by default, point everything to fitst 64k of ROM (BIOS)\r |
1123 | for (i = 0; i < M68K_FETCHBANK1; i++)\r |
be26eb23 |
1124 | PicoCpuFM68k.Fetch[i] = (unsigned long)Pico.rom - (i<<(24-FAMEC_FETCHBITS));\r |
3aa1e148 |
1125 | // now real ROM (BIOS)\r |
1126 | for (i = 0; i < M68K_FETCHBANK1 && (i<<(24-FAMEC_FETCHBITS)) < Pico.romsize; i++)\r |
be26eb23 |
1127 | PicoCpuFM68k.Fetch[i] = (unsigned long)Pico.rom;\r |
3aa1e148 |
1128 | // .. and RAM\r |
1129 | for (i = M68K_FETCHBANK1*14/16; i < M68K_FETCHBANK1; i++)\r |
be26eb23 |
1130 | PicoCpuFM68k.Fetch[i] = (unsigned long)Pico.ram - (i<<(24-FAMEC_FETCHBITS));\r |
3aa1e148 |
1131 | // S68k\r |
1132 | // PRG RAM is default\r |
1133 | for (i = 0; i < M68K_FETCHBANK1; i++)\r |
be26eb23 |
1134 | PicoCpuFS68k.Fetch[i] = (unsigned long)Pico_mcd->prg_ram - (i<<(24-FAMEC_FETCHBITS));\r |
3aa1e148 |
1135 | // real PRG RAM\r |
1136 | for (i = 0; i < M68K_FETCHBANK1 && (i<<(24-FAMEC_FETCHBITS)) < 0x80000; i++)\r |
be26eb23 |
1137 | PicoCpuFS68k.Fetch[i] = (unsigned long)Pico_mcd->prg_ram;\r |
3aa1e148 |
1138 | // WORD RAM 2M area\r |
1139 | for (i = M68K_FETCHBANK1*0x08/0x100; i < M68K_FETCHBANK1 && (i<<(24-FAMEC_FETCHBITS)) < 0xc0000; i++)\r |
be26eb23 |
1140 | PicoCpuFS68k.Fetch[i] = (unsigned long)Pico_mcd->word_ram2M - 0x80000;\r |
0ace9b9a |
1141 | // remap_word_ram() will setup word ram for both\r |
3aa1e148 |
1142 | }\r |
1143 | #endif\r |
9037e45d |
1144 | #ifdef EMU_M68K\r |
1145 | m68k_mem_setup_cd();\r |
1146 | #endif\r |
3aa1e148 |
1147 | \r |
7a1f6e45 |
1148 | // m68k_poll_addr = m68k_poll_cnt = 0;\r |
1149 | s68k_poll_adclk = s68k_poll_cnt = 0;\r |
b837b69b |
1150 | }\r |
1151 | \r |
1152 | \r |
cc68a136 |
1153 | #ifdef EMU_M68K\r |
af37bca8 |
1154 | u32 m68k_read8(u32 a);\r |
1155 | u32 m68k_read16(u32 a);\r |
1156 | u32 m68k_read32(u32 a);\r |
1157 | void m68k_write8(u32 a, u8 d);\r |
1158 | void m68k_write16(u32 a, u16 d);\r |
1159 | void m68k_write32(u32 a, u32 d);\r |
1160 | \r |
9037e45d |
1161 | static unsigned int PicoReadCD8w (unsigned int a) {\r |
af37bca8 |
1162 | return m68ki_cpu_p == &PicoCpuMS68k ? s68k_read8(a) : m68k_read8(a);\r |
cc68a136 |
1163 | }\r |
9037e45d |
1164 | static unsigned int PicoReadCD16w(unsigned int a) {\r |
af37bca8 |
1165 | return m68ki_cpu_p == &PicoCpuMS68k ? s68k_read16(a) : m68k_read16(a);\r |
cc68a136 |
1166 | }\r |
9037e45d |
1167 | static unsigned int PicoReadCD32w(unsigned int a) {\r |
af37bca8 |
1168 | return m68ki_cpu_p == &PicoCpuMS68k ? s68k_read32(a) : m68k_read32(a);\r |
cc68a136 |
1169 | }\r |
9037e45d |
1170 | static void PicoWriteCD8w (unsigned int a, unsigned char d) {\r |
af37bca8 |
1171 | if (m68ki_cpu_p == &PicoCpuMS68k) s68k_write8(a, d); else m68k_write8(a, d);\r |
cc68a136 |
1172 | }\r |
9037e45d |
1173 | static void PicoWriteCD16w(unsigned int a, unsigned short d) {\r |
af37bca8 |
1174 | if (m68ki_cpu_p == &PicoCpuMS68k) s68k_write16(a, d); else m68k_write16(a, d);\r |
cc68a136 |
1175 | }\r |
9037e45d |
1176 | static void PicoWriteCD32w(unsigned int a, unsigned int d) {\r |
af37bca8 |
1177 | if (m68ki_cpu_p == &PicoCpuMS68k) s68k_write32(a, d); else m68k_write32(a, d);\r |
cc68a136 |
1178 | }\r |
1179 | \r |
9037e45d |
1180 | extern unsigned int (*pm68k_read_memory_8) (unsigned int address);\r |
1181 | extern unsigned int (*pm68k_read_memory_16)(unsigned int address);\r |
1182 | extern unsigned int (*pm68k_read_memory_32)(unsigned int address);\r |
1183 | extern void (*pm68k_write_memory_8) (unsigned int address, unsigned char value);\r |
1184 | extern void (*pm68k_write_memory_16)(unsigned int address, unsigned short value);\r |
1185 | extern void (*pm68k_write_memory_32)(unsigned int address, unsigned int value);\r |
9037e45d |
1186 | \r |
1187 | static void m68k_mem_setup_cd(void)\r |
1188 | {\r |
1189 | pm68k_read_memory_8 = PicoReadCD8w;\r |
1190 | pm68k_read_memory_16 = PicoReadCD16w;\r |
1191 | pm68k_read_memory_32 = PicoReadCD32w;\r |
1192 | pm68k_write_memory_8 = PicoWriteCD8w;\r |
1193 | pm68k_write_memory_16 = PicoWriteCD16w;\r |
1194 | pm68k_write_memory_32 = PicoWriteCD32w;\r |
9037e45d |
1195 | }\r |
cc68a136 |
1196 | #endif // EMU_M68K\r |
1197 | \r |
ae214f1c |
1198 | // vim:shiftwidth=2:ts=2:expandtab\r |