sms wip: initial graphics support
[picodrive.git] / pico / pico.c
CommitLineData
d9fc2fe1 1// PicoDrive\r
cc68a136 2\r
3// (c) Copyright 2004 Dave, All rights reserved.\r
d9fc2fe1 4// (c) Copyright 2006-2008 notaz, All rights reserved.\r
cc68a136 5// Free for non-commercial use.\r
6\r
7// For commercial use, separate licencing terms must be obtained.\r
8\r
9\r
efcba75f 10#include "pico_int.h"\r
cc68a136 11#include "sound/ym2612.h"\r
12\r
69996cb7 13int PicoVer=0x0133;\r
cc68a136 14struct Pico Pico;\r
602133e1 15int PicoOpt = 0;\r
16int PicoSkipFrame = 0; // skip rendering frame?\r
17int emustatus = 0; // rapid_ym2612, multi_ym_updates\r
2b02d6e5 18int PicoPad[2]; // Joypads, format is MXYZ SACB RLDU\r
5f9a0d16 19int PicoPadInt[2]; // internal copy\r
9037e45d 20int PicoAHW = 0; // active addon hardware: scd_active, 32x_active, svp_active, pico_active\r
cc68a136 21int PicoRegionOverride = 0; // override the region detection 0: Auto, 1: Japan NTSC, 2: Japan PAL, 4: US, 8: Europe\r
51a902ae 22int PicoAutoRgnOrder = 0;\r
602133e1 23struct PicoSRAM SRam = {0,};\r
24\r
f8ef8ff7 25void (*PicoWriteSound)(int len) = NULL; // called at the best time to send sound buffer (PsndOut) to hardware\r
26void (*PicoResetHook)(void) = NULL;\r
b0677887 27void (*PicoLineHook)(void) = NULL;\r
cc68a136 28\r
cc68a136 29// to be called once on emu init\r
2aa27095 30void PicoInit(void)\r
cc68a136 31{\r
32 // Blank space for state:\r
33 memset(&Pico,0,sizeof(Pico));\r
34 memset(&PicoPad,0,sizeof(PicoPad));\r
5f9a0d16 35 memset(&PicoPadInt,0,sizeof(PicoPadInt));\r
cc68a136 36\r
37 // Init CPUs:\r
38 SekInit();\r
39 z80_init(); // init even if we aren't going to use it\r
40\r
cc68a136 41 PicoInitMCD();\r
e807ac75 42 PicoSVPInit();\r
cc68a136 43\r
cc68a136 44 SRam.data=0;\r
cc68a136 45}\r
46\r
47// to be called once on emu exit\r
48void PicoExit(void)\r
49{\r
602133e1 50 if (PicoAHW & PAHW_MCD)\r
4f265db7 51 PicoExitMCD();\r
ca482e5d 52 PicoCartUnload();\r
cc68a136 53 z80_exit();\r
54\r
1cb1584b 55 if (SRam.data) free(SRam.data); SRam.data=0;\r
cc68a136 56}\r
57\r
1cb1584b 58void PicoPower(void)\r
59{\r
583ab72c 60 unsigned char sram_reg=Pico.m.sram_reg; // must be preserved\r
61\r
053fd9b4 62 Pico.m.frame_count = 0;\r
63\r
1cb1584b 64 // clear all memory of the emulated machine\r
65 memset(&Pico.ram,0,(unsigned int)&Pico.rom-(unsigned int)&Pico.ram);\r
66\r
67 memset(&Pico.video,0,sizeof(Pico.video));\r
68 memset(&Pico.m,0,sizeof(Pico.m));\r
69\r
70 Pico.video.pending_ints=0;\r
71 z80_reset();\r
72\r
73 // default VDP register values (based on Fusion)\r
74 Pico.video.reg[0] = Pico.video.reg[1] = 0x04;\r
75 Pico.video.reg[0xc] = 0x81;\r
76 Pico.video.reg[0xf] = 0x02;\r
77\r
602133e1 78 if (PicoAHW & PAHW_MCD)\r
1cb1584b 79 PicoPowerMCD();\r
80\r
583ab72c 81 Pico.m.sram_reg=sram_reg;\r
1cb1584b 82 PicoReset();\r
83}\r
84\r
1e6b5e39 85PICO_INTERNAL void PicoDetectRegion(void)\r
cc68a136 86{\r
1e6b5e39 87 int support=0, hw=0, i;\r
cc68a136 88 unsigned char pal=0;\r
cc68a136 89\r
1e6b5e39 90 if (PicoRegionOverride)\r
cc68a136 91 {\r
92 support = PicoRegionOverride;\r
93 }\r
94 else\r
95 {\r
96 // Read cartridge region data:\r
1e6b5e39 97 int region=PicoRead32(0x1f0);\r
cc68a136 98\r
99 for (i=0;i<4;i++)\r
100 {\r
101 int c=0;\r
102\r
103 c=region>>(i<<3); c&=0xff;\r
104 if (c<=' ') continue;\r
105\r
51a902ae 106 if (c=='J') support|=1;\r
107 else if (c=='U') support|=4;\r
108 else if (c=='E') support|=8;\r
109 else if (c=='j') {support|=1; break; }\r
110 else if (c=='u') {support|=4; break; }\r
111 else if (c=='e') {support|=8; break; }\r
cc68a136 112 else\r
113 {\r
114 // New style code:\r
115 char s[2]={0,0};\r
116 s[0]=(char)c;\r
117 support|=strtol(s,NULL,16);\r
118 }\r
119 }\r
120 }\r
121\r
51a902ae 122 // auto detection order override\r
123 if (PicoAutoRgnOrder) {\r
124 if (((PicoAutoRgnOrder>>0)&0xf) & support) support = (PicoAutoRgnOrder>>0)&0xf;\r
125 else if (((PicoAutoRgnOrder>>4)&0xf) & support) support = (PicoAutoRgnOrder>>4)&0xf;\r
126 else if (((PicoAutoRgnOrder>>8)&0xf) & support) support = (PicoAutoRgnOrder>>8)&0xf;\r
127 }\r
128\r
cc68a136 129 // Try to pick the best hardware value for English/50hz:\r
130 if (support&8) { hw=0xc0; pal=1; } // Europe\r
131 else if (support&4) hw=0x80; // USA\r
132 else if (support&2) { hw=0x40; pal=1; } // Japan PAL\r
133 else if (support&1) hw=0x00; // Japan NTSC\r
134 else hw=0x80; // USA\r
135\r
136 Pico.m.hardware=(unsigned char)(hw|0x20); // No disk attached\r
137 Pico.m.pal=pal;\r
1e6b5e39 138}\r
139\r
140int PicoReset(void)\r
141{\r
142 unsigned char sram_reg=Pico.m.sram_reg; // must be preserved\r
143\r
2ec9bec5 144 if (Pico.romsize <= 0)\r
145 return 1;\r
1e6b5e39 146\r
147 /* must call now, so that banking is reset, and correct vectors get fetched */\r
2ec9bec5 148 if (PicoResetHook)\r
149 PicoResetHook();\r
1e6b5e39 150\r
151 PicoMemReset();\r
5f9a0d16 152 memset(&PicoPadInt,0,sizeof(PicoPadInt));\r
2ec9bec5 153 emustatus = 0;\r
154\r
155 if (PicoAHW & PAHW_SMS) {\r
156 PicoResetMS();\r
157 return 0;\r
158 }\r
159\r
160 SekReset();\r
1e6b5e39 161 // s68k doesn't have the TAS quirk, so we just globally set normal TAS handler in MCD mode (used by Batman games).\r
162 SekSetRealTAS(PicoAHW & PAHW_MCD);\r
163 SekCycleCntT=0;\r
164\r
165 if (PicoAHW & PAHW_MCD)\r
166 // needed for MCD to reset properly, probably some bug hides behind this..\r
167 memset(Pico.ioports,0,sizeof(Pico.ioports));\r
1e6b5e39 168\r
169 Pico.m.dirtyPal = 1;\r
170\r
1832075e 171 Pico.m.z80_bank68k = 0;\r
172 memset(Pico.zram, 0, sizeof(Pico.zram)); // ??\r
173\r
1e6b5e39 174 PicoDetectRegion();\r
e5fa9817 175 Pico.video.status = 0x3428 | Pico.m.pal; // 'always set' bits | vblank | collision | pal\r
cc68a136 176\r
9d917eea 177 PsndReset(); // pal must be known here\r
cc68a136 178\r
1cb1584b 179 // create an empty "dma" to cause 68k exec start at random frame location\r
2ec9bec5 180 if (Pico.m.dma_xfers == 0 && !(PicoOpt & POPT_DIS_VDP_FIFO))\r
1cb1584b 181 Pico.m.dma_xfers = rand() & 0x1fff;\r
182\r
5ed2a20e 183 SekFinishIdleDet();\r
184\r
602133e1 185 if (PicoAHW & PAHW_MCD) {\r
1cb1584b 186 PicoResetMCD();\r
cc68a136 187 return 0;\r
188 }\r
5ed2a20e 189\r
190 // reinit, so that checksum checks pass\r
191 if (!(PicoOpt & POPT_DIS_IDLE_DET))\r
192 SekInitIdleDet();\r
cc68a136 193\r
1dceadae 194 // reset sram state; enable sram access by default if it doesn't overlap with ROM\r
195 Pico.m.sram_reg=sram_reg&0x14;\r
196 if (!(Pico.m.sram_reg&4) && Pico.romsize <= SRam.start) Pico.m.sram_reg |= 1;\r
cc68a136 197\r
1dceadae 198 elprintf(EL_STATUS, "sram: det: %i; eeprom: %i; start: %06x; end: %06x",\r
199 (Pico.m.sram_reg>>4)&1, (Pico.m.sram_reg>>2)&1, SRam.start, SRam.end);\r
cc68a136 200\r
201 return 0;\r
202}\r
203\r
1dceadae 204\r
69996cb7 205// dma2vram settings are just hacks to unglitch Legend of Galahad (needs <= 104 to work)\r
206// same for Outrunners (92-121, when active is set to 24)\r
48df6e9e 207// 96 is VR hack\r
69996cb7 208static const int dma_timings[] = {\r
053fd9b4 209 96, 167, 166, 83, // vblank: 32cell: dma2vram dma2[vs|c]ram vram_fill vram_copy\r
210 102, 205, 204, 102, // vblank: 40cell:\r
211 16, 16, 15, 8, // active: 32cell:\r
212 24, 18, 17, 9 // ...\r
4f672280 213};\r
214\r
69996cb7 215static const int dma_bsycles[] = {\r
053fd9b4 216 (488<<8)/96, (488<<8)/167, (488<<8)/166, (488<<8)/83,\r
217 (488<<8)/102, (488<<8)/205, (488<<8)/204, (488<<8)/102,\r
218 (488<<8)/16, (488<<8)/16, (488<<8)/15, (488<<8)/8,\r
219 (488<<8)/24, (488<<8)/18, (488<<8)/17, (488<<8)/9\r
312e9ce1 220};\r
221\r
eff55556 222PICO_INTERNAL int CheckDMA(void)\r
4f672280 223{\r
69996cb7 224 int burn = 0, xfers_can, dma_op = Pico.video.reg[0x17]>>6; // see gens for 00 and 01 modes\r
225 int xfers = Pico.m.dma_xfers;\r
312e9ce1 226 int dma_op1;\r
4f672280 227\r
312e9ce1 228 if(!(dma_op&2)) dma_op = (Pico.video.type==1) ? 0 : 1; // setting dma_timings offset here according to Gens\r
229 dma_op1 = dma_op;\r
230 if(Pico.video.reg[12] & 1) dma_op |= 4; // 40 cell mode?\r
231 if(!(Pico.video.status&8)&&(Pico.video.reg[1]&0x40)) dma_op|=8; // active display?\r
69996cb7 232 xfers_can = dma_timings[dma_op];\r
9761a7d0 233 if(xfers <= xfers_can)\r
234 {\r
4f672280 235 if(dma_op&2) Pico.video.status&=~2; // dma no longer busy\r
236 else {\r
69996cb7 237 burn = xfers * dma_bsycles[dma_op] >> 8; // have to be approximate because can't afford division..\r
4f672280 238 }\r
69996cb7 239 Pico.m.dma_xfers = 0;\r
4f672280 240 } else {\r
241 if(!(dma_op&2)) burn = 488;\r
69996cb7 242 Pico.m.dma_xfers -= xfers_can;\r
4f672280 243 }\r
244\r
69996cb7 245 elprintf(EL_VDPDMA, "~Dma %i op=%i can=%i burn=%i [%i]", Pico.m.dma_xfers, dma_op1, xfers_can, burn, SekCyclesDone());\r
312e9ce1 246 //dprintf("~aim: %i, cnt: %i", SekCycleAim, SekCycleCnt);\r
247 return burn;\r
4f672280 248}\r
249\r
bf5fbbb4 250static __inline void SekRunM68k(int cyc)\r
cc68a136 251{\r
252 int cyc_do;\r
253 SekCycleAim+=cyc;\r
053fd9b4 254 if ((cyc_do=SekCycleAim-SekCycleCnt) <= 0) return;\r
03e4f2a3 255#if defined(EMU_CORE_DEBUG)\r
256 // this means we do run-compare\r
b5e5172d 257 SekCycleCnt+=CM_compareRun(cyc_do, 0);\r
cc68a136 258#elif defined(EMU_C68K)\r
3aa1e148 259 PicoCpuCM68k.cycles=cyc_do;\r
260 CycloneRun(&PicoCpuCM68k);\r
261 SekCycleCnt+=cyc_do-PicoCpuCM68k.cycles;\r
cc68a136 262#elif defined(EMU_M68K)\r
263 SekCycleCnt+=m68k_execute(cyc_do);\r
70357ce5 264#elif defined(EMU_F68K)\r
c060a9ab 265 SekCycleCnt+=fm68k_emulate(cyc_do+1, 0, 0);\r
cc68a136 266#endif\r
267}\r
268\r
efcba75f 269#include "pico_cmn.c"\r
4b9c5888 270\r
271int z80stopCycle;\r
272int z80_cycle_cnt; /* 'done' z80 cycles before z80_run() */\r
273int z80_cycle_aim;\r
274int z80_scanline;\r
275int z80_scanline_cycles; /* cycles done until z80_scanline */\r
276\r
277/* sync z80 to 68k */\r
278PICO_INTERNAL void PicoSyncZ80(int m68k_cycles_done)\r
cc68a136 279{\r
4b9c5888 280 int cnt;\r
281 z80_cycle_aim = cycles_68k_to_z80(m68k_cycles_done);\r
282 cnt = z80_cycle_aim - z80_cycle_cnt;\r
cc68a136 283\r
e5fa9817 284 elprintf(EL_BUSREQ, "z80 sync %i (%i|%i -> %i|%i)", cnt, z80_cycle_cnt, z80_cycle_cnt / 228,\r
4b9c5888 285 z80_cycle_aim, z80_cycle_aim / 228);\r
286\r
287 if (cnt > 0)\r
288 z80_cycle_cnt += z80_run(cnt);\r
cc68a136 289}\r
290\r
4b9c5888 291\r
2aa27095 292void PicoFrame(void)\r
cc68a136 293{\r
8c1952f0 294 Pico.m.frame_count++;\r
295\r
602133e1 296 if (PicoAHW & PAHW_MCD) {\r
cc68a136 297 PicoFrameMCD();\r
2aa27095 298 return;\r
cc68a136 299 }\r
3e49ffd0 300 else if (PicoAHW & PAHW_SMS) {\r
301 PicoFrameMS();\r
302 return;\r
303 }\r
cc68a136 304\r
cc68a136 305 //if(Pico.video.reg[12]&0x2) Pico.video.status ^= 0x10; // change odd bit in interlace mode\r
306\r
602133e1 307 if (!(PicoOpt&POPT_ALT_RENDERER))\r
cc68a136 308 PicoFrameStart();\r
309\r
2aa27095 310 PicoFrameHints();\r
cc68a136 311}\r
312\r
a12e0116 313void PicoFrameDrawOnly(void)\r
314{\r
a12e0116 315 PicoFrameStart();\r
2aa27095 316 PicoDrawSync(223, 0);\r
a12e0116 317}\r
318\r
4609d0cd 319void PicoGetInternal(pint_t which, pint_ret_t *r)\r
8e5427a0 320{\r
321 switch (which)\r
322 {\r
4609d0cd 323 case PI_ROM: r->vptr = Pico.rom; break;\r
324 case PI_ISPAL: r->vint = Pico.m.pal; break;\r
325 case PI_IS40_CELL: r->vint = Pico.video.reg[12]&1; break;\r
326 case PI_IS240_LINES: r->vint = Pico.m.pal && (Pico.video.reg[1]&8); break;\r
8e5427a0 327 }\r
8e5427a0 328}\r
329\r
66fdc0f0 330// callback to output message from emu\r
331void (*PicoMessage)(const char *msg)=NULL;\r
cc68a136 332\r