1 // This is part of Pico Library
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3 // (c) Copyright 2004 Dave, All rights reserved.
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4 // (c) Copyright 2006-2009 notaz, All rights reserved.
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5 // Free for non-commercial use.
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7 // For commercial use, separate licencing terms must be obtained.
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10 #include "pico_int.h"
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13 #include "sound/ym2612.h"
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14 #include "sound/sn76496.h"
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16 extern unsigned int lastSSRamWrite; // used by serial eeprom code
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18 unsigned long m68k_read8_map [0x1000000 >> M68K_MEM_SHIFT];
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19 unsigned long m68k_read16_map [0x1000000 >> M68K_MEM_SHIFT];
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20 unsigned long m68k_write8_map [0x1000000 >> M68K_MEM_SHIFT];
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21 unsigned long m68k_write16_map[0x1000000 >> M68K_MEM_SHIFT];
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23 static void xmap_set(unsigned long *map, int shift, int start_addr, int end_addr,
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24 void *func_or_mh, int is_func)
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26 unsigned long addr = (unsigned long)func_or_mh;
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27 int mask = (1 << shift) - 1;
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30 if ((start_addr & mask) != 0 || (end_addr & mask) != mask) {
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31 elprintf(EL_STATUS|EL_ANOMALY, "xmap_set: tried to map bad range: %06x-%06x",
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32 start_addr, end_addr);
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37 elprintf(EL_STATUS|EL_ANOMALY, "xmap_set: ptr is not aligned: %08lx", addr);
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44 for (i = start_addr >> shift; i <= end_addr >> shift; i++) {
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47 map[i] |= 1 << (sizeof(addr) * 8 - 1);
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51 void z80_map_set(unsigned long *map, int start_addr, int end_addr,
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52 void *func_or_mh, int is_func)
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54 xmap_set(map, Z80_MEM_SHIFT, start_addr, end_addr, func_or_mh, is_func);
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57 void cpu68k_map_set(unsigned long *map, int start_addr, int end_addr,
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58 void *func_or_mh, int is_func)
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60 xmap_set(map, M68K_MEM_SHIFT, start_addr, end_addr, func_or_mh, is_func);
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63 // more specialized/optimized function (does same as above)
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64 void cpu68k_map_all_ram(int start_addr, int end_addr, void *ptr, int is_sub)
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66 unsigned long *r8map, *r16map, *w8map, *w16map;
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67 unsigned long addr = (unsigned long)ptr;
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68 int shift = M68K_MEM_SHIFT;
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72 r8map = m68k_read8_map;
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73 r16map = m68k_read16_map;
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74 w8map = m68k_write8_map;
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75 w16map = m68k_write16_map;
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77 r8map = s68k_read8_map;
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78 r16map = s68k_read16_map;
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79 w8map = s68k_write8_map;
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80 w16map = s68k_write16_map;
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85 for (i = start_addr >> shift; i <= end_addr >> shift; i++)
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86 r8map[i] = r16map[i] = w8map[i] = w16map[i] = addr;
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89 static u32 m68k_unmapped_read8(u32 a)
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91 elprintf(EL_UIO, "m68k unmapped r8 [%06x] @%06x", a, SekPc);
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92 return 0; // assume pulldown, as if MegaCD2 was attached
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95 static u32 m68k_unmapped_read16(u32 a)
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97 elprintf(EL_UIO, "m68k unmapped r16 [%06x] @%06x", a, SekPc);
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101 static void m68k_unmapped_write8(u32 a, u32 d)
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103 elprintf(EL_UIO, "m68k unmapped w8 [%06x] %02x @%06x", a, d & 0xff, SekPc);
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106 static void m68k_unmapped_write16(u32 a, u32 d)
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108 elprintf(EL_UIO, "m68k unmapped w16 [%06x] %04x @%06x", a, d & 0xffff, SekPc);
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111 void m68k_map_unmap(int start_addr, int end_addr)
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113 unsigned long addr;
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114 int shift = M68K_MEM_SHIFT;
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117 addr = (unsigned long)m68k_unmapped_read8;
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118 for (i = start_addr >> shift; i <= end_addr >> shift; i++)
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119 m68k_read8_map[i] = (addr >> 1) | (1 << 31);
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121 addr = (unsigned long)m68k_unmapped_read16;
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122 for (i = start_addr >> shift; i <= end_addr >> shift; i++)
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123 m68k_read16_map[i] = (addr >> 1) | (1 << 31);
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125 addr = (unsigned long)m68k_unmapped_write8;
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126 for (i = start_addr >> shift; i <= end_addr >> shift; i++)
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127 m68k_write8_map[i] = (addr >> 1) | (1 << 31);
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129 addr = (unsigned long)m68k_unmapped_write16;
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130 for (i = start_addr >> shift; i <= end_addr >> shift; i++)
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131 m68k_write16_map[i] = (addr >> 1) | (1 << 31);
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134 MAKE_68K_READ8(m68k_read8, m68k_read8_map)
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135 MAKE_68K_READ16(m68k_read16, m68k_read16_map)
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136 MAKE_68K_READ32(m68k_read32, m68k_read16_map)
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137 MAKE_68K_WRITE8(m68k_write8, m68k_write8_map)
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138 MAKE_68K_WRITE16(m68k_write16, m68k_write16_map)
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139 MAKE_68K_WRITE32(m68k_write32, m68k_write16_map)
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141 // -----------------------------------------------------------------
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143 static u32 ym2612_read_local_68k(void);
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144 static int ym2612_write_local(u32 a, u32 d, int is_from_z80);
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145 static void z80_mem_setup(void);
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148 #ifdef EMU_CORE_DEBUG
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149 u32 lastread_a, lastread_d[16]={0,}, lastwrite_cyc_d[16]={0,}, lastwrite_mus_d[16]={0,};
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150 int lrp_cyc=0, lrp_mus=0, lwp_cyc=0, lwp_mus=0;
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151 extern unsigned int ppop;
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155 void log_io(unsigned int addr, int bits, int rw);
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156 #elif defined(_MSC_VER)
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159 #define log_io(...)
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162 #if defined(EMU_C68K)
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163 static __inline int PicoMemBase(u32 pc)
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167 if (pc<Pico.romsize+4)
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169 membase=(int)Pico.rom; // Program Counter in Rom
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171 else if ((pc&0xe00000)==0xe00000)
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173 membase=(int)Pico.ram-(pc&0xff0000); // Program Counter in Ram
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177 // Error - Program Counter is invalid
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178 membase=(int)Pico.rom;
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186 PICO_INTERNAL u32 PicoCheckPc(u32 pc)
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189 #if defined(EMU_C68K)
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190 pc-=PicoCpuCM68k.membase; // Get real pc
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195 elprintf(EL_STATUS|EL_ANOMALY, "%i:%03i: game crash detected @ %06x\n",
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196 Pico.m.frame_count, Pico.m.scanline, SekPc);
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197 return (int)Pico.rom + Pico.romsize; // common crash condition, may happen with bad ROMs
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200 PicoCpuCM68k.membase=PicoMemBase(pc&0x00ffffff);
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201 PicoCpuCM68k.membase-=pc&0xff000000;
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203 ret = PicoCpuCM68k.membase+pc;
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209 PICO_INTERNAL void PicoInitPc(u32 pc)
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214 // -----------------------------------------------------------------
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217 static int PadRead(int i)
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219 int pad,value,data_reg;
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220 pad=~PicoPadInt[i]; // Get inverse of pad MXYZ SACB RLDU
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221 data_reg=Pico.ioports[i+1];
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223 // orr the bits, which are set as output
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224 value = data_reg&(Pico.ioports[i+4]|0x80);
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226 if (PicoOpt & POPT_6BTN_PAD)
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228 int phase = Pico.m.padTHPhase[i];
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230 if(phase == 2 && !(data_reg&0x40)) { // TH
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231 value|=(pad&0xc0)>>2; // ?0SA 0000
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233 } else if(phase == 3) {
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235 value|=(pad&0x30)|((pad>>8)&0xf); // ?1CB MXYZ
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237 value|=((pad&0xc0)>>2)|0x0f; // ?0SA 1111
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242 if(data_reg&0x40) // TH
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243 value|=(pad&0x3f); // ?1CB RLDU
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244 else value|=((pad&0xc0)>>2)|(pad&3); // ?0SA 00DU
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246 return value; // will mirror later
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249 static u32 io_ports_read(u32 a)
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254 case 0: d = Pico.m.hardware; break; // Hardware value (Version register)
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255 case 1: d = PadRead(0); break;
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256 case 2: d = PadRead(1); break;
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257 default: d = Pico.ioports[a]; break; // IO ports can be used as RAM
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262 static void io_ports_write(u32 a, u32 d)
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266 // 6 button gamepad: if TH went from 0 to 1, gamepad changes state
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267 if (1 <= a && a <= 2 && (PicoOpt & POPT_6BTN_PAD))
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269 Pico.m.padDelay[a - 1] = 0;
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270 if (!(Pico.ioports[a] & 0x40) && (d & 0x40))
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271 Pico.m.padTHPhase[a - 1]++;
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274 // cartain IO ports can be used as RAM
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275 Pico.ioports[a] = d;
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278 static void ctl_write_z80busreq(u32 d)
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281 elprintf(EL_BUSREQ, "set_zrun: %i->%i [%i] @%06x", Pico.m.z80Run, d, SekCyclesDone(), SekPc);
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282 if (d ^ Pico.m.z80Run)
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286 z80_cycle_cnt = cycles_68k_to_z80(SekCyclesDone());
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290 z80stopCycle = SekCyclesDone();
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291 if ((PicoOpt&POPT_EN_Z80) && !Pico.m.z80_reset)
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292 PicoSyncZ80(z80stopCycle);
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298 static void ctl_write_z80reset(u32 d)
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301 elprintf(EL_BUSREQ, "set_zreset: %i->%i [%i] @%06x", Pico.m.z80_reset, d, SekCyclesDone(), SekPc);
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302 if (d ^ Pico.m.z80_reset)
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306 if ((PicoOpt&POPT_EN_Z80) && Pico.m.z80Run)
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307 PicoSyncZ80(SekCyclesDone());
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313 z80_cycle_cnt = cycles_68k_to_z80(SekCyclesDone());
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316 Pico.m.z80_reset = d;
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320 // -----------------------------------------------------------------
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322 // cart (save) RAM area (usually 0x200000 - ...)
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323 static u32 PicoRead8_sram(u32 a)
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326 if (SRam.start <= a && a <= SRam.end && (Pico.m.sram_reg & SRR_MAPPED))
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328 if (SRam.flags & SRF_EEPROM) {
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333 d = *(u8 *)(SRam.data - SRam.start + a);
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334 elprintf(EL_SRAMIO, "sram r8 [%06x] %02x @ %06x", a, d, SekPc);
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338 // XXX: this is banking unfriendly
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339 if (a < Pico.romsize)
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340 return Pico.rom[a ^ 1];
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342 return m68k_unmapped_read8(a);
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345 static u32 PicoRead16_sram(u32 a)
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348 if (SRam.end >= a && a >= SRam.start && (Pico.m.sram_reg & SRR_MAPPED))
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350 if (SRam.flags & SRF_EEPROM)
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353 u8 *pm = (u8 *)(SRam.data - SRam.start + a);
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357 elprintf(EL_SRAMIO, "sram r16 [%06x] %04x @ %06x", a, d, SekPc);
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361 if (a < Pico.romsize)
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362 return *(u16 *)(Pico.rom + a);
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364 return m68k_unmapped_read16(a);
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367 static void PicoWrite8_sram(u32 a, u32 d)
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369 if (a > SRam.end || a < SRam.start || !(Pico.m.sram_reg & SRR_MAPPED)) {
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370 m68k_unmapped_write8(a, d);
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374 elprintf(EL_SRAMIO, "sram w8 [%06x] %02x @ %06x", a, d & 0xff, SekPc);
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375 if (SRam.flags & SRF_EEPROM)
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377 EEPROM_write8(a, d);
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380 u8 *pm = (u8 *)(SRam.data - SRam.start + a);
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381 if (*pm != (u8)d) {
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388 static void PicoWrite16_sram(u32 a, u32 d)
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390 if (a > SRam.end || a < SRam.start || !(Pico.m.sram_reg & SRR_MAPPED)) {
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391 m68k_unmapped_write16(a, d);
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395 elprintf(EL_SRAMIO, "sram w16 [%06x] %04x @ %06x", a, d & 0xffff, SekPc);
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396 if (SRam.flags & SRF_EEPROM)
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401 // XXX: hardware could easily use MSB too..
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402 u8 *pm = (u8 *)(SRam.data - SRam.start + a);
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403 if (*pm != (u8)d) {
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410 // z80 area (0xa00000 - 0xa0ffff)
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411 // TODO: verify mirrors VDP and bank reg (bank area mirroring verified)
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412 static u32 PicoRead8_z80(u32 a)
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415 if ((Pico.m.z80Run & 1) || Pico.m.z80_reset) {
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416 elprintf(EL_ANOMALY, "68k z80 read with no bus! [%06x] @ %06x", a, SekPc);
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417 // open bus. Pulled down if MegaCD2 is attached.
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421 if ((a & 0x4000) == 0x0000)
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422 d = Pico.zram[a & 0x1fff];
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423 else if ((a & 0x6000) == 0x4000) // 0x4000-0x5fff
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424 d = ym2612_read_local_68k();
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426 elprintf(EL_UIO|EL_ANOMALY, "68k bad read [%06x] @%06x", a, SekPc);
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430 static u32 PicoRead16_z80(u32 a)
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432 u32 d = PicoRead8_z80(a);
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433 return d | (d << 8);
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436 static void PicoWrite8_z80(u32 a, u32 d)
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438 if ((Pico.m.z80Run & 1) || Pico.m.z80_reset) {
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439 // verified on real hw
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440 elprintf(EL_ANOMALY, "68k z80 write with no bus or reset! [%06x] %02x @ %06x", a, d&0xff, SekPc);
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444 if ((a & 0x4000) == 0x0000) { // z80 RAM
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445 SekCyclesBurn(2); // hack
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446 Pico.zram[a & 0x1fff] = (u8)d;
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449 if ((a & 0x6000) == 0x4000) { // FM Sound
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450 if (PicoOpt & POPT_EN_FM)
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451 emustatus |= ym2612_write_local(a&3, d&0xff, 0)&1;
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454 // TODO: probably other VDP access too? Maybe more mirrors?
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455 if ((a & 0x7ff9) == 0x7f11) { // PSG Sound
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456 if (PicoOpt & POPT_EN_PSG)
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460 #if !defined(_ASM_MEMORY_C) || defined(_ASM_MEMORY_C_AMIPS)
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461 if ((a & 0x7f00) == 0x6000) // Z80 BANK register
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463 Pico.m.z80_bank68k >>= 1;
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464 Pico.m.z80_bank68k |= d << 8;
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465 Pico.m.z80_bank68k &= 0x1ff; // 9 bits and filled in the new top one
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466 elprintf(EL_Z80BNK, "z80 bank=%06x", Pico.m.z80_bank68k << 15);
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470 elprintf(EL_UIO|EL_ANOMALY, "68k bad write [%06x] %02x @ %06x", a, d&0xff, SekPc);
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473 static void PicoWrite16_z80(u32 a, u32 d)
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475 // for RAM, only most significant byte is sent
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476 // TODO: verify remaining accesses
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477 PicoWrite8_z80(a, d >> 8);
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480 // IO/control area (0xa10000 - 0xa1ffff)
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481 u32 PicoRead8_io(u32 a)
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485 if ((a & 0xffe0) == 0x0000) { // I/O ports
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486 d = io_ports_read(a);
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490 // faking open bus (MegaCD pulldowns don't work here curiously)
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491 d = Pico.m.rotate++;
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494 // bit8 seems to be readable in this range
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495 if ((a & 0xfc01) == 0x1000)
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498 if ((a & 0xff01) == 0x1100) { // z80 busreq (verified)
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499 d |= (Pico.m.z80Run | Pico.m.z80_reset) & 1;
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500 elprintf(EL_BUSREQ, "get_zrun: %02x [%i] @%06x", d, SekCyclesDone(), SekPc);
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504 d = m68k_unmapped_read8(a);
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509 u32 PicoRead16_io(u32 a)
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513 if ((a & 0xffe0) == 0x0000) { // I/O ports
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514 d = io_ports_read(a);
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519 d = (Pico.m.rotate += 0x41);
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520 d ^= (d << 5) ^ (d << 8);
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522 // bit8 seems to be readable in this range
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523 if ((a & 0xfc00) == 0x1000)
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526 if ((a & 0xff00) == 0x1100) { // z80 busreq
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527 d |= ((Pico.m.z80Run | Pico.m.z80_reset) & 1) << 8;
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528 elprintf(EL_BUSREQ, "get_zrun: %04x [%i] @%06x", d, SekCyclesDone(), SekPc);
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532 d = m68k_unmapped_read16(a);
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537 void PicoWrite8_io(u32 a, u32 d)
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539 if ((a & 0xffe1) == 0x0001) { // I/O ports (verified: only LSB!)
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540 io_ports_write(a, d);
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543 if ((a & 0xff01) == 0x1100) { // z80 busreq
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544 ctl_write_z80busreq(d);
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547 if ((a & 0xff01) == 0x1200) { // z80 reset
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548 ctl_write_z80reset(d);
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551 if (a == 0xa130f1) { // sram access register
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552 elprintf(EL_SRAMIO, "sram reg=%02x", d);
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553 Pico.m.sram_reg &= ~(SRR_MAPPED|SRR_READONLY);
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554 Pico.m.sram_reg |= (u8)(d & 3);
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557 m68k_unmapped_write8(a, d);
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560 void PicoWrite16_io(u32 a, u32 d)
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562 if ((a & 0xffe0) == 0x0000) { // I/O ports (verified: only LSB!)
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563 io_ports_write(a, d);
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566 if ((a & 0xff00) == 0x1100) { // z80 busreq
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567 ctl_write_z80busreq(d >> 8);
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570 if ((a & 0xff00) == 0x1200) { // z80 reset
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571 ctl_write_z80reset(d >> 8);
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574 if (a == 0xa130f0) { // sram access register
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575 elprintf(EL_SRAMIO, "sram reg=%02x", d);
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576 Pico.m.sram_reg &= ~(SRR_MAPPED|SRR_READONLY);
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577 Pico.m.sram_reg |= (u8)(d & 3);
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580 m68k_unmapped_write16(a, d);
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583 // VDP area (0xc00000 - 0xdfffff)
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584 // TODO: verify if lower byte goes to PSG on word writes
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585 static u32 PicoRead8_vdp(u32 a)
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587 if ((a & 0x00e0) == 0x0000)
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588 return PicoVideoRead8(a);
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590 elprintf(EL_UIO|EL_ANOMALY, "68k bad read [%06x] @%06x", a, SekPc);
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594 static u32 PicoRead16_vdp(u32 a)
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596 if ((a & 0x00e0) == 0x0000)
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597 return PicoVideoRead(a);
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599 elprintf(EL_UIO|EL_ANOMALY, "68k bad read [%06x] @%06x", a, SekPc);
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603 static void PicoWrite8_vdp(u32 a, u32 d)
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605 if ((a & 0x00f9) == 0x0011) { // PSG Sound
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606 if (PicoOpt & POPT_EN_PSG)
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610 if ((a & 0x00e0) == 0x0000) {
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612 PicoVideoWrite(a, d | (d << 8));
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616 elprintf(EL_UIO|EL_ANOMALY, "68k bad write [%06x] %02x @%06x", a, d & 0xff, SekPc);
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619 static void PicoWrite16_vdp(u32 a, u32 d)
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621 if ((a & 0x00f9) == 0x0010) { // PSG Sound
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622 if (PicoOpt & POPT_EN_PSG)
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626 if ((a & 0x00e0) == 0x0000) {
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627 PicoVideoWrite(a, d);
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631 elprintf(EL_UIO|EL_ANOMALY, "68k bad write [%06x] %04x @%06x", a, d & 0xffff, SekPc);
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634 // -----------------------------------------------------------------
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637 static void m68k_mem_setup(void);
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640 PICO_INTERNAL void PicoMemSetup(void)
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644 // setup the memory map
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645 cpu68k_map_set(m68k_read8_map, 0x000000, 0xffffff, m68k_unmapped_read8, 1);
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646 cpu68k_map_set(m68k_read16_map, 0x000000, 0xffffff, m68k_unmapped_read16, 1);
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647 cpu68k_map_set(m68k_write8_map, 0x000000, 0xffffff, m68k_unmapped_write8, 1);
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648 cpu68k_map_set(m68k_write16_map, 0x000000, 0xffffff, m68k_unmapped_write16, 1);
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651 // align to bank size. We know ROM loader allocated enough for this
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652 mask = (1 << M68K_MEM_SHIFT) - 1;
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653 rs = (Pico.romsize + mask) & ~mask;
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654 cpu68k_map_set(m68k_read8_map, 0x000000, rs - 1, Pico.rom, 0);
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655 cpu68k_map_set(m68k_read16_map, 0x000000, rs - 1, Pico.rom, 0);
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657 // Common case of on-cart (save) RAM, usually at 0x200000-...
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658 if ((SRam.flags & SRF_ENABLED) && SRam.data != NULL) {
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659 rs = SRam.end - SRam.start;
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660 rs = (rs + mask) & ~mask;
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661 if (SRam.start + rs >= 0x1000000)
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662 rs = 0x1000000 - SRam.start;
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663 cpu68k_map_set(m68k_read8_map, SRam.start, SRam.start + rs - 1, PicoRead8_sram, 1);
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664 cpu68k_map_set(m68k_read16_map, SRam.start, SRam.start + rs - 1, PicoRead16_sram, 1);
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665 cpu68k_map_set(m68k_write8_map, SRam.start, SRam.start + rs - 1, PicoWrite8_sram, 1);
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666 cpu68k_map_set(m68k_write16_map, SRam.start, SRam.start + rs - 1, PicoWrite16_sram, 1);
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670 cpu68k_map_set(m68k_read8_map, 0xa00000, 0xa0ffff, PicoRead8_z80, 1);
\r
671 cpu68k_map_set(m68k_read16_map, 0xa00000, 0xa0ffff, PicoRead16_z80, 1);
\r
672 cpu68k_map_set(m68k_write8_map, 0xa00000, 0xa0ffff, PicoWrite8_z80, 1);
\r
673 cpu68k_map_set(m68k_write16_map, 0xa00000, 0xa0ffff, PicoWrite16_z80, 1);
\r
675 // IO/control region
\r
676 cpu68k_map_set(m68k_read8_map, 0xa10000, 0xa1ffff, PicoRead8_io, 1);
\r
677 cpu68k_map_set(m68k_read16_map, 0xa10000, 0xa1ffff, PicoRead16_io, 1);
\r
678 cpu68k_map_set(m68k_write8_map, 0xa10000, 0xa1ffff, PicoWrite8_io, 1);
\r
679 cpu68k_map_set(m68k_write16_map, 0xa10000, 0xa1ffff, PicoWrite16_io, 1);
\r
682 for (a = 0xc00000; a < 0xe00000; a += 0x010000) {
\r
683 if ((a & 0xe700e0) != 0xc00000)
\r
685 cpu68k_map_set(m68k_read8_map, a, a + 0xffff, PicoRead8_vdp, 1);
\r
686 cpu68k_map_set(m68k_read16_map, a, a + 0xffff, PicoRead16_vdp, 1);
\r
687 cpu68k_map_set(m68k_write8_map, a, a + 0xffff, PicoWrite8_vdp, 1);
\r
688 cpu68k_map_set(m68k_write16_map, a, a + 0xffff, PicoWrite16_vdp, 1);
\r
691 // RAM and it's mirrors
\r
692 for (a = 0xe00000; a < 0x1000000; a += 0x010000) {
\r
693 cpu68k_map_set(m68k_read8_map, a, a + 0xffff, Pico.ram, 0);
\r
694 cpu68k_map_set(m68k_read16_map, a, a + 0xffff, Pico.ram, 0);
\r
695 cpu68k_map_set(m68k_write8_map, a, a + 0xffff, Pico.ram, 0);
\r
696 cpu68k_map_set(m68k_write16_map, a, a + 0xffff, Pico.ram, 0);
\r
699 // Setup memory callbacks:
\r
701 PicoCpuCM68k.checkpc = PicoCheckPc;
\r
702 PicoCpuCM68k.fetch8 = PicoCpuCM68k.read8 = m68k_read8;
\r
703 PicoCpuCM68k.fetch16 = PicoCpuCM68k.read16 = m68k_read16;
\r
704 PicoCpuCM68k.fetch32 = PicoCpuCM68k.read32 = m68k_read32;
\r
705 PicoCpuCM68k.write8 = m68k_write8;
\r
706 PicoCpuCM68k.write16 = m68k_write16;
\r
707 PicoCpuCM68k.write32 = m68k_write32;
\r
710 PicoCpuFM68k.read_byte = m68k_read8;
\r
711 PicoCpuFM68k.read_word = m68k_read16;
\r
712 PicoCpuFM68k.read_long = m68k_read32;
\r
713 PicoCpuFM68k.write_byte = m68k_write8;
\r
714 PicoCpuFM68k.write_word = m68k_write16;
\r
715 PicoCpuFM68k.write_long = m68k_write32;
\r
717 // setup FAME fetchmap
\r
720 // by default, point everything to first 64k of ROM
\r
721 for (i = 0; i < M68K_FETCHBANK1; i++)
\r
722 PicoCpuFM68k.Fetch[i] = (unsigned int)Pico.rom - (i<<(24-FAMEC_FETCHBITS));
\r
724 for (i = 0; i < M68K_FETCHBANK1 && (i<<(24-FAMEC_FETCHBITS)) < Pico.romsize; i++)
\r
725 PicoCpuFM68k.Fetch[i] = (unsigned int)Pico.rom;
\r
727 for (i = M68K_FETCHBANK1*14/16; i < M68K_FETCHBANK1; i++)
\r
728 PicoCpuFM68k.Fetch[i] = (unsigned int)Pico.ram - (i<<(24-FAMEC_FETCHBITS));
\r
739 unsigned int (*pm68k_read_memory_8) (unsigned int address) = NULL;
\r
740 unsigned int (*pm68k_read_memory_16)(unsigned int address) = NULL;
\r
741 unsigned int (*pm68k_read_memory_32)(unsigned int address) = NULL;
\r
742 void (*pm68k_write_memory_8) (unsigned int address, unsigned char value) = NULL;
\r
743 void (*pm68k_write_memory_16)(unsigned int address, unsigned short value) = NULL;
\r
744 void (*pm68k_write_memory_32)(unsigned int address, unsigned int value) = NULL;
\r
746 /* it appears that Musashi doesn't always mask the unused bits */
\r
747 unsigned int m68k_read_memory_8 (unsigned int address) { return pm68k_read_memory_8 (address) & 0xff; }
\r
748 unsigned int m68k_read_memory_16(unsigned int address) { return pm68k_read_memory_16(address) & 0xffff; }
\r
749 unsigned int m68k_read_memory_32(unsigned int address) { return pm68k_read_memory_32(address); }
\r
750 void m68k_write_memory_8 (unsigned int address, unsigned int value) { pm68k_write_memory_8 (address, (u8)value); }
\r
751 void m68k_write_memory_16(unsigned int address, unsigned int value) { pm68k_write_memory_16(address,(u16)value); }
\r
752 void m68k_write_memory_32(unsigned int address, unsigned int value) { pm68k_write_memory_32(address, value); }
\r
754 static void m68k_mem_setup(void)
\r
756 pm68k_read_memory_8 = m68k_read8;
\r
757 pm68k_read_memory_16 = m68k_read16;
\r
758 pm68k_read_memory_32 = m68k_read32;
\r
759 pm68k_write_memory_8 = m68k_write8;
\r
760 pm68k_write_memory_16 = m68k_write16;
\r
761 pm68k_write_memory_32 = m68k_write32;
\r
766 // -----------------------------------------------------------------
\r
768 static int get_scanline(int is_from_z80)
\r
771 int cycles = z80_cyclesDone();
\r
772 while (cycles - z80_scanline_cycles >= 228)
\r
773 z80_scanline++, z80_scanline_cycles += 228;
\r
774 return z80_scanline;
\r
777 return Pico.m.scanline;
\r
780 /* probably should not be in this file, but it's near related code here */
\r
781 void ym2612_sync_timers(int z80_cycles, int mode_old, int mode_new)
\r
783 int xcycles = z80_cycles << 8;
\r
785 /* check for overflows */
\r
786 if ((mode_old & 4) && xcycles > timer_a_next_oflow)
\r
787 ym2612.OPN.ST.status |= 1;
\r
789 if ((mode_old & 8) && xcycles > timer_b_next_oflow)
\r
790 ym2612.OPN.ST.status |= 2;
\r
792 /* update timer a */
\r
794 while (xcycles > timer_a_next_oflow)
\r
795 timer_a_next_oflow += timer_a_step;
\r
797 if ((mode_old ^ mode_new) & 1) // turning on/off
\r
800 timer_a_next_oflow = TIMER_NO_OFLOW;
\r
802 timer_a_next_oflow = xcycles + timer_a_step;
\r
805 elprintf(EL_YMTIMER, "timer a upd to %i @ %i", timer_a_next_oflow>>8, z80_cycles);
\r
807 /* update timer b */
\r
809 while (xcycles > timer_b_next_oflow)
\r
810 timer_b_next_oflow += timer_b_step;
\r
812 if ((mode_old ^ mode_new) & 2)
\r
815 timer_b_next_oflow = TIMER_NO_OFLOW;
\r
817 timer_b_next_oflow = xcycles + timer_b_step;
\r
820 elprintf(EL_YMTIMER, "timer b upd to %i @ %i", timer_b_next_oflow>>8, z80_cycles);
\r
823 // ym2612 DAC and timer I/O handlers for z80
\r
824 static int ym2612_write_local(u32 a, u32 d, int is_from_z80)
\r
829 if (a == 1 && ym2612.OPN.ST.address == 0x2a) /* DAC data */
\r
831 int scanline = get_scanline(is_from_z80);
\r
832 //elprintf(EL_STATUS, "%03i -> %03i dac w %08x z80 %i", PsndDacLine, scanline, d, is_from_z80);
\r
833 ym2612.dacout = ((int)d - 0x80) << 6;
\r
834 if (PsndOut && ym2612.dacen && scanline >= PsndDacLine)
\r
835 PsndDoDAC(scanline);
\r
841 case 0: /* address port 0 */
\r
842 ym2612.OPN.ST.address = d;
\r
843 ym2612.addr_A1 = 0;
\r
845 if (PicoOpt & POPT_EXT_FM) YM2612Write_940(a, d, -1);
\r
849 case 1: /* data port 0 */
\r
850 if (ym2612.addr_A1 != 0)
\r
853 addr = ym2612.OPN.ST.address;
\r
854 ym2612.REGS[addr] = d;
\r
858 case 0x24: // timer A High 8
\r
859 case 0x25: { // timer A Low 2
\r
860 int TAnew = (addr == 0x24) ? ((ym2612.OPN.ST.TA & 0x03)|(((int)d)<<2))
\r
861 : ((ym2612.OPN.ST.TA & 0x3fc)|(d&3));
\r
862 if (ym2612.OPN.ST.TA != TAnew)
\r
864 //elprintf(EL_STATUS, "timer a set %i", TAnew);
\r
865 ym2612.OPN.ST.TA = TAnew;
\r
866 //ym2612.OPN.ST.TAC = (1024-TAnew)*18;
\r
867 //ym2612.OPN.ST.TAT = 0;
\r
868 timer_a_step = TIMER_A_TICK_ZCYCLES * (1024 - TAnew);
\r
869 if (ym2612.OPN.ST.mode & 1) {
\r
870 // this is not right, should really be done on overflow only
\r
871 int cycles = is_from_z80 ? z80_cyclesDone() : cycles_68k_to_z80(SekCyclesDone());
\r
872 timer_a_next_oflow = (cycles << 8) + timer_a_step;
\r
874 elprintf(EL_YMTIMER, "timer a set to %i, %i", 1024 - TAnew, timer_a_next_oflow>>8);
\r
878 case 0x26: // timer B
\r
879 if (ym2612.OPN.ST.TB != d) {
\r
880 //elprintf(EL_STATUS, "timer b set %i", d);
\r
881 ym2612.OPN.ST.TB = d;
\r
882 //ym2612.OPN.ST.TBC = (256-d) * 288;
\r
883 //ym2612.OPN.ST.TBT = 0;
\r
884 timer_b_step = TIMER_B_TICK_ZCYCLES * (256 - d); // 262800
\r
885 if (ym2612.OPN.ST.mode & 2) {
\r
886 int cycles = is_from_z80 ? z80_cyclesDone() : cycles_68k_to_z80(SekCyclesDone());
\r
887 timer_b_next_oflow = (cycles << 8) + timer_b_step;
\r
889 elprintf(EL_YMTIMER, "timer b set to %i, %i", 256 - d, timer_b_next_oflow>>8);
\r
892 case 0x27: { /* mode, timer control */
\r
893 int old_mode = ym2612.OPN.ST.mode;
\r
894 int cycles = is_from_z80 ? z80_cyclesDone() : cycles_68k_to_z80(SekCyclesDone());
\r
895 ym2612.OPN.ST.mode = d;
\r
897 elprintf(EL_YMTIMER, "st mode %02x", d);
\r
898 ym2612_sync_timers(cycles, old_mode, d);
\r
900 /* reset Timer a flag */
\r
902 ym2612.OPN.ST.status &= ~1;
\r
904 /* reset Timer b flag */
\r
906 ym2612.OPN.ST.status &= ~2;
\r
908 if ((d ^ old_mode) & 0xc0) {
\r
910 if (PicoOpt & POPT_EXT_FM) return YM2612Write_940(a, d, get_scanline(is_from_z80));
\r
916 case 0x2b: { /* DAC Sel (YM2612) */
\r
917 int scanline = get_scanline(is_from_z80);
\r
918 ym2612.dacen = d & 0x80;
\r
919 if (d & 0x80) PsndDacLine = scanline;
\r
921 if (PicoOpt & POPT_EXT_FM) YM2612Write_940(a, d, scanline);
\r
928 case 2: /* address port 1 */
\r
929 ym2612.OPN.ST.address = d;
\r
930 ym2612.addr_A1 = 1;
\r
932 if (PicoOpt & POPT_EXT_FM) YM2612Write_940(a, d, -1);
\r
936 case 3: /* data port 1 */
\r
937 if (ym2612.addr_A1 != 1)
\r
940 addr = ym2612.OPN.ST.address | 0x100;
\r
941 ym2612.REGS[addr] = d;
\r
946 if (PicoOpt & POPT_EXT_FM)
\r
947 return YM2612Write_940(a, d, get_scanline(is_from_z80));
\r
949 return YM2612Write_(a, d);
\r
953 #define ym2612_read_local() \
\r
954 if (xcycles >= timer_a_next_oflow) \
\r
955 ym2612.OPN.ST.status |= (ym2612.OPN.ST.mode >> 2) & 1; \
\r
956 if (xcycles >= timer_b_next_oflow) \
\r
957 ym2612.OPN.ST.status |= (ym2612.OPN.ST.mode >> 2) & 2
\r
959 static u32 MEMH_FUNC ym2612_read_local_z80(void)
\r
961 int xcycles = z80_cyclesDone() << 8;
\r
963 ym2612_read_local();
\r
965 elprintf(EL_YMTIMER, "timer z80 read %i, sched %i, %i @ %i|%i", ym2612.OPN.ST.status,
\r
966 timer_a_next_oflow>>8, timer_b_next_oflow>>8, xcycles >> 8, (xcycles >> 8) / 228);
\r
967 return ym2612.OPN.ST.status;
\r
970 static u32 ym2612_read_local_68k(void)
\r
972 int xcycles = cycles_68k_to_z80(SekCyclesDone()) << 8;
\r
974 ym2612_read_local();
\r
976 elprintf(EL_YMTIMER, "timer 68k read %i, sched %i, %i @ %i|%i", ym2612.OPN.ST.status,
\r
977 timer_a_next_oflow>>8, timer_b_next_oflow>>8, xcycles >> 8, (xcycles >> 8) / 228);
\r
978 return ym2612.OPN.ST.status;
\r
981 void ym2612_pack_state(void)
\r
983 // timers are saved as tick counts, in 16.16 int format
\r
984 int tac, tat = 0, tbc, tbt = 0;
\r
985 tac = 1024 - ym2612.OPN.ST.TA;
\r
986 tbc = 256 - ym2612.OPN.ST.TB;
\r
987 if (timer_a_next_oflow != TIMER_NO_OFLOW)
\r
988 tat = (int)((double)(timer_a_step - timer_a_next_oflow) / (double)timer_a_step * tac * 65536);
\r
989 if (timer_b_next_oflow != TIMER_NO_OFLOW)
\r
990 tbt = (int)((double)(timer_b_step - timer_b_next_oflow) / (double)timer_b_step * tbc * 65536);
\r
991 elprintf(EL_YMTIMER, "save: timer a %i/%i", tat >> 16, tac);
\r
992 elprintf(EL_YMTIMER, "save: timer b %i/%i", tbt >> 16, tbc);
\r
995 if (PicoOpt & POPT_EXT_FM)
\r
996 YM2612PicoStateSave2_940(tat, tbt);
\r
999 YM2612PicoStateSave2(tat, tbt);
\r
1002 void ym2612_unpack_state(void)
\r
1004 int i, ret, tac, tat, tbc, tbt;
\r
1005 YM2612PicoStateLoad();
\r
1007 // feed all the registers and update internal state
\r
1008 for (i = 0x20; i < 0xA0; i++) {
\r
1009 ym2612_write_local(0, i, 0);
\r
1010 ym2612_write_local(1, ym2612.REGS[i], 0);
\r
1012 for (i = 0x30; i < 0xA0; i++) {
\r
1013 ym2612_write_local(2, i, 0);
\r
1014 ym2612_write_local(3, ym2612.REGS[i|0x100], 0);
\r
1016 for (i = 0xAF; i >= 0xA0; i--) { // must apply backwards
\r
1017 ym2612_write_local(2, i, 0);
\r
1018 ym2612_write_local(3, ym2612.REGS[i|0x100], 0);
\r
1019 ym2612_write_local(0, i, 0);
\r
1020 ym2612_write_local(1, ym2612.REGS[i], 0);
\r
1022 for (i = 0xB0; i < 0xB8; i++) {
\r
1023 ym2612_write_local(0, i, 0);
\r
1024 ym2612_write_local(1, ym2612.REGS[i], 0);
\r
1025 ym2612_write_local(2, i, 0);
\r
1026 ym2612_write_local(3, ym2612.REGS[i|0x100], 0);
\r
1030 if (PicoOpt & POPT_EXT_FM)
\r
1031 ret = YM2612PicoStateLoad2_940(&tat, &tbt);
\r
1034 ret = YM2612PicoStateLoad2(&tat, &tbt);
\r
1036 elprintf(EL_STATUS, "old ym2612 state");
\r
1037 return; // no saved timers
\r
1040 tac = (1024 - ym2612.OPN.ST.TA) << 16;
\r
1041 tbc = (256 - ym2612.OPN.ST.TB) << 16;
\r
1042 if (ym2612.OPN.ST.mode & 1)
\r
1043 timer_a_next_oflow = (int)((double)(tac - tat) / (double)tac * timer_a_step);
\r
1045 timer_a_next_oflow = TIMER_NO_OFLOW;
\r
1046 if (ym2612.OPN.ST.mode & 2)
\r
1047 timer_b_next_oflow = (int)((double)(tbc - tbt) / (double)tbc * timer_b_step);
\r
1049 timer_b_next_oflow = TIMER_NO_OFLOW;
\r
1050 elprintf(EL_YMTIMER, "load: %i/%i, timer_a_next_oflow %i", tat>>16, tac>>16, timer_a_next_oflow >> 8);
\r
1051 elprintf(EL_YMTIMER, "load: %i/%i, timer_b_next_oflow %i", tbt>>16, tbc>>16, timer_b_next_oflow >> 8);
\r
1054 // -----------------------------------------------------------------
\r
1055 // z80 memhandlers
\r
1057 static unsigned char MEMH_FUNC z80_md_vdp_read(unsigned short a)
\r
1060 elprintf(EL_ANOMALY, "z80 invalid r8 [%06x] %02x", a, 0xff);
\r
1064 static unsigned char MEMH_FUNC z80_md_bank_read(unsigned short a)
\r
1066 extern unsigned int PicoReadM68k8(unsigned int a);
\r
1067 unsigned int addr68k;
\r
1068 unsigned char ret;
\r
1070 addr68k = Pico.m.z80_bank68k<<15;
\r
1071 addr68k += a & 0x7fff;
\r
1073 ret = m68k_read8(addr68k);
\r
1075 elprintf(EL_Z80BNK, "z80->68k r8 [%06x] %02x", addr68k, ret);
\r
1079 static void MEMH_FUNC z80_md_ym2612_write(unsigned int a, unsigned char data)
\r
1081 if (PicoOpt & POPT_EN_FM)
\r
1082 emustatus |= ym2612_write_local(a, data, 1) & 1;
\r
1085 static void MEMH_FUNC z80_md_vdp_br_write(unsigned int a, unsigned char data)
\r
1087 // TODO: allow full VDP access
\r
1088 if ((a&0xfff9) == 0x7f11) // 7f11 7f13 7f15 7f17
\r
1090 if (PicoOpt & POPT_EN_PSG)
\r
1091 SN76496Write(data);
\r
1095 if ((a>>8) == 0x60)
\r
1097 Pico.m.z80_bank68k >>= 1;
\r
1098 Pico.m.z80_bank68k |= data << 8;
\r
1099 Pico.m.z80_bank68k &= 0x1ff; // 9 bits and filled in the new top one
\r
1103 elprintf(EL_ANOMALY, "z80 invalid w8 [%06x] %02x", a, data);
\r
1106 static void MEMH_FUNC z80_md_bank_write(unsigned int a, unsigned char data)
\r
1108 extern void PicoWriteM68k8(unsigned int a, unsigned char d);
\r
1109 unsigned int addr68k;
\r
1111 addr68k = Pico.m.z80_bank68k << 15;
\r
1112 addr68k += a & 0x7fff;
\r
1114 elprintf(EL_Z80BNK, "z80->68k w8 [%06x] %02x", addr68k, data);
\r
1115 m68k_write8(addr68k, data);
\r
1118 // -----------------------------------------------------------------
\r
1120 static unsigned char z80_md_in(unsigned short p)
\r
1122 elprintf(EL_ANOMALY, "Z80 port %04x read", p);
\r
1126 static void z80_md_out(unsigned short p, unsigned char d)
\r
1128 elprintf(EL_ANOMALY, "Z80 port %04x write %02x", p, d);
\r
1131 static void z80_mem_setup(void)
\r
1133 z80_map_set(z80_read_map, 0x0000, 0x1fff, Pico.zram, 0);
\r
1134 z80_map_set(z80_read_map, 0x2000, 0x3fff, Pico.zram, 0);
\r
1135 z80_map_set(z80_read_map, 0x4000, 0x5fff, ym2612_read_local_z80, 1);
\r
1136 z80_map_set(z80_read_map, 0x6000, 0x7fff, z80_md_vdp_read, 1);
\r
1137 z80_map_set(z80_read_map, 0x8000, 0xffff, z80_md_bank_read, 1);
\r
1139 z80_map_set(z80_write_map, 0x0000, 0x1fff, Pico.zram, 0);
\r
1140 z80_map_set(z80_write_map, 0x2000, 0x3fff, Pico.zram, 0);
\r
1141 z80_map_set(z80_write_map, 0x4000, 0x5fff, z80_md_ym2612_write, 1);
\r
1142 z80_map_set(z80_write_map, 0x6000, 0x7fff, z80_md_vdp_br_write, 1);
\r
1143 z80_map_set(z80_write_map, 0x8000, 0xffff, z80_md_bank_write, 1);
\r
1146 drZ80.z80_in = z80_md_in;
\r
1147 drZ80.z80_out = z80_md_out;
\r
1150 Cz80_Set_Fetch(&CZ80, 0x0000, 0x1fff, (UINT32)Pico.zram); // main RAM
\r
1151 Cz80_Set_Fetch(&CZ80, 0x2000, 0x3fff, (UINT32)Pico.zram); // mirror
\r
1152 Cz80_Set_INPort(&CZ80, z80_md_in);
\r
1153 Cz80_Set_OUTPort(&CZ80, z80_md_out);
\r