cff531af |
1 | /*\r |
2 | * Memory I/O handlers for Sega/Mega CD.\r |
3 | * (C) notaz, 2007-2009\r |
4 | *\r |
5 | * This work is licensed under the terms of MAME license.\r |
6 | * See COPYING file in the top-level directory.\r |
7 | */\r |
cc68a136 |
8 | \r |
efcba75f |
9 | #include "../pico_int.h"\r |
af37bca8 |
10 | #include "../memory.h"\r |
cc68a136 |
11 | \r |
cb4a513a |
12 | #include "gfx_cd.h"\r |
4f265db7 |
13 | #include "pcm.h"\r |
cb4a513a |
14 | \r |
bcf65fd6 |
15 | uptr s68k_read8_map [0x1000000 >> M68K_MEM_SHIFT];\r |
16 | uptr s68k_read16_map [0x1000000 >> M68K_MEM_SHIFT];\r |
17 | uptr s68k_write8_map [0x1000000 >> M68K_MEM_SHIFT];\r |
18 | uptr s68k_write16_map[0x1000000 >> M68K_MEM_SHIFT];\r |
cc68a136 |
19 | \r |
af37bca8 |
20 | MAKE_68K_READ8(s68k_read8, s68k_read8_map)\r |
21 | MAKE_68K_READ16(s68k_read16, s68k_read16_map)\r |
22 | MAKE_68K_READ32(s68k_read32, s68k_read16_map)\r |
23 | MAKE_68K_WRITE8(s68k_write8, s68k_write8_map)\r |
24 | MAKE_68K_WRITE16(s68k_write16, s68k_write16_map)\r |
25 | MAKE_68K_WRITE32(s68k_write32, s68k_write16_map)\r |
b5e5172d |
26 | \r |
cc68a136 |
27 | // -----------------------------------------------------------------\r |
28 | \r |
0ace9b9a |
29 | // provided by ASM code:\r |
30 | #ifdef _ASM_CD_MEMORY_C\r |
31 | u32 PicoReadM68k8_io(u32 a);\r |
32 | u32 PicoReadM68k16_io(u32 a);\r |
33 | void PicoWriteM68k8_io(u32 a, u32 d);\r |
34 | void PicoWriteM68k16_io(u32 a, u32 d);\r |
35 | \r |
36 | u32 PicoReadS68k8_pr(u32 a);\r |
37 | u32 PicoReadS68k16_pr(u32 a);\r |
38 | void PicoWriteS68k8_pr(u32 a, u32 d);\r |
39 | void PicoWriteS68k16_pr(u32 a, u32 d);\r |
40 | \r |
41 | u32 PicoReadM68k8_cell0(u32 a);\r |
42 | u32 PicoReadM68k8_cell1(u32 a);\r |
43 | u32 PicoReadM68k16_cell0(u32 a);\r |
44 | u32 PicoReadM68k16_cell1(u32 a);\r |
45 | void PicoWriteM68k8_cell0(u32 a, u32 d);\r |
46 | void PicoWriteM68k8_cell1(u32 a, u32 d);\r |
47 | void PicoWriteM68k16_cell0(u32 a, u32 d);\r |
48 | void PicoWriteM68k16_cell1(u32 a, u32 d);\r |
49 | \r |
50 | u32 PicoReadS68k8_dec0(u32 a);\r |
51 | u32 PicoReadS68k8_dec1(u32 a);\r |
52 | u32 PicoReadS68k16_dec0(u32 a);\r |
53 | u32 PicoReadS68k16_dec1(u32 a);\r |
54 | void PicoWriteS68k8_dec_m0b0(u32 a, u32 d);\r |
55 | void PicoWriteS68k8_dec_m1b0(u32 a, u32 d);\r |
56 | void PicoWriteS68k8_dec_m2b0(u32 a, u32 d);\r |
57 | void PicoWriteS68k8_dec_m0b1(u32 a, u32 d);\r |
58 | void PicoWriteS68k8_dec_m1b1(u32 a, u32 d);\r |
59 | void PicoWriteS68k8_dec_m2b1(u32 a, u32 d);\r |
60 | void PicoWriteS68k16_dec_m0b0(u32 a, u32 d);\r |
61 | void PicoWriteS68k16_dec_m1b0(u32 a, u32 d);\r |
62 | void PicoWriteS68k16_dec_m2b0(u32 a, u32 d);\r |
63 | void PicoWriteS68k16_dec_m0b1(u32 a, u32 d);\r |
64 | void PicoWriteS68k16_dec_m1b1(u32 a, u32 d);\r |
65 | void PicoWriteS68k16_dec_m2b1(u32 a, u32 d);\r |
66 | #endif\r |
67 | \r |
08769494 |
68 | static void remap_prg_window(int r3);\r |
0ace9b9a |
69 | static void remap_word_ram(int r3);\r |
70 | \r |
7a1f6e45 |
71 | // poller detection\r |
7a1f6e45 |
72 | #define POLL_LIMIT 16\r |
73 | #define POLL_CYCLES 124\r |
cc68a136 |
74 | \r |
08769494 |
75 | u32 m68k_comm_check(u32 a, u32 d)\r |
bc3c13d3 |
76 | {\r |
08769494 |
77 | pcd_sync_s68k(SekCyclesDone(), 0);\r |
bc3c13d3 |
78 | if (a != Pico_mcd->m.m68k_poll_a) {\r |
79 | Pico_mcd->m.m68k_poll_a = a;\r |
80 | Pico_mcd->m.m68k_poll_cnt = 0;\r |
08769494 |
81 | return d;\r |
bc3c13d3 |
82 | }\r |
08769494 |
83 | Pico_mcd->m.m68k_poll_cnt++;\r |
84 | return d;\r |
bc3c13d3 |
85 | }\r |
86 | \r |
4ff2d527 |
87 | #ifndef _ASM_CD_MEMORY_C\r |
cb4a513a |
88 | static u32 m68k_reg_read16(u32 a)\r |
cc68a136 |
89 | {\r |
90 | u32 d=0;\r |
91 | a &= 0x3e;\r |
cc68a136 |
92 | \r |
93 | switch (a) {\r |
672ad671 |
94 | case 0:\r |
c459aefd |
95 | d = ((Pico_mcd->s68k_regs[0x33]<<13)&0x8000) | Pico_mcd->m.busreq; // here IFL2 is always 0, just like in Gens\r |
672ad671 |
96 | goto end;\r |
cc68a136 |
97 | case 2:\r |
672ad671 |
98 | d = (Pico_mcd->s68k_regs[a]<<8) | (Pico_mcd->s68k_regs[a+1]&0xc7);\r |
af37bca8 |
99 | elprintf(EL_CDREG3, "m68k_regs r3: %02x @%06x", (u8)d, SekPc);\r |
08769494 |
100 | goto end_comm;\r |
c459aefd |
101 | case 4:\r |
102 | d = Pico_mcd->s68k_regs[4]<<8;\r |
103 | goto end;\r |
104 | case 6:\r |
913ef4b7 |
105 | d = *(u16 *)(Pico_mcd->bios + 0x72);\r |
c459aefd |
106 | goto end;\r |
cc68a136 |
107 | case 8:\r |
cc68a136 |
108 | d = Read_CDC_Host(0);\r |
109 | goto end;\r |
c459aefd |
110 | case 0xA:\r |
ca61ee42 |
111 | elprintf(EL_UIO, "m68k FIXME: reserved read");\r |
c459aefd |
112 | goto end;\r |
ae214f1c |
113 | case 0xC: // 384 cycle stopwatch timer\r |
114 | // ugh..\r |
115 | d = pcd_cycles_m68k_to_s68k(SekCyclesDone());\r |
116 | d = (d - Pico_mcd->m.stopwatch_base_c) / 384;\r |
117 | d &= 0x0fff;\r |
af37bca8 |
118 | elprintf(EL_CDREGS, "m68k stopwatch timer read (%04x)", d);\r |
1cd356a3 |
119 | goto end;\r |
cc68a136 |
120 | }\r |
121 | \r |
cc68a136 |
122 | if (a < 0x30) {\r |
123 | // comm flag/cmd/status (0xE-0x2F)\r |
124 | d = (Pico_mcd->s68k_regs[a]<<8) | Pico_mcd->s68k_regs[a+1];\r |
08769494 |
125 | goto end_comm;\r |
cc68a136 |
126 | }\r |
127 | \r |
ca61ee42 |
128 | elprintf(EL_UIO, "m68k_regs FIXME invalid read @ %02x", a);\r |
cc68a136 |
129 | \r |
130 | end:\r |
cc68a136 |
131 | return d;\r |
08769494 |
132 | \r |
133 | end_comm:\r |
134 | return m68k_comm_check(a, d);\r |
cc68a136 |
135 | }\r |
4ff2d527 |
136 | #endif\r |
cc68a136 |
137 | \r |
4ff2d527 |
138 | #ifndef _ASM_CD_MEMORY_C\r |
139 | static\r |
140 | #endif\r |
141 | void m68k_reg_write8(u32 a, u32 d)\r |
cc68a136 |
142 | {\r |
af37bca8 |
143 | u32 dold;\r |
cc68a136 |
144 | a &= 0x3f;\r |
cc68a136 |
145 | \r |
08769494 |
146 | Pico_mcd->m.m68k_poll_a =\r |
147 | Pico_mcd->m.m68k_poll_cnt = 0;\r |
bc3c13d3 |
148 | \r |
cc68a136 |
149 | switch (a) {\r |
150 | case 0:\r |
672ad671 |
151 | d &= 1;\r |
08769494 |
152 | if (d && (Pico_mcd->s68k_regs[0x33] & PCDS_IEN2)) {\r |
153 | elprintf(EL_INTS, "m68k: s68k irq 2");\r |
154 | pcd_sync_s68k(SekCyclesDone(), 0);\r |
155 | SekInterruptS68k(2);\r |
156 | }\r |
c459aefd |
157 | return;\r |
cc68a136 |
158 | case 1:\r |
672ad671 |
159 | d &= 3;\r |
bc3c13d3 |
160 | elprintf(EL_CDREGS, "d m.busreq %u %u", d, Pico_mcd->m.busreq);\r |
161 | if (d == Pico_mcd->m.busreq)\r |
162 | return;\r |
08769494 |
163 | pcd_sync_s68k(SekCyclesDone(), 0);\r |
bc3c13d3 |
164 | \r |
165 | if ((Pico_mcd->m.busreq ^ d) & 1) {\r |
166 | elprintf(EL_INTSW, "m68k: s68k reset %i", !(d&1));\r |
167 | if (!(d & 1))\r |
168 | d |= 2; // verified: reset also gives bus\r |
169 | else {\r |
170 | elprintf(EL_CDREGS, "m68k: resetting s68k");\r |
171 | SekResetS68k();\r |
172 | }\r |
cc68a136 |
173 | }\r |
bc3c13d3 |
174 | if ((Pico_mcd->m.busreq ^ d) & 2) {\r |
175 | elprintf(EL_INTSW, "m68k: s68k brq %i", d >> 1);\r |
08769494 |
176 | remap_prg_window(Pico_mcd->s68k_regs[3]);\r |
bc3c13d3 |
177 | }\r |
c459aefd |
178 | Pico_mcd->m.busreq = d;\r |
179 | return;\r |
672ad671 |
180 | case 2:\r |
af37bca8 |
181 | elprintf(EL_CDREGS, "m68k: prg wp=%02x", d);\r |
672ad671 |
182 | Pico_mcd->s68k_regs[2] = d; // really use s68k side register\r |
183 | return;\r |
af37bca8 |
184 | case 3:\r |
185 | dold = Pico_mcd->s68k_regs[3];\r |
186 | elprintf(EL_CDREG3, "m68k_regs w3: %02x @%06x", (u8)d, SekPc);\r |
672ad671 |
187 | //if ((Pico_mcd->s68k_regs[3]&4) != (d&4)) dprintf("m68k: ram mode %i mbit", (d&4) ? 1 : 2);\r |
188 | //if ((Pico_mcd->s68k_regs[3]&2) != (d&2)) dprintf("m68k: %s", (d&4) ? ((d&2) ? "word swap req" : "noop?") :\r |
189 | // ((d&2) ? "word ram to s68k" : "word ram to m68k"));\r |
ef090115 |
190 | if (dold & 4) { // 1M mode\r |
191 | d ^= 2; // writing 0 to DMNA actually sets it, 1 does nothing\r |
66fdc0f0 |
192 | } else {\r |
08769494 |
193 | if ((d ^ dold) & d & 2) { // DMNA is being set\r |
ef090115 |
194 | dold &= ~1; // return word RAM to s68k\r |
195 | /* Silpheed hack: bset(w3), r3, btst, bne, r3 */\r |
196 | SekEndRun(20+16+10+12+16);\r |
197 | }\r |
66fdc0f0 |
198 | }\r |
08769494 |
199 | d = (d & 0xc2) | (dold & 0x1f);\r |
af37bca8 |
200 | if ((d ^ dold) & 0xc0) {\r |
08769494 |
201 | elprintf(EL_CDREGS, "m68k: prg bank: %i -> %i",\r |
202 | (Pico_mcd->s68k_regs[a]>>6), ((d>>6)&3));\r |
203 | remap_prg_window(d);\r |
7a1f6e45 |
204 | }\r |
08769494 |
205 | goto write_comm;\r |
c459aefd |
206 | case 6:\r |
d1df8786 |
207 | Pico_mcd->bios[0x72 + 1] = d; // simple hint vector changer\r |
c459aefd |
208 | return;\r |
209 | case 7:\r |
d1df8786 |
210 | Pico_mcd->bios[0x72] = d;\r |
af37bca8 |
211 | elprintf(EL_CDREGS, "hint vector set to %04x%04x",\r |
212 | ((u16 *)Pico_mcd->bios)[0x70/2], ((u16 *)Pico_mcd->bios)[0x72/2]);\r |
c459aefd |
213 | return;\r |
08769494 |
214 | case 0x0f:\r |
7a1f6e45 |
215 | d = (d << 1) | ((d >> 7) & 1); // rol8 1 (special case)\r |
08769494 |
216 | a = 0x0e;\r |
217 | case 0x0e:\r |
218 | goto write_comm;\r |
672ad671 |
219 | }\r |
220 | \r |
08769494 |
221 | if ((a&0xf0) == 0x10)\r |
222 | goto write_comm;\r |
cc68a136 |
223 | \r |
ca61ee42 |
224 | elprintf(EL_UIO, "m68k FIXME: invalid write? [%02x] %02x", a, d);\r |
08769494 |
225 | return;\r |
226 | \r |
227 | write_comm:\r |
228 | if (d == Pico_mcd->s68k_regs[a])\r |
229 | return;\r |
230 | \r |
231 | Pico_mcd->s68k_regs[a] = d;\r |
232 | pcd_sync_s68k(SekCyclesDone(), 0);\r |
233 | if (Pico_mcd->m.s68k_poll_a == a && Pico_mcd->m.s68k_poll_cnt > POLL_LIMIT) {\r |
234 | SekSetStopS68k(0);\r |
235 | Pico_mcd->m.s68k_poll_a = 0;\r |
236 | elprintf(EL_CDPOLL, "s68k poll release, a=%02x", a);\r |
237 | }\r |
cc68a136 |
238 | }\r |
239 | \r |
2433f409 |
240 | #ifndef _ASM_CD_MEMORY_C\r |
241 | static\r |
242 | #endif\r |
243 | u32 s68k_poll_detect(u32 a, u32 d)\r |
244 | {\r |
245 | #ifdef USE_POLL_DETECT\r |
08769494 |
246 | u32 cycles, cnt = 0;\r |
247 | if (SekIsStoppedS68k())\r |
248 | return d;\r |
249 | \r |
250 | cycles = SekCyclesDoneS68k();\r |
251 | if (a == Pico_mcd->m.s68k_poll_a) {\r |
252 | u32 clkdiff = cycles - Pico_mcd->m.s68k_poll_clk;\r |
2433f409 |
253 | if (clkdiff <= POLL_CYCLES) {\r |
08769494 |
254 | cnt = Pico_mcd->m.s68k_poll_cnt + 1;\r |
255 | //printf("-- diff: %u, cnt = %i\n", clkdiff, cnt);\r |
256 | if (Pico_mcd->m.s68k_poll_cnt > POLL_LIMIT) {\r |
2433f409 |
257 | SekSetStopS68k(1);\r |
08769494 |
258 | elprintf(EL_CDPOLL, "s68k poll detected @ %06x, a=%02x",\r |
259 | SekPcS68k, a);\r |
2433f409 |
260 | }\r |
2433f409 |
261 | }\r |
262 | }\r |
08769494 |
263 | Pico_mcd->m.s68k_poll_a = a;\r |
264 | Pico_mcd->m.s68k_poll_clk = cycles;\r |
265 | Pico_mcd->m.s68k_poll_cnt = cnt;\r |
2433f409 |
266 | #endif\r |
267 | return d;\r |
268 | }\r |
cc68a136 |
269 | \r |
913ef4b7 |
270 | #define READ_FONT_DATA(basemask) \\r |
271 | { \\r |
272 | unsigned int fnt = *(unsigned int *)(Pico_mcd->s68k_regs + 0x4c); \\r |
273 | unsigned int col0 = (fnt >> 8) & 0x0f, col1 = (fnt >> 12) & 0x0f; \\r |
274 | if (fnt & (basemask << 0)) d = col1 ; else d = col0; \\r |
275 | if (fnt & (basemask << 1)) d |= col1 << 4; else d |= col0 << 4; \\r |
276 | if (fnt & (basemask << 2)) d |= col1 << 8; else d |= col0 << 8; \\r |
277 | if (fnt & (basemask << 3)) d |= col1 << 12; else d |= col0 << 12; \\r |
278 | }\r |
279 | \r |
cc68a136 |
280 | \r |
4ff2d527 |
281 | #ifndef _ASM_CD_MEMORY_C\r |
282 | static\r |
283 | #endif\r |
284 | u32 s68k_reg_read16(u32 a)\r |
cc68a136 |
285 | {\r |
286 | u32 d=0;\r |
cc68a136 |
287 | \r |
cc68a136 |
288 | switch (a) {\r |
289 | case 0:\r |
7a1f6e45 |
290 | return ((Pico_mcd->s68k_regs[0]&3)<<8) | 1; // ver = 0, not in reset state\r |
672ad671 |
291 | case 2:\r |
2433f409 |
292 | d = (Pico_mcd->s68k_regs[2]<<8) | (Pico_mcd->s68k_regs[3]&0x1f);\r |
af37bca8 |
293 | elprintf(EL_CDREG3, "s68k_regs r3: %02x @%06x", (u8)d, SekPcS68k);\r |
2433f409 |
294 | return s68k_poll_detect(a, d);\r |
cc68a136 |
295 | case 6:\r |
7a1f6e45 |
296 | return CDC_Read_Reg();\r |
cc68a136 |
297 | case 8:\r |
7a1f6e45 |
298 | return Read_CDC_Host(1); // Gens returns 0 here on byte reads\r |
cc68a136 |
299 | case 0xC:\r |
ae214f1c |
300 | d = SekCyclesDoneS68k() - Pico_mcd->m.stopwatch_base_c;\r |
301 | d /= 384;\r |
302 | d &= 0x0fff;\r |
af37bca8 |
303 | elprintf(EL_CDREGS, "s68k stopwatch timer read (%04x)", d);\r |
7a1f6e45 |
304 | return d;\r |
d1df8786 |
305 | case 0x30:\r |
af37bca8 |
306 | elprintf(EL_CDREGS, "s68k int3 timer read (%02x)", Pico_mcd->s68k_regs[31]);\r |
7a1f6e45 |
307 | return Pico_mcd->s68k_regs[31];\r |
cc68a136 |
308 | case 0x34: // fader\r |
7a1f6e45 |
309 | return 0; // no busy bit\r |
913ef4b7 |
310 | case 0x50: // font data (check: Lunar 2, Silpheed)\r |
311 | READ_FONT_DATA(0x00100000);\r |
7a1f6e45 |
312 | return d;\r |
913ef4b7 |
313 | case 0x52:\r |
314 | READ_FONT_DATA(0x00010000);\r |
7a1f6e45 |
315 | return d;\r |
913ef4b7 |
316 | case 0x54:\r |
317 | READ_FONT_DATA(0x10000000);\r |
7a1f6e45 |
318 | return d;\r |
913ef4b7 |
319 | case 0x56:\r |
320 | READ_FONT_DATA(0x01000000);\r |
7a1f6e45 |
321 | return d;\r |
cc68a136 |
322 | }\r |
323 | \r |
324 | d = (Pico_mcd->s68k_regs[a]<<8) | Pico_mcd->s68k_regs[a+1];\r |
325 | \r |
2433f409 |
326 | if (a >= 0x0e && a < 0x30)\r |
327 | return s68k_poll_detect(a, d);\r |
7a1f6e45 |
328 | \r |
cc68a136 |
329 | return d;\r |
330 | }\r |
331 | \r |
4ff2d527 |
332 | #ifndef _ASM_CD_MEMORY_C\r |
333 | static\r |
334 | #endif\r |
335 | void s68k_reg_write8(u32 a, u32 d)\r |
cc68a136 |
336 | {\r |
48e8482f |
337 | // Warning: d might have upper bits set\r |
cc68a136 |
338 | switch (a) {\r |
672ad671 |
339 | case 2:\r |
340 | return; // only m68k can change WP\r |
fa1e5e29 |
341 | case 3: {\r |
342 | int dold = Pico_mcd->s68k_regs[3];\r |
af37bca8 |
343 | elprintf(EL_CDREG3, "s68k_regs w3: %02x @%06x", (u8)d, SekPcS68k);\r |
672ad671 |
344 | d &= 0x1d;\r |
af37bca8 |
345 | d |= dold & 0xc2;\r |
346 | if (d & 4)\r |
39230401 |
347 | {\r |
0ace9b9a |
348 | if ((d ^ dold) & 0x1d) {\r |
4ff2d527 |
349 | d &= ~2; // in case of mode or bank change we clear DMNA (m68k req) bit\r |
0ace9b9a |
350 | remap_word_ram(d);\r |
4ff2d527 |
351 | }\r |
fa1e5e29 |
352 | if (!(dold & 4)) {\r |
af37bca8 |
353 | elprintf(EL_CDREG3, "wram mode 2M->1M");\r |
fa1e5e29 |
354 | wram_2M_to_1M(Pico_mcd->word_ram2M);\r |
4ff2d527 |
355 | }\r |
39230401 |
356 | }\r |
357 | else\r |
358 | {\r |
fa1e5e29 |
359 | if (dold & 4) {\r |
af37bca8 |
360 | elprintf(EL_CDREG3, "wram mode 1M->2M");\r |
4ff2d527 |
361 | if (!(d&1)) { // it didn't set the ret bit, which means it doesn't want to give WRAM to m68k\r |
362 | d &= ~3;\r |
363 | d |= (dold&1) ? 2 : 1; // then give it to the one which had bank0 in 1M mode\r |
364 | }\r |
fa1e5e29 |
365 | wram_1M_to_2M(Pico_mcd->word_ram2M);\r |
0ace9b9a |
366 | remap_word_ram(d);\r |
4ff2d527 |
367 | }\r |
ef090115 |
368 | // s68k can only set RET, writing 0 has no effect\r |
07ceafdb |
369 | else if ((dold ^ d) & d & 1) { // RET being set\r |
370 | SekEndRunS68k(20+16+10+12+16); // see DMNA case\r |
371 | } else\r |
372 | d |= dold & 1;\r |
373 | if (d & 1)\r |
374 | d &= ~2; // DMNA clears\r |
d0d47c5b |
375 | }\r |
08769494 |
376 | goto write_comm;\r |
fa1e5e29 |
377 | }\r |
cc68a136 |
378 | case 4:\r |
af37bca8 |
379 | elprintf(EL_CDREGS, "s68k CDC dest: %x", d&7);\r |
cc68a136 |
380 | Pico_mcd->s68k_regs[4] = (Pico_mcd->s68k_regs[4]&0xC0) | (d&7); // CDC mode\r |
381 | return;\r |
382 | case 5:\r |
c459aefd |
383 | //dprintf("s68k CDC reg addr: %x", d&0xf);\r |
cc68a136 |
384 | break;\r |
385 | case 7:\r |
386 | CDC_Write_Reg(d);\r |
387 | return;\r |
388 | case 0xa:\r |
af37bca8 |
389 | elprintf(EL_CDREGS, "s68k set CDC dma addr");\r |
cc68a136 |
390 | break;\r |
d1df8786 |
391 | case 0xc:\r |
ae214f1c |
392 | case 0xd: // 384 cycle stopwatch timer\r |
393 | elprintf(EL_CDREGS|EL_CD, "s68k clear stopwatch (%x)", d);\r |
394 | // does this also reset internal 384 cycle counter?\r |
395 | Pico_mcd->m.stopwatch_base_c = SekCyclesDoneS68k();\r |
4f265db7 |
396 | return;\r |
08769494 |
397 | case 0x0e:\r |
398 | d &= 0xff;\r |
bc3c13d3 |
399 | d = (d>>1) | (d<<7); // ror8 1, Gens note: Dragons lair\r |
08769494 |
400 | a = 0x0f;\r |
401 | case 0x0f:\r |
402 | goto write_comm;\r |
ae214f1c |
403 | case 0x31: // 384 cycle int3 timer\r |
404 | d &= 0xff;\r |
405 | elprintf(EL_CDREGS|EL_CD, "s68k set int3 timer: %02x", d);\r |
406 | Pico_mcd->s68k_regs[a] = (u8) d;\r |
407 | if (d) // d or d+1??\r |
408 | pcd_event_schedule_s68k(PCD_EVENT_TIMER3, d * 384);\r |
409 | else\r |
410 | pcd_event_schedule(0, PCD_EVENT_TIMER3, 0);\r |
d1df8786 |
411 | break;\r |
cc68a136 |
412 | case 0x33: // IRQ mask\r |
ae214f1c |
413 | elprintf(EL_CDREGS|EL_CD, "s68k irq mask: %02x", d);\r |
414 | d &= 0x7e;\r |
415 | if ((d ^ Pico_mcd->s68k_regs[0x33]) & d & PCDS_IEN4) {\r |
416 | if (Pico_mcd->s68k_regs[0x37] & 4)\r |
417 | CDD_Export_Status();\r |
cc68a136 |
418 | }\r |
419 | break;\r |
420 | case 0x34: // fader\r |
421 | Pico_mcd->s68k_regs[a] = (u8) d & 0x7f;\r |
422 | return;\r |
672ad671 |
423 | case 0x36:\r |
424 | return; // d/m bit is unsetable\r |
425 | case 0x37: {\r |
426 | u32 d_old = Pico_mcd->s68k_regs[0x37];\r |
427 | Pico_mcd->s68k_regs[0x37] = d&7;\r |
428 | if ((d&4) && !(d_old&4)) {\r |
cc68a136 |
429 | CDD_Export_Status();\r |
cc68a136 |
430 | }\r |
672ad671 |
431 | return;\r |
432 | }\r |
cc68a136 |
433 | case 0x4b:\r |
434 | Pico_mcd->s68k_regs[a] = (u8) d;\r |
435 | CDD_Import_Command();\r |
436 | return;\r |
437 | }\r |
438 | \r |
08769494 |
439 | if ((a&0x1f0) == 0x20)\r |
440 | goto write_comm;\r |
441 | \r |
1cd356a3 |
442 | if ((a&0x1f0) == 0x10 || (a >= 0x38 && a < 0x42))\r |
cc68a136 |
443 | {\r |
ca61ee42 |
444 | elprintf(EL_UIO, "s68k FIXME: invalid write @ %02x?", a);\r |
cc68a136 |
445 | return;\r |
446 | }\r |
447 | \r |
08769494 |
448 | Pico_mcd->s68k_regs[a] = (u8) d;\r |
449 | return;\r |
bc3c13d3 |
450 | \r |
08769494 |
451 | write_comm:\r |
cc68a136 |
452 | Pico_mcd->s68k_regs[a] = (u8) d;\r |
08769494 |
453 | if (Pico_mcd->m.m68k_poll_cnt)\r |
454 | SekEndRunS68k(0);\r |
455 | Pico_mcd->m.m68k_poll_cnt = 0;\r |
cc68a136 |
456 | }\r |
457 | \r |
af37bca8 |
458 | // -----------------------------------------------------------------\r |
459 | // Main 68k\r |
460 | // -----------------------------------------------------------------\r |
cc68a136 |
461 | \r |
af37bca8 |
462 | #ifndef _ASM_CD_MEMORY_C\r |
463 | #include "cell_map.c"\r |
af37bca8 |
464 | \r |
465 | // WORD RAM, cell aranged area (220000 - 23ffff)\r |
0ace9b9a |
466 | static u32 PicoReadM68k8_cell0(u32 a)\r |
cc68a136 |
467 | {\r |
af37bca8 |
468 | a = (a&3) | (cell_map(a >> 2) << 2); // cell arranged\r |
0ace9b9a |
469 | return Pico_mcd->word_ram1M[0][a ^ 1];\r |
470 | }\r |
471 | \r |
472 | static u32 PicoReadM68k8_cell1(u32 a)\r |
473 | {\r |
474 | a = (a&3) | (cell_map(a >> 2) << 2);\r |
475 | return Pico_mcd->word_ram1M[1][a ^ 1];\r |
476 | }\r |
477 | \r |
478 | static u32 PicoReadM68k16_cell0(u32 a)\r |
479 | {\r |
480 | a = (a&2) | (cell_map(a >> 2) << 2);\r |
481 | return *(u16 *)(Pico_mcd->word_ram1M[0] + a);\r |
af37bca8 |
482 | }\r |
cc68a136 |
483 | \r |
0ace9b9a |
484 | static u32 PicoReadM68k16_cell1(u32 a)\r |
af37bca8 |
485 | {\r |
af37bca8 |
486 | a = (a&2) | (cell_map(a >> 2) << 2);\r |
0ace9b9a |
487 | return *(u16 *)(Pico_mcd->word_ram1M[1] + a);\r |
af37bca8 |
488 | }\r |
cc68a136 |
489 | \r |
0ace9b9a |
490 | static void PicoWriteM68k8_cell0(u32 a, u32 d)\r |
af37bca8 |
491 | {\r |
af37bca8 |
492 | a = (a&3) | (cell_map(a >> 2) << 2);\r |
0ace9b9a |
493 | Pico_mcd->word_ram1M[0][a ^ 1] = d;\r |
af37bca8 |
494 | }\r |
8022f53d |
495 | \r |
0ace9b9a |
496 | static void PicoWriteM68k8_cell1(u32 a, u32 d)\r |
af37bca8 |
497 | {\r |
af37bca8 |
498 | a = (a&3) | (cell_map(a >> 2) << 2);\r |
0ace9b9a |
499 | Pico_mcd->word_ram1M[1][a ^ 1] = d;\r |
af37bca8 |
500 | }\r |
501 | \r |
0ace9b9a |
502 | static void PicoWriteM68k16_cell0(u32 a, u32 d)\r |
503 | {\r |
504 | a = (a&3) | (cell_map(a >> 2) << 2);\r |
505 | *(u16 *)(Pico_mcd->word_ram1M[0] + a) = d;\r |
506 | }\r |
507 | \r |
508 | static void PicoWriteM68k16_cell1(u32 a, u32 d)\r |
509 | {\r |
510 | a = (a&3) | (cell_map(a >> 2) << 2);\r |
511 | *(u16 *)(Pico_mcd->word_ram1M[1] + a) = d;\r |
512 | }\r |
513 | #endif\r |
514 | \r |
af37bca8 |
515 | // RAM cart (40000 - 7fffff, optional)\r |
516 | static u32 PicoReadM68k8_ramc(u32 a)\r |
517 | {\r |
518 | u32 d = 0;\r |
519 | if (a == 0x400001) {\r |
520 | if (SRam.data != NULL)\r |
521 | d = 3; // 64k cart\r |
522 | return d;\r |
8022f53d |
523 | }\r |
524 | \r |
af37bca8 |
525 | if ((a & 0xfe0000) == 0x600000) {\r |
526 | if (SRam.data != NULL)\r |
527 | d = SRam.data[((a >> 1) & 0xffff) + 0x2000];\r |
528 | return d;\r |
8022f53d |
529 | }\r |
530 | \r |
af37bca8 |
531 | if (a == 0x7fffff)\r |
532 | return Pico_mcd->m.bcram_reg;\r |
cc68a136 |
533 | \r |
af37bca8 |
534 | elprintf(EL_UIO, "m68k unmapped r8 [%06x] @%06x", a, SekPc);\r |
cc68a136 |
535 | return d;\r |
536 | }\r |
537 | \r |
af37bca8 |
538 | static u32 PicoReadM68k16_ramc(u32 a)\r |
cc68a136 |
539 | {\r |
af37bca8 |
540 | elprintf(EL_ANOMALY, "ramcart r16: [%06x] @%06x", a, SekPcS68k);\r |
541 | return PicoReadM68k8_ramc(a + 1);\r |
542 | }\r |
cc68a136 |
543 | \r |
af37bca8 |
544 | static void PicoWriteM68k8_ramc(u32 a, u32 d)\r |
545 | {\r |
546 | if ((a & 0xfe0000) == 0x600000) {\r |
547 | if (SRam.data != NULL && (Pico_mcd->m.bcram_reg & 1)) {\r |
548 | SRam.data[((a>>1) & 0xffff) + 0x2000] = d;\r |
8022f53d |
549 | SRam.changed = 1;\r |
550 | }\r |
551 | return;\r |
552 | }\r |
553 | \r |
af37bca8 |
554 | if (a == 0x7fffff) {\r |
555 | Pico_mcd->m.bcram_reg = d;\r |
8022f53d |
556 | return;\r |
557 | }\r |
558 | \r |
af37bca8 |
559 | elprintf(EL_UIO, "m68k unmapped w8 [%06x] %02x @%06x", a, d & 0xff, SekPc);\r |
cc68a136 |
560 | }\r |
561 | \r |
af37bca8 |
562 | static void PicoWriteM68k16_ramc(u32 a, u32 d)\r |
cc68a136 |
563 | {\r |
af37bca8 |
564 | elprintf(EL_ANOMALY, "ramcart w16: [%06x] %04x @%06x", a, d, SekPcS68k);\r |
565 | PicoWriteM68k8_ramc(a + 1, d);\r |
cc68a136 |
566 | }\r |
567 | \r |
af37bca8 |
568 | // IO/control/cd registers (a10000 - ...)\r |
0ace9b9a |
569 | #ifndef _ASM_CD_MEMORY_C\r |
af37bca8 |
570 | static u32 PicoReadM68k8_io(u32 a)\r |
cc68a136 |
571 | {\r |
af37bca8 |
572 | u32 d;\r |
573 | if ((a & 0xff00) == 0x2000) { // a12000 - a120ff\r |
574 | d = m68k_reg_read16(a); // TODO: m68k_reg_read8\r |
575 | if (!(a & 1))\r |
576 | d >>= 8;\r |
577 | d &= 0xff;\r |
578 | elprintf(EL_CDREGS, "m68k_regs r8: [%02x] %02x @%06x", a & 0x3f, d, SekPc);\r |
579 | return d;\r |
580 | }\r |
581 | \r |
582 | // fallback to default MD handler\r |
583 | return PicoRead8_io(a);\r |
cc68a136 |
584 | }\r |
585 | \r |
af37bca8 |
586 | static u32 PicoReadM68k16_io(u32 a)\r |
cc68a136 |
587 | {\r |
af37bca8 |
588 | u32 d;\r |
589 | if ((a & 0xff00) == 0x2000) {\r |
590 | d = m68k_reg_read16(a);\r |
591 | elprintf(EL_CDREGS, "m68k_regs r16: [%02x] %04x @%06x", a & 0x3f, d, SekPc);\r |
592 | return d;\r |
b542be46 |
593 | }\r |
cc68a136 |
594 | \r |
af37bca8 |
595 | return PicoRead16_io(a);\r |
cc68a136 |
596 | }\r |
597 | \r |
af37bca8 |
598 | static void PicoWriteM68k8_io(u32 a, u32 d)\r |
cc68a136 |
599 | {\r |
af37bca8 |
600 | if ((a & 0xff00) == 0x2000) { // a12000 - a120ff\r |
601 | elprintf(EL_CDREGS, "m68k_regs w8: [%02x] %02x @%06x", a&0x3f, d, SekPc);\r |
2433f409 |
602 | m68k_reg_write8(a, d);\r |
603 | return;\r |
604 | }\r |
672ad671 |
605 | \r |
af37bca8 |
606 | PicoWrite16_io(a, d);\r |
cc68a136 |
607 | }\r |
ab0607f7 |
608 | \r |
af37bca8 |
609 | static void PicoWriteM68k16_io(u32 a, u32 d)\r |
cc68a136 |
610 | {\r |
af37bca8 |
611 | if ((a & 0xff00) == 0x2000) { // a12000 - a120ff\r |
612 | elprintf(EL_CDREGS, "m68k_regs w16: [%02x] %04x @%06x", a&0x3f, d, SekPc);\r |
08769494 |
613 | \r |
af37bca8 |
614 | m68k_reg_write8(a, d >> 8);\r |
08769494 |
615 | if ((a & 0x3e) != 0x0e) // special case\r |
616 | m68k_reg_write8(a + 1, d & 0xff);\r |
b542be46 |
617 | return;\r |
618 | }\r |
619 | \r |
af37bca8 |
620 | PicoWrite16_io(a, d);\r |
cc68a136 |
621 | }\r |
0ace9b9a |
622 | #endif\r |
cc68a136 |
623 | \r |
721cd396 |
624 | // -----------------------------------------------------------------\r |
af37bca8 |
625 | // Sub 68k\r |
cc68a136 |
626 | // -----------------------------------------------------------------\r |
627 | \r |
af37bca8 |
628 | static u32 s68k_unmapped_read8(u32 a)\r |
cc68a136 |
629 | {\r |
af37bca8 |
630 | elprintf(EL_UIO, "s68k unmapped r8 [%06x] @%06x", a, SekPc);\r |
631 | return 0;\r |
cc68a136 |
632 | }\r |
633 | \r |
af37bca8 |
634 | static u32 s68k_unmapped_read16(u32 a)\r |
cc68a136 |
635 | {\r |
af37bca8 |
636 | elprintf(EL_UIO, "s68k unmapped r16 [%06x] @%06x", a, SekPc);\r |
637 | return 0;\r |
638 | }\r |
4f265db7 |
639 | \r |
af37bca8 |
640 | static void s68k_unmapped_write8(u32 a, u32 d)\r |
641 | {\r |
642 | elprintf(EL_UIO, "s68k unmapped w8 [%06x] %02x @%06x", a, d & 0xff, SekPc);\r |
643 | }\r |
cc68a136 |
644 | \r |
af37bca8 |
645 | static void s68k_unmapped_write16(u32 a, u32 d)\r |
646 | {\r |
647 | elprintf(EL_UIO, "s68k unmapped w16 [%06x] %04x @%06x", a, d & 0xffff, SekPc);\r |
648 | }\r |
cc68a136 |
649 | \r |
0ace9b9a |
650 | // PRG RAM protected range (000000 - 00ff00)?\r |
651 | // XXX verify: ff00 or 1fe00 max?\r |
652 | static void PicoWriteS68k8_prgwp(u32 a, u32 d)\r |
653 | {\r |
654 | if (a >= (Pico_mcd->s68k_regs[2] << 8))\r |
655 | Pico_mcd->prg_ram[a ^ 1] = d;\r |
656 | }\r |
657 | \r |
658 | static void PicoWriteS68k16_prgwp(u32 a, u32 d)\r |
659 | {\r |
660 | if (a >= (Pico_mcd->s68k_regs[2] << 8))\r |
661 | *(u16 *)(Pico_mcd->prg_ram + a) = d;\r |
662 | }\r |
663 | \r |
664 | #ifndef _ASM_CD_MEMORY_C\r |
665 | \r |
af37bca8 |
666 | // decode (080000 - 0bffff, in 1M mode)\r |
0ace9b9a |
667 | static u32 PicoReadS68k8_dec0(u32 a)\r |
668 | {\r |
669 | u32 d = Pico_mcd->word_ram1M[0][((a >> 1) ^ 1) & 0x1ffff];\r |
670 | if (a & 1)\r |
671 | d &= 0x0f;\r |
672 | else\r |
673 | d >>= 4;\r |
674 | return d;\r |
675 | }\r |
676 | \r |
677 | static u32 PicoReadS68k8_dec1(u32 a)\r |
af37bca8 |
678 | {\r |
0ace9b9a |
679 | u32 d = Pico_mcd->word_ram1M[1][((a >> 1) ^ 1) & 0x1ffff];\r |
af37bca8 |
680 | if (a & 1)\r |
681 | d &= 0x0f;\r |
682 | else\r |
683 | d >>= 4;\r |
cc68a136 |
684 | return d;\r |
685 | }\r |
686 | \r |
0ace9b9a |
687 | static u32 PicoReadS68k16_dec0(u32 a)\r |
cc68a136 |
688 | {\r |
0ace9b9a |
689 | u32 d = Pico_mcd->word_ram1M[0][((a >> 1) ^ 1) & 0x1ffff];\r |
af37bca8 |
690 | d |= d << 4;\r |
691 | d &= ~0xf0;\r |
cc68a136 |
692 | return d;\r |
693 | }\r |
ab0607f7 |
694 | \r |
0ace9b9a |
695 | static u32 PicoReadS68k16_dec1(u32 a)\r |
0a051f55 |
696 | {\r |
0ace9b9a |
697 | u32 d = Pico_mcd->word_ram1M[1][((a >> 1) ^ 1) & 0x1ffff];\r |
698 | d |= d << 4;\r |
699 | d &= ~0xf0;\r |
700 | return d;\r |
0a051f55 |
701 | }\r |
702 | \r |
0ace9b9a |
703 | /* check: jaguar xj 220 (draws entire world using decode) */\r |
704 | #define mk_decode_w8(bank) \\r |
705 | static void PicoWriteS68k8_dec_m0b##bank(u32 a, u32 d) \\r |
706 | { \\r |
707 | u8 *pd = &Pico_mcd->word_ram1M[bank][((a >> 1) ^ 1) & 0x1ffff]; \\r |
708 | \\r |
709 | if (!(a & 1)) \\r |
710 | *pd = (*pd & 0x0f) | (d << 4); \\r |
711 | else \\r |
712 | *pd = (*pd & 0xf0) | (d & 0x0f); \\r |
713 | } \\r |
714 | \\r |
715 | static void PicoWriteS68k8_dec_m1b##bank(u32 a, u32 d) \\r |
716 | { \\r |
717 | u8 *pd = &Pico_mcd->word_ram1M[bank][((a >> 1) ^ 1) & 0x1ffff]; \\r |
718 | u8 mask = (a & 1) ? 0x0f : 0xf0; \\r |
719 | \\r |
720 | if (!(*pd & mask) && (d & 0x0f)) /* underwrite */ \\r |
721 | PicoWriteS68k8_dec_m0b##bank(a, d); \\r |
722 | } \\r |
723 | \\r |
724 | static void PicoWriteS68k8_dec_m2b##bank(u32 a, u32 d) /* ...and m3? */ \\r |
725 | { \\r |
726 | if (d & 0x0f) /* overwrite */ \\r |
727 | PicoWriteS68k8_dec_m0b##bank(a, d); \\r |
728 | }\r |
0a051f55 |
729 | \r |
0ace9b9a |
730 | mk_decode_w8(0)\r |
731 | mk_decode_w8(1)\r |
732 | \r |
733 | #define mk_decode_w16(bank) \\r |
734 | static void PicoWriteS68k16_dec_m0b##bank(u32 a, u32 d) \\r |
735 | { \\r |
736 | u8 *pd = &Pico_mcd->word_ram1M[bank][((a >> 1) ^ 1) & 0x1ffff]; \\r |
737 | \\r |
738 | d &= 0x0f0f; \\r |
739 | *pd = d | (d >> 4); \\r |
740 | } \\r |
741 | \\r |
742 | static void PicoWriteS68k16_dec_m1b##bank(u32 a, u32 d) \\r |
743 | { \\r |
744 | u8 *pd = &Pico_mcd->word_ram1M[bank][((a >> 1) ^ 1) & 0x1ffff]; \\r |
745 | \\r |
746 | d &= 0x0f0f; /* underwrite */ \\r |
747 | if (!(*pd & 0xf0)) *pd |= d >> 4; \\r |
748 | if (!(*pd & 0x0f)) *pd |= d; \\r |
749 | } \\r |
750 | \\r |
751 | static void PicoWriteS68k16_dec_m2b##bank(u32 a, u32 d) \\r |
752 | { \\r |
753 | u8 *pd = &Pico_mcd->word_ram1M[bank][((a >> 1) ^ 1) & 0x1ffff]; \\r |
754 | \\r |
755 | d &= 0x0f0f; /* overwrite */ \\r |
756 | d |= d >> 4; \\r |
757 | \\r |
758 | if (!(d & 0xf0)) d |= *pd & 0xf0; \\r |
759 | if (!(d & 0x0f)) d |= *pd & 0x0f; \\r |
760 | *pd = d; \\r |
761 | }\r |
0a051f55 |
762 | \r |
0ace9b9a |
763 | mk_decode_w16(0)\r |
764 | mk_decode_w16(1)\r |
0a051f55 |
765 | \r |
0ace9b9a |
766 | #endif\r |
0a051f55 |
767 | \r |
af37bca8 |
768 | // backup RAM (fe0000 - feffff)\r |
769 | static u32 PicoReadS68k8_bram(u32 a)\r |
770 | {\r |
771 | return Pico_mcd->bram[(a>>1)&0x1fff];\r |
772 | }\r |
cc68a136 |
773 | \r |
af37bca8 |
774 | static u32 PicoReadS68k16_bram(u32 a)\r |
cc68a136 |
775 | {\r |
af37bca8 |
776 | u32 d;\r |
777 | elprintf(EL_ANOMALY, "FIXME: s68k_bram r16: [%06x] @%06x", a, SekPcS68k);\r |
778 | a = (a >> 1) & 0x1fff;\r |
779 | d = Pico_mcd->bram[a++];\r |
780 | d|= Pico_mcd->bram[a++] << 8; // probably wrong, TODO: verify\r |
781 | return d;\r |
782 | }\r |
cc68a136 |
783 | \r |
af37bca8 |
784 | static void PicoWriteS68k8_bram(u32 a, u32 d)\r |
785 | {\r |
786 | Pico_mcd->bram[(a >> 1) & 0x1fff] = d;\r |
787 | SRam.changed = 1;\r |
788 | }\r |
cc68a136 |
789 | \r |
af37bca8 |
790 | static void PicoWriteS68k16_bram(u32 a, u32 d)\r |
791 | {\r |
792 | elprintf(EL_ANOMALY, "s68k_bram w16: [%06x] %04x @%06x", a, d, SekPcS68k);\r |
793 | a = (a >> 1) & 0x1fff;\r |
794 | Pico_mcd->bram[a++] = d;\r |
795 | Pico_mcd->bram[a++] = d >> 8; // TODO: verify..\r |
796 | SRam.changed = 1;\r |
797 | }\r |
b5e5172d |
798 | \r |
0ace9b9a |
799 | #ifndef _ASM_CD_MEMORY_C\r |
800 | \r |
af37bca8 |
801 | // PCM and registers (ff0000 - ffffff)\r |
802 | static u32 PicoReadS68k8_pr(u32 a)\r |
803 | {\r |
804 | u32 d = 0;\r |
cc68a136 |
805 | \r |
806 | // regs\r |
af37bca8 |
807 | if ((a & 0xfe00) == 0x8000) {\r |
cb4a513a |
808 | a &= 0x1ff;\r |
af37bca8 |
809 | elprintf(EL_CDREGS, "s68k_regs r8: [%02x] @ %06x", a, SekPcS68k);\r |
810 | if (a >= 0x0e && a < 0x30) {\r |
811 | d = Pico_mcd->s68k_regs[a];\r |
812 | s68k_poll_detect(a, d);\r |
813 | elprintf(EL_CDREGS, "ret = %02x", (u8)d);\r |
814 | return d;\r |
d0d47c5b |
815 | }\r |
af37bca8 |
816 | else if (a >= 0x58 && a < 0x68)\r |
817 | d = gfx_cd_read(a & ~1);\r |
818 | else d = s68k_reg_read16(a & ~1);\r |
819 | if (!(a & 1))\r |
820 | d >>= 8;\r |
821 | elprintf(EL_CDREGS, "ret = %02x", (u8)d);\r |
822 | return d & 0xff;\r |
d0d47c5b |
823 | }\r |
824 | \r |
4f265db7 |
825 | // PCM\r |
0ace9b9a |
826 | // XXX: verify: probably odd addrs only?\r |
af37bca8 |
827 | if ((a & 0x8000) == 0x0000) {\r |
4f265db7 |
828 | a &= 0x7fff;\r |
829 | if (a >= 0x2000)\r |
af37bca8 |
830 | d = Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a >> 1) & 0xfff];\r |
831 | else if (a >= 0x20) {\r |
832 | a &= 0x1e;\r |
833 | d = Pico_mcd->pcm.ch[a>>2].addr >> PCM_STEP_SHIFT;\r |
834 | if (a & 2)\r |
835 | d >>= 8;\r |
836 | }\r |
837 | return d & 0xff;\r |
ab0607f7 |
838 | }\r |
839 | \r |
af37bca8 |
840 | return s68k_unmapped_read8(a);\r |
cc68a136 |
841 | }\r |
842 | \r |
af37bca8 |
843 | static u32 PicoReadS68k16_pr(u32 a)\r |
cc68a136 |
844 | {\r |
af37bca8 |
845 | u32 d = 0;\r |
cc68a136 |
846 | \r |
847 | // regs\r |
af37bca8 |
848 | if ((a & 0xfe00) == 0x8000) {\r |
cb4a513a |
849 | a &= 0x1fe;\r |
af37bca8 |
850 | elprintf(EL_CDREGS, "s68k_regs r16: [%02x] @ %06x", a, SekPcS68k);\r |
851 | if (0x58 <= a && a < 0x68)\r |
852 | d = gfx_cd_read(a);\r |
853 | else d = s68k_reg_read16(a);\r |
854 | elprintf(EL_CDREGS, "ret = %04x", d);\r |
855 | return d;\r |
cc68a136 |
856 | }\r |
857 | \r |
af37bca8 |
858 | // PCM\r |
859 | if ((a & 0x8000) == 0x0000) {\r |
860 | //elprintf(EL_ANOMALY, "FIXME: s68k_pcm r16: [%06x] @%06x", a, SekPcS68k);\r |
861 | a &= 0x7fff;\r |
862 | if (a >= 0x2000)\r |
863 | d = Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff];\r |
864 | else if (a >= 0x20) {\r |
865 | a &= 0x1e;\r |
866 | d = Pico_mcd->pcm.ch[a>>2].addr >> PCM_STEP_SHIFT;\r |
867 | if (a & 2) d >>= 8;\r |
d0d47c5b |
868 | }\r |
af37bca8 |
869 | elprintf(EL_CDREGS, "ret = %04x", d);\r |
870 | return d;\r |
d0d47c5b |
871 | }\r |
872 | \r |
af37bca8 |
873 | return s68k_unmapped_read16(a);\r |
874 | }\r |
875 | \r |
876 | static void PicoWriteS68k8_pr(u32 a, u32 d)\r |
877 | {\r |
878 | // regs\r |
879 | if ((a & 0xfe00) == 0x8000) {\r |
880 | a &= 0x1ff;\r |
881 | elprintf(EL_CDREGS, "s68k_regs w8: [%02x] %02x @ %06x", a, d, SekPcS68k);\r |
882 | if (0x58 <= a && a < 0x68)\r |
883 | gfx_cd_write16(a&~1, (d<<8)|d);\r |
884 | else s68k_reg_write8(a,d);\r |
d0d47c5b |
885 | return;\r |
886 | }\r |
887 | \r |
4f265db7 |
888 | // PCM\r |
af37bca8 |
889 | if ((a & 0x8000) == 0x0000) {\r |
4f265db7 |
890 | a &= 0x7fff;\r |
891 | if (a >= 0x2000)\r |
892 | Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff] = d;\r |
893 | else if (a < 0x12)\r |
af37bca8 |
894 | pcm_write(a>>1, d);\r |
ab0607f7 |
895 | return;\r |
896 | }\r |
897 | \r |
af37bca8 |
898 | s68k_unmapped_write8(a, d);\r |
cc68a136 |
899 | }\r |
ab0607f7 |
900 | \r |
af37bca8 |
901 | static void PicoWriteS68k16_pr(u32 a, u32 d)\r |
cc68a136 |
902 | {\r |
cc68a136 |
903 | // regs\r |
af37bca8 |
904 | if ((a & 0xfe00) == 0x8000) {\r |
cb4a513a |
905 | a &= 0x1fe;\r |
af37bca8 |
906 | elprintf(EL_CDREGS, "s68k_regs w16: [%02x] %04x @ %06x", a, d, SekPcS68k);\r |
907 | if (a >= 0x58 && a < 0x68)\r |
908 | gfx_cd_write16(a, d);\r |
909 | else {\r |
910 | if (a == 0xe) {\r |
911 | // special case, 2 byte writes would be handled differently\r |
912 | // TODO: verify\r |
913 | Pico_mcd->s68k_regs[0xf] = d;\r |
914 | return;\r |
915 | }\r |
916 | s68k_reg_write8(a, d >> 8);\r |
917 | s68k_reg_write8(a + 1, d & 0xff);\r |
d0d47c5b |
918 | }\r |
919 | return;\r |
920 | }\r |
921 | \r |
4f265db7 |
922 | // PCM\r |
af37bca8 |
923 | if ((a & 0x8000) == 0x0000) {\r |
4f265db7 |
924 | a &= 0x7fff;\r |
af37bca8 |
925 | if (a >= 0x2000)\r |
926 | Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff] = d;\r |
927 | else if (a < 0x12)\r |
928 | pcm_write(a>>1, d & 0xff);\r |
ab0607f7 |
929 | return;\r |
930 | }\r |
931 | \r |
af37bca8 |
932 | s68k_unmapped_write16(a, d);\r |
cc68a136 |
933 | }\r |
cc68a136 |
934 | \r |
0ace9b9a |
935 | #endif\r |
936 | \r |
937 | static const void *m68k_cell_read8[] = { PicoReadM68k8_cell0, PicoReadM68k8_cell1 };\r |
938 | static const void *m68k_cell_read16[] = { PicoReadM68k16_cell0, PicoReadM68k16_cell1 };\r |
939 | static const void *m68k_cell_write8[] = { PicoWriteM68k8_cell0, PicoWriteM68k8_cell1 };\r |
940 | static const void *m68k_cell_write16[] = { PicoWriteM68k16_cell0, PicoWriteM68k16_cell1 };\r |
941 | \r |
942 | static const void *s68k_dec_read8[] = { PicoReadS68k8_dec0, PicoReadS68k8_dec1 };\r |
943 | static const void *s68k_dec_read16[] = { PicoReadS68k16_dec0, PicoReadS68k16_dec1 };\r |
944 | \r |
945 | static const void *s68k_dec_write8[2][4] = {\r |
946 | { PicoWriteS68k8_dec_m0b0, PicoWriteS68k8_dec_m1b0, PicoWriteS68k8_dec_m2b0, PicoWriteS68k8_dec_m2b0 },\r |
947 | { PicoWriteS68k8_dec_m0b1, PicoWriteS68k8_dec_m1b1, PicoWriteS68k8_dec_m2b1, PicoWriteS68k8_dec_m2b1 },\r |
948 | };\r |
949 | \r |
950 | static const void *s68k_dec_write16[2][4] = {\r |
951 | { PicoWriteS68k16_dec_m0b0, PicoWriteS68k16_dec_m1b0, PicoWriteS68k16_dec_m2b0, PicoWriteS68k16_dec_m2b0 },\r |
952 | { PicoWriteS68k16_dec_m0b1, PicoWriteS68k16_dec_m1b1, PicoWriteS68k16_dec_m2b1, PicoWriteS68k16_dec_m2b1 },\r |
953 | };\r |
954 | \r |
cc68a136 |
955 | // -----------------------------------------------------------------\r |
956 | \r |
08769494 |
957 | static void remap_prg_window(int r3)\r |
3aa1e148 |
958 | {\r |
af37bca8 |
959 | // PRG RAM\r |
960 | if (Pico_mcd->m.busreq & 2) {\r |
08769494 |
961 | void *bank = Pico_mcd->prg_ram_b[r3 >> 6];\r |
af37bca8 |
962 | cpu68k_map_all_ram(0x020000, 0x03ffff, bank, 0);\r |
963 | }\r |
964 | else {\r |
965 | m68k_map_unmap(0x020000, 0x03ffff);\r |
966 | }\r |
0ace9b9a |
967 | }\r |
968 | \r |
969 | static void remap_word_ram(int r3)\r |
970 | {\r |
971 | void *bank;\r |
af37bca8 |
972 | \r |
973 | // WORD RAM\r |
974 | if (!(r3 & 4)) {\r |
975 | // 2M mode. XXX: allowing access in all cases for simplicity\r |
976 | bank = Pico_mcd->word_ram2M;\r |
977 | cpu68k_map_all_ram(0x200000, 0x23ffff, bank, 0);\r |
978 | cpu68k_map_all_ram(0x080000, 0x0bffff, bank, 1);\r |
979 | // TODO: handle 0x0c0000\r |
980 | }\r |
981 | else {\r |
0ace9b9a |
982 | int b0 = r3 & 1;\r |
983 | int m = (r3 & 0x18) >> 3;\r |
984 | bank = Pico_mcd->word_ram1M[b0];\r |
af37bca8 |
985 | cpu68k_map_all_ram(0x200000, 0x21ffff, bank, 0);\r |
0ace9b9a |
986 | bank = Pico_mcd->word_ram1M[b0 ^ 1];\r |
af37bca8 |
987 | cpu68k_map_all_ram(0x0c0000, 0x0effff, bank, 1);\r |
988 | // "cell arrange" on m68k\r |
0ace9b9a |
989 | cpu68k_map_set(m68k_read8_map, 0x220000, 0x23ffff, m68k_cell_read8[b0], 1);\r |
990 | cpu68k_map_set(m68k_read16_map, 0x220000, 0x23ffff, m68k_cell_read16[b0], 1);\r |
991 | cpu68k_map_set(m68k_write8_map, 0x220000, 0x23ffff, m68k_cell_write8[b0], 1);\r |
992 | cpu68k_map_set(m68k_write16_map, 0x220000, 0x23ffff, m68k_cell_write16[b0], 1);\r |
af37bca8 |
993 | // "decode format" on s68k\r |
0ace9b9a |
994 | cpu68k_map_set(s68k_read8_map, 0x080000, 0x0bffff, s68k_dec_read8[b0 ^ 1], 1);\r |
995 | cpu68k_map_set(s68k_read16_map, 0x080000, 0x0bffff, s68k_dec_read16[b0 ^ 1], 1);\r |
996 | cpu68k_map_set(s68k_write8_map, 0x080000, 0x0bffff, s68k_dec_write8[b0 ^ 1][m], 1);\r |
997 | cpu68k_map_set(s68k_write16_map, 0x080000, 0x0bffff, s68k_dec_write16[b0 ^ 1][m], 1);\r |
af37bca8 |
998 | }\r |
999 | \r |
3aa1e148 |
1000 | #ifdef EMU_F68K\r |
1001 | // update fetchmap..\r |
1002 | int i;\r |
1003 | if (!(r3 & 4))\r |
1004 | {\r |
1005 | for (i = M68K_FETCHBANK1*2/16; (i<<(24-FAMEC_FETCHBITS)) < 0x240000; i++)\r |
be26eb23 |
1006 | PicoCpuFM68k.Fetch[i] = (unsigned long)Pico_mcd->word_ram2M - 0x200000;\r |
3aa1e148 |
1007 | }\r |
1008 | else\r |
1009 | {\r |
1010 | for (i = M68K_FETCHBANK1*2/16; (i<<(24-FAMEC_FETCHBITS)) < 0x220000; i++)\r |
be26eb23 |
1011 | PicoCpuFM68k.Fetch[i] = (unsigned long)Pico_mcd->word_ram1M[r3 & 1] - 0x200000;\r |
3aa1e148 |
1012 | for (i = M68K_FETCHBANK1*0x0c/0x100; (i<<(24-FAMEC_FETCHBITS)) < 0x0e0000; i++)\r |
be26eb23 |
1013 | PicoCpuFS68k.Fetch[i] = (unsigned long)Pico_mcd->word_ram1M[(r3&1)^1] - 0x0c0000;\r |
3aa1e148 |
1014 | }\r |
1015 | #endif\r |
1016 | }\r |
b837b69b |
1017 | \r |
ae214f1c |
1018 | void pcd_state_loaded_mem(void)\r |
0ace9b9a |
1019 | {\r |
1020 | int r3 = Pico_mcd->s68k_regs[3];\r |
1021 | \r |
1022 | /* after load events */\r |
1023 | if (r3 & 4) // 1M mode?\r |
1024 | wram_2M_to_1M(Pico_mcd->word_ram2M);\r |
1025 | remap_word_ram(r3);\r |
08769494 |
1026 | remap_prg_window(r3);\r |
0ace9b9a |
1027 | \r |
1028 | // restore hint vector\r |
1029 | *(unsigned short *)(Pico_mcd->bios + 0x72) = Pico_mcd->m.hint_vector;\r |
1030 | }\r |
1031 | \r |
9037e45d |
1032 | #ifdef EMU_M68K\r |
1033 | static void m68k_mem_setup_cd(void);\r |
1034 | #endif\r |
1035 | \r |
eff55556 |
1036 | PICO_INTERNAL void PicoMemSetupCD(void)\r |
b837b69b |
1037 | {\r |
af37bca8 |
1038 | // setup default main68k map\r |
1039 | PicoMemSetup();\r |
1040 | \r |
af37bca8 |
1041 | // main68k map (BIOS mapped by PicoMemSetup()):\r |
1042 | // RAM cart\r |
1043 | if (PicoOpt & POPT_EN_MCD_RAMCART) {\r |
1044 | cpu68k_map_set(m68k_read8_map, 0x400000, 0x7fffff, PicoReadM68k8_ramc, 1);\r |
1045 | cpu68k_map_set(m68k_read16_map, 0x400000, 0x7fffff, PicoReadM68k16_ramc, 1);\r |
1046 | cpu68k_map_set(m68k_write8_map, 0x400000, 0x7fffff, PicoWriteM68k8_ramc, 1);\r |
1047 | cpu68k_map_set(m68k_write16_map, 0x400000, 0x7fffff, PicoWriteM68k16_ramc, 1);\r |
1048 | }\r |
1049 | \r |
1050 | // registers/IO:\r |
1051 | cpu68k_map_set(m68k_read8_map, 0xa10000, 0xa1ffff, PicoReadM68k8_io, 1);\r |
1052 | cpu68k_map_set(m68k_read16_map, 0xa10000, 0xa1ffff, PicoReadM68k16_io, 1);\r |
1053 | cpu68k_map_set(m68k_write8_map, 0xa10000, 0xa1ffff, PicoWriteM68k8_io, 1);\r |
1054 | cpu68k_map_set(m68k_write16_map, 0xa10000, 0xa1ffff, PicoWriteM68k16_io, 1);\r |
1055 | \r |
1056 | // sub68k map\r |
1057 | cpu68k_map_set(s68k_read8_map, 0x000000, 0xffffff, s68k_unmapped_read8, 1);\r |
1058 | cpu68k_map_set(s68k_read16_map, 0x000000, 0xffffff, s68k_unmapped_read16, 1);\r |
1059 | cpu68k_map_set(s68k_write8_map, 0x000000, 0xffffff, s68k_unmapped_write8, 1);\r |
1060 | cpu68k_map_set(s68k_write16_map, 0x000000, 0xffffff, s68k_unmapped_write16, 1);\r |
1061 | \r |
1062 | // PRG RAM\r |
1063 | cpu68k_map_set(s68k_read8_map, 0x000000, 0x07ffff, Pico_mcd->prg_ram, 0);\r |
1064 | cpu68k_map_set(s68k_read16_map, 0x000000, 0x07ffff, Pico_mcd->prg_ram, 0);\r |
1065 | cpu68k_map_set(s68k_write8_map, 0x000000, 0x07ffff, Pico_mcd->prg_ram, 0);\r |
1066 | cpu68k_map_set(s68k_write16_map, 0x000000, 0x07ffff, Pico_mcd->prg_ram, 0);\r |
0ace9b9a |
1067 | cpu68k_map_set(s68k_write8_map, 0x000000, 0x00ffff, PicoWriteS68k8_prgwp, 1);\r |
1068 | cpu68k_map_set(s68k_write16_map, 0x000000, 0x00ffff, PicoWriteS68k16_prgwp, 1);\r |
af37bca8 |
1069 | \r |
1070 | // BRAM\r |
1071 | cpu68k_map_set(s68k_read8_map, 0xfe0000, 0xfeffff, PicoReadS68k8_bram, 1);\r |
1072 | cpu68k_map_set(s68k_read16_map, 0xfe0000, 0xfeffff, PicoReadS68k16_bram, 1);\r |
1073 | cpu68k_map_set(s68k_write8_map, 0xfe0000, 0xfeffff, PicoWriteS68k8_bram, 1);\r |
1074 | cpu68k_map_set(s68k_write16_map, 0xfe0000, 0xfeffff, PicoWriteS68k16_bram, 1);\r |
1075 | \r |
1076 | // PCM, regs\r |
1077 | cpu68k_map_set(s68k_read8_map, 0xff0000, 0xffffff, PicoReadS68k8_pr, 1);\r |
1078 | cpu68k_map_set(s68k_read16_map, 0xff0000, 0xffffff, PicoReadS68k16_pr, 1);\r |
1079 | cpu68k_map_set(s68k_write8_map, 0xff0000, 0xffffff, PicoWriteS68k8_pr, 1);\r |
1080 | cpu68k_map_set(s68k_write16_map, 0xff0000, 0xffffff, PicoWriteS68k16_pr, 1);\r |
f53f286a |
1081 | \r |
0ace9b9a |
1082 | // RAMs\r |
1083 | remap_word_ram(1);\r |
1084 | \r |
b837b69b |
1085 | #ifdef EMU_C68K\r |
b837b69b |
1086 | // s68k\r |
5e89f0f5 |
1087 | PicoCpuCS68k.read8 = (void *)s68k_read8_map;\r |
1088 | PicoCpuCS68k.read16 = (void *)s68k_read16_map;\r |
1089 | PicoCpuCS68k.read32 = (void *)s68k_read16_map;\r |
1090 | PicoCpuCS68k.write8 = (void *)s68k_write8_map;\r |
1091 | PicoCpuCS68k.write16 = (void *)s68k_write16_map;\r |
1092 | PicoCpuCS68k.write32 = (void *)s68k_write16_map;\r |
1093 | PicoCpuCS68k.checkpc = NULL; /* unused */\r |
1094 | PicoCpuCS68k.fetch8 = NULL;\r |
1095 | PicoCpuCS68k.fetch16 = NULL;\r |
1096 | PicoCpuCS68k.fetch32 = NULL;\r |
b837b69b |
1097 | #endif\r |
3aa1e148 |
1098 | #ifdef EMU_F68K\r |
3aa1e148 |
1099 | // s68k\r |
af37bca8 |
1100 | PicoCpuFS68k.read_byte = s68k_read8;\r |
1101 | PicoCpuFS68k.read_word = s68k_read16;\r |
1102 | PicoCpuFS68k.read_long = s68k_read32;\r |
1103 | PicoCpuFS68k.write_byte = s68k_write8;\r |
1104 | PicoCpuFS68k.write_word = s68k_write16;\r |
1105 | PicoCpuFS68k.write_long = s68k_write32;\r |
3aa1e148 |
1106 | \r |
1107 | // setup FAME fetchmap\r |
1108 | {\r |
1109 | int i;\r |
1110 | // M68k\r |
1111 | // by default, point everything to fitst 64k of ROM (BIOS)\r |
1112 | for (i = 0; i < M68K_FETCHBANK1; i++)\r |
be26eb23 |
1113 | PicoCpuFM68k.Fetch[i] = (unsigned long)Pico.rom - (i<<(24-FAMEC_FETCHBITS));\r |
3aa1e148 |
1114 | // now real ROM (BIOS)\r |
1115 | for (i = 0; i < M68K_FETCHBANK1 && (i<<(24-FAMEC_FETCHBITS)) < Pico.romsize; i++)\r |
be26eb23 |
1116 | PicoCpuFM68k.Fetch[i] = (unsigned long)Pico.rom;\r |
3aa1e148 |
1117 | // .. and RAM\r |
1118 | for (i = M68K_FETCHBANK1*14/16; i < M68K_FETCHBANK1; i++)\r |
be26eb23 |
1119 | PicoCpuFM68k.Fetch[i] = (unsigned long)Pico.ram - (i<<(24-FAMEC_FETCHBITS));\r |
3aa1e148 |
1120 | // S68k\r |
1121 | // PRG RAM is default\r |
1122 | for (i = 0; i < M68K_FETCHBANK1; i++)\r |
be26eb23 |
1123 | PicoCpuFS68k.Fetch[i] = (unsigned long)Pico_mcd->prg_ram - (i<<(24-FAMEC_FETCHBITS));\r |
3aa1e148 |
1124 | // real PRG RAM\r |
1125 | for (i = 0; i < M68K_FETCHBANK1 && (i<<(24-FAMEC_FETCHBITS)) < 0x80000; i++)\r |
be26eb23 |
1126 | PicoCpuFS68k.Fetch[i] = (unsigned long)Pico_mcd->prg_ram;\r |
3aa1e148 |
1127 | // WORD RAM 2M area\r |
1128 | for (i = M68K_FETCHBANK1*0x08/0x100; i < M68K_FETCHBANK1 && (i<<(24-FAMEC_FETCHBITS)) < 0xc0000; i++)\r |
be26eb23 |
1129 | PicoCpuFS68k.Fetch[i] = (unsigned long)Pico_mcd->word_ram2M - 0x80000;\r |
0ace9b9a |
1130 | // remap_word_ram() will setup word ram for both\r |
3aa1e148 |
1131 | }\r |
1132 | #endif\r |
9037e45d |
1133 | #ifdef EMU_M68K\r |
1134 | m68k_mem_setup_cd();\r |
1135 | #endif\r |
b837b69b |
1136 | }\r |
1137 | \r |
1138 | \r |
cc68a136 |
1139 | #ifdef EMU_M68K\r |
af37bca8 |
1140 | u32 m68k_read8(u32 a);\r |
1141 | u32 m68k_read16(u32 a);\r |
1142 | u32 m68k_read32(u32 a);\r |
1143 | void m68k_write8(u32 a, u8 d);\r |
1144 | void m68k_write16(u32 a, u16 d);\r |
1145 | void m68k_write32(u32 a, u32 d);\r |
1146 | \r |
9037e45d |
1147 | static unsigned int PicoReadCD8w (unsigned int a) {\r |
af37bca8 |
1148 | return m68ki_cpu_p == &PicoCpuMS68k ? s68k_read8(a) : m68k_read8(a);\r |
cc68a136 |
1149 | }\r |
9037e45d |
1150 | static unsigned int PicoReadCD16w(unsigned int a) {\r |
af37bca8 |
1151 | return m68ki_cpu_p == &PicoCpuMS68k ? s68k_read16(a) : m68k_read16(a);\r |
cc68a136 |
1152 | }\r |
9037e45d |
1153 | static unsigned int PicoReadCD32w(unsigned int a) {\r |
af37bca8 |
1154 | return m68ki_cpu_p == &PicoCpuMS68k ? s68k_read32(a) : m68k_read32(a);\r |
cc68a136 |
1155 | }\r |
9037e45d |
1156 | static void PicoWriteCD8w (unsigned int a, unsigned char d) {\r |
af37bca8 |
1157 | if (m68ki_cpu_p == &PicoCpuMS68k) s68k_write8(a, d); else m68k_write8(a, d);\r |
cc68a136 |
1158 | }\r |
9037e45d |
1159 | static void PicoWriteCD16w(unsigned int a, unsigned short d) {\r |
af37bca8 |
1160 | if (m68ki_cpu_p == &PicoCpuMS68k) s68k_write16(a, d); else m68k_write16(a, d);\r |
cc68a136 |
1161 | }\r |
9037e45d |
1162 | static void PicoWriteCD32w(unsigned int a, unsigned int d) {\r |
af37bca8 |
1163 | if (m68ki_cpu_p == &PicoCpuMS68k) s68k_write32(a, d); else m68k_write32(a, d);\r |
cc68a136 |
1164 | }\r |
1165 | \r |
9037e45d |
1166 | extern unsigned int (*pm68k_read_memory_8) (unsigned int address);\r |
1167 | extern unsigned int (*pm68k_read_memory_16)(unsigned int address);\r |
1168 | extern unsigned int (*pm68k_read_memory_32)(unsigned int address);\r |
1169 | extern void (*pm68k_write_memory_8) (unsigned int address, unsigned char value);\r |
1170 | extern void (*pm68k_write_memory_16)(unsigned int address, unsigned short value);\r |
1171 | extern void (*pm68k_write_memory_32)(unsigned int address, unsigned int value);\r |
9037e45d |
1172 | \r |
1173 | static void m68k_mem_setup_cd(void)\r |
1174 | {\r |
1175 | pm68k_read_memory_8 = PicoReadCD8w;\r |
1176 | pm68k_read_memory_16 = PicoReadCD16w;\r |
1177 | pm68k_read_memory_32 = PicoReadCD32w;\r |
1178 | pm68k_write_memory_8 = PicoWriteCD8w;\r |
1179 | pm68k_write_memory_16 = PicoWriteCD16w;\r |
1180 | pm68k_write_memory_32 = PicoWriteCD32w;\r |
9037e45d |
1181 | }\r |
cc68a136 |
1182 | #endif // EMU_M68K\r |
1183 | \r |
ae214f1c |
1184 | // vim:shiftwidth=2:ts=2:expandtab\r |