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1 | // (c) Copyright 2007 notaz, All rights reserved. |
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2 | |
3 | |
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4 | #include "../pico_int.h" |
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5 | #include "../sound/ym2612.h" |
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6 | |
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7 | extern unsigned char formatted_bram[4*0x10]; |
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8 | extern unsigned int s68k_poll_adclk; |
9 | |
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10 | void (*PicoMCDopenTray)(void) = NULL; |
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11 | void (*PicoMCDcloseTray)(void) = NULL; |
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12 | |
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13 | |
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14 | PICO_INTERNAL void PicoInitMCD(void) |
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15 | { |
16 | SekInitS68k(); |
17 | Init_CD_Driver(); |
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18 | } |
19 | |
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20 | PICO_INTERNAL void PicoExitMCD(void) |
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21 | { |
22 | End_CD_Driver(); |
23 | } |
24 | |
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25 | PICO_INTERNAL void PicoPowerMCD(void) |
26 | { |
27 | int fmt_size = sizeof(formatted_bram); |
28 | memset(Pico_mcd->prg_ram, 0, sizeof(Pico_mcd->prg_ram)); |
29 | memset(Pico_mcd->word_ram2M, 0, sizeof(Pico_mcd->word_ram2M)); |
30 | memset(Pico_mcd->pcm_ram, 0, sizeof(Pico_mcd->pcm_ram)); |
31 | memset(Pico_mcd->bram, 0, sizeof(Pico_mcd->bram)); |
32 | memcpy(Pico_mcd->bram + sizeof(Pico_mcd->bram) - fmt_size, formatted_bram, fmt_size); |
33 | } |
34 | |
35 | PICO_INTERNAL int PicoResetMCD(void) |
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36 | { |
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37 | memset(Pico_mcd->s68k_regs, 0, sizeof(Pico_mcd->s68k_regs)); |
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38 | memset(&Pico_mcd->pcm, 0, sizeof(Pico_mcd->pcm)); |
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39 | memset(&Pico_mcd->m, 0, sizeof(Pico_mcd->m)); |
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40 | |
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41 | *(unsigned int *)(Pico_mcd->bios + 0x70) = 0xffffffff; // reset hint vector (simplest way to implement reg6) |
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42 | Pico_mcd->m.state_flags |= 1; // s68k reset pending |
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43 | Pico_mcd->s68k_regs[3] = 1; // 2M word RAM mode with m68k access after reset |
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44 | |
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45 | Reset_CD(); |
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46 | LC89510_Reset(); |
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47 | gfx_cd_reset(); |
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48 | #ifdef _ASM_CD_MEMORY_C |
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49 | //PicoMemResetCDdecode(1); // don't have to call this in 2M mode |
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50 | #endif |
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51 | |
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52 | // use SRam.data for RAM cart |
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53 | if (PicoOpt & POPT_EN_MCD_RAMCART) { |
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54 | if (SRam.data == NULL) |
55 | SRam.data = calloc(1, 0x12000); |
56 | } |
57 | else if (SRam.data != NULL) { |
58 | free(SRam.data); |
59 | SRam.data = NULL; |
60 | } |
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61 | SRam.start = SRam.end = 0; // unused |
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62 | |
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63 | return 0; |
64 | } |
65 | |
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66 | static __inline void SekRunM68k(int cyc) |
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67 | { |
68 | int cyc_do; |
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69 | |
70 | pprof_start(m68k); |
71 | |
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72 | SekCycleAim+=cyc; |
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73 | if ((cyc_do=SekCycleAim-SekCycleCnt) <= 0) return; |
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74 | #if defined(EMU_CORE_DEBUG) |
75 | SekCycleCnt+=CM_compareRun(cyc_do, 0); |
76 | #elif defined(EMU_C68K) |
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77 | PicoCpuCM68k.cycles=cyc_do; |
78 | CycloneRun(&PicoCpuCM68k); |
79 | SekCycleCnt+=cyc_do-PicoCpuCM68k.cycles; |
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80 | #elif defined(EMU_M68K) |
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81 | m68k_set_context(&PicoCpuMM68k); |
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82 | SekCycleCnt+=m68k_execute(cyc_do); |
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83 | #elif defined(EMU_F68K) |
84 | g_m68kcontext=&PicoCpuFM68k; |
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85 | SekCycleCnt+=fm68k_emulate(cyc_do, 0, 0); |
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86 | #endif |
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87 | pprof_end(m68k); |
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88 | } |
89 | |
90 | static __inline void SekRunS68k(int cyc) |
91 | { |
92 | int cyc_do; |
93 | SekCycleAimS68k+=cyc; |
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94 | if ((cyc_do=SekCycleAimS68k-SekCycleCntS68k) <= 0) return; |
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95 | #if defined(EMU_CORE_DEBUG) |
96 | SekCycleCntS68k+=CM_compareRun(cyc_do, 1); |
97 | #elif defined(EMU_C68K) |
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98 | PicoCpuCS68k.cycles=cyc_do; |
99 | CycloneRun(&PicoCpuCS68k); |
100 | SekCycleCntS68k+=cyc_do-PicoCpuCS68k.cycles; |
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101 | #elif defined(EMU_M68K) |
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102 | m68k_set_context(&PicoCpuMS68k); |
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103 | SekCycleCntS68k+=m68k_execute(cyc_do); |
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104 | #elif defined(EMU_F68K) |
105 | g_m68kcontext=&PicoCpuFS68k; |
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106 | SekCycleCntS68k+=fm68k_emulate(cyc_do, 0, 0); |
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107 | #endif |
108 | } |
109 | |
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110 | #define PS_STEP_M68K ((488<<16)/20) // ~24 |
111 | //#define PS_STEP_S68K 13 |
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112 | |
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113 | #if defined(_ASM_CD_PICO_C) |
114 | extern void SekRunPS(int cyc_m68k, int cyc_s68k); |
115 | #elif defined(EMU_F68K) |
116 | static __inline void SekRunPS(int cyc_m68k, int cyc_s68k) |
117 | { |
118 | SekCycleAim+=cyc_m68k; |
119 | SekCycleAimS68k+=cyc_s68k; |
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120 | fm68k_emulate(0, 1, 0); |
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121 | } |
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122 | #else |
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123 | static __inline void SekRunPS(int cyc_m68k, int cyc_s68k) |
124 | { |
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125 | int cycn, cycn_s68k, cyc_do; |
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126 | SekCycleAim+=cyc_m68k; |
127 | SekCycleAimS68k+=cyc_s68k; |
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128 | |
129 | // fprintf(stderr, "=== start %3i/%3i [%3i/%3i] {%05i.%i} ===\n", cyc_m68k, cyc_s68k, |
130 | // SekCycleAim-SekCycleCnt, SekCycleAimS68k-SekCycleCntS68k, Pico.m.frame_count, Pico.m.scanline); |
131 | |
132 | /* loop 488 downto 0 in steps of PS_STEP */ |
133 | for (cycn = (488<<16)-PS_STEP_M68K; cycn >= 0; cycn -= PS_STEP_M68K) |
134 | { |
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135 | cycn_s68k = (cycn + cycn/2 + cycn/8) >> 16; |
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136 | if ((cyc_do = SekCycleAim-SekCycleCnt-(cycn>>16)) > 0) { |
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137 | #if defined(EMU_C68K) |
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138 | PicoCpuCM68k.cycles = cyc_do; |
139 | CycloneRun(&PicoCpuCM68k); |
140 | SekCycleCnt += cyc_do - PicoCpuCM68k.cycles; |
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141 | #elif defined(EMU_M68K) |
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142 | m68k_set_context(&PicoCpuMM68k); |
143 | SekCycleCnt += m68k_execute(cyc_do); |
144 | #elif defined(EMU_F68K) |
145 | g_m68kcontext = &PicoCpuFM68k; |
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146 | SekCycleCnt += fm68k_emulate(cyc_do, 0, 0); |
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147 | #endif |
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148 | } |
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149 | if ((cyc_do = SekCycleAimS68k-SekCycleCntS68k-cycn_s68k) > 0) { |
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150 | #if defined(EMU_C68K) |
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151 | PicoCpuCS68k.cycles = cyc_do; |
152 | CycloneRun(&PicoCpuCS68k); |
153 | SekCycleCntS68k += cyc_do - PicoCpuCS68k.cycles; |
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154 | #elif defined(EMU_M68K) |
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155 | m68k_set_context(&PicoCpuMS68k); |
156 | SekCycleCntS68k += m68k_execute(cyc_do); |
157 | #elif defined(EMU_F68K) |
158 | g_m68kcontext = &PicoCpuFS68k; |
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159 | SekCycleCntS68k += fm68k_emulate(cyc_do, 0, 0); |
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160 | #endif |
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161 | } |
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162 | } |
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163 | } |
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164 | #endif |
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165 | |
166 | |
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167 | static __inline void check_cd_dma(void) |
168 | { |
169 | int ddx; |
170 | |
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171 | if (!(Pico_mcd->scd.Status_CDC & 0x08)) return; |
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172 | |
173 | ddx = Pico_mcd->s68k_regs[4] & 7; |
174 | if (ddx < 2) return; // invalid |
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175 | if (ddx < 4) { |
176 | Pico_mcd->s68k_regs[4] |= 0x40; // Data set ready in host port |
177 | return; |
178 | } |
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179 | if (ddx == 6) return; // invalid |
180 | |
181 | Update_CDC_TRansfer(ddx); // now go and do the actual transfer |
182 | } |
183 | |
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184 | static __inline void update_chips(void) |
185 | { |
186 | int counter_timer, int3_set; |
187 | int counter75hz_lim = Pico.m.pal ? 2080 : 2096; |
188 | |
189 | // 75Hz CDC update |
190 | if ((Pico_mcd->m.counter75hz+=10) >= counter75hz_lim) { |
191 | Pico_mcd->m.counter75hz -= counter75hz_lim; |
192 | Check_CD_Command(); |
193 | } |
194 | |
195 | // update timers |
196 | counter_timer = Pico.m.pal ? 0x21630 : 0x2121c; // 136752 : 135708; |
197 | Pico_mcd->m.timer_stopwatch += counter_timer; |
198 | if ((int3_set = Pico_mcd->s68k_regs[0x31])) { |
199 | Pico_mcd->m.timer_int3 -= counter_timer; |
200 | if (Pico_mcd->m.timer_int3 < 0) { |
201 | if (Pico_mcd->s68k_regs[0x33] & (1<<3)) { |
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202 | elprintf(EL_INTS, "s68k: timer irq 3"); |
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203 | SekInterruptS68k(3); |
204 | Pico_mcd->m.timer_int3 += int3_set << 16; |
205 | } |
206 | // is this really what happens if irq3 is masked out? |
207 | Pico_mcd->m.timer_int3 &= 0xffffff; |
208 | } |
209 | } |
210 | |
211 | // update gfx chip |
212 | if (Pico_mcd->rot_comp.Reg_58 & 0x8000) |
213 | gfx_cd_update(); |
214 | } |
215 | |
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216 | |
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217 | #define PICO_CD |
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218 | #define CPUS_RUN(m68k_cycles,s68k_cycles) \ |
219 | { \ |
220 | if ((PicoOpt&POPT_EN_MCD_PSYNC) && (Pico_mcd->m.busreq&3) == 1) { \ |
221 | SekRunPS(m68k_cycles, s68k_cycles); /* "better/perfect sync" */ \ |
222 | } else { \ |
223 | SekRunM68k(m68k_cycles); \ |
224 | if ((Pico_mcd->m.busreq&3) == 1) /* no busreq/no reset */ \ |
225 | SekRunS68k(s68k_cycles); \ |
226 | } \ |
227 | } |
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228 | #include "../pico_cmn.c" |
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229 | |
230 | |
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231 | PICO_INTERNAL void PicoFrameMCD(void) |
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232 | { |
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233 | if (!(PicoOpt&POPT_ALT_RENDERER)) |
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234 | PicoFrameStart(); |
235 | |
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236 | PicoFrameHints(); |
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237 | } |
238 | |
239 | |