sms wip: initial graphics support
[picodrive.git] / pico / memory.c
CommitLineData
cc68a136 1// This is part of Pico Library\r
2\r
3// (c) Copyright 2004 Dave, All rights reserved.\r
ca61ee42 4// (c) Copyright 2006,2007 notaz, All rights reserved.\r
cc68a136 5// Free for non-commercial use.\r
6\r
7// For commercial use, separate licencing terms must be obtained.\r
8\r
9\r
efcba75f 10#include "pico_int.h"\r
cc68a136 11\r
cc68a136 12#include "sound/ym2612.h"\r
13#include "sound/sn76496.h"\r
14\r
eff55556 15#ifndef UTYPES_DEFINED\r
cc68a136 16typedef unsigned char u8;\r
17typedef unsigned short u16;\r
18typedef unsigned int u32;\r
eff55556 19#define UTYPES_DEFINED\r
20#endif\r
cc68a136 21\r
c8d1e9b6 22extern unsigned int lastSSRamWrite; // used by serial eeprom code\r
cc68a136 23\r
24#ifdef _ASM_MEMORY_C\r
0af33fe0 25u32 PicoRead8(u32 a);\r
26u32 PicoRead16(u32 a);\r
e5503e2f 27void PicoWrite8(u32 a,u8 d);\r
cc68a136 28void PicoWriteRomHW_SSF2(u32 a,u32 d);\r
cc68a136 29#endif\r
30\r
31\r
03e4f2a3 32#ifdef EMU_CORE_DEBUG\r
cc68a136 33u32 lastread_a, lastread_d[16]={0,}, lastwrite_cyc_d[16]={0,}, lastwrite_mus_d[16]={0,};\r
34int lrp_cyc=0, lrp_mus=0, lwp_cyc=0, lwp_mus=0;\r
35extern unsigned int ppop;\r
36#endif\r
37\r
4f65685b 38#ifdef IO_STATS\r
39void log_io(unsigned int addr, int bits, int rw);\r
dca310c4 40#elif defined(_MSC_VER)\r
41#define log_io\r
4f65685b 42#else\r
43#define log_io(...)\r
44#endif\r
45\r
70357ce5 46#if defined(EMU_C68K)\r
cc68a136 47static __inline int PicoMemBase(u32 pc)\r
48{\r
49 int membase=0;\r
50\r
51 if (pc<Pico.romsize+4)\r
52 {\r
53 membase=(int)Pico.rom; // Program Counter in Rom\r
54 }\r
55 else if ((pc&0xe00000)==0xe00000)\r
56 {\r
57 membase=(int)Pico.ram-(pc&0xff0000); // Program Counter in Ram\r
58 }\r
59 else\r
60 {\r
61 // Error - Program Counter is invalid\r
62 membase=(int)Pico.rom;\r
63 }\r
64\r
65 return membase;\r
66}\r
67#endif\r
68\r
69\r
406c96c5 70PICO_INTERNAL u32 PicoCheckPc(u32 pc)\r
cc68a136 71{\r
72 u32 ret=0;\r
73#if defined(EMU_C68K)\r
3aa1e148 74 pc-=PicoCpuCM68k.membase; // Get real pc\r
0af33fe0 75// pc&=0xfffffe;\r
76 pc&=~1;\r
77 if ((pc<<8) == 0)\r
69996cb7 78 {\r
f8af9634 79 elprintf(EL_STATUS|EL_ANOMALY, "%i:%03i: game crash detected @ %06x\n",\r
80 Pico.m.frame_count, Pico.m.scanline, SekPc);\r
81 return (int)Pico.rom + Pico.romsize; // common crash condition, may happen with bad ROMs\r
69996cb7 82 }\r
cc68a136 83\r
3aa1e148 84 PicoCpuCM68k.membase=PicoMemBase(pc&0x00ffffff);\r
85 PicoCpuCM68k.membase-=pc&0xff000000;\r
cc68a136 86\r
3aa1e148 87 ret = PicoCpuCM68k.membase+pc;\r
cc68a136 88#endif\r
89 return ret;\r
90}\r
91\r
92\r
2aa27095 93PICO_INTERNAL void PicoInitPc(u32 pc)\r
cc68a136 94{\r
95 PicoCheckPc(pc);\r
cc68a136 96}\r
97\r
98#ifndef _ASM_MEMORY_C\r
eff55556 99PICO_INTERNAL_ASM void PicoMemReset(void)\r
cc68a136 100{\r
101}\r
102#endif\r
103\r
104// -----------------------------------------------------------------\r
105\r
e5503e2f 106int PadRead(int i)\r
107{\r
108 int pad,value,data_reg;\r
5f9a0d16 109 pad=~PicoPadInt[i]; // Get inverse of pad MXYZ SACB RLDU\r
e5503e2f 110 data_reg=Pico.ioports[i+1];\r
111\r
112 // orr the bits, which are set as output\r
113 value = data_reg&(Pico.ioports[i+4]|0x80);\r
114\r
602133e1 115 if (PicoOpt & POPT_6BTN_PAD)\r
116 {\r
e5503e2f 117 int phase = Pico.m.padTHPhase[i];\r
118\r
119 if(phase == 2 && !(data_reg&0x40)) { // TH\r
120 value|=(pad&0xc0)>>2; // ?0SA 0000\r
121 return value;\r
122 } else if(phase == 3) {\r
123 if(data_reg&0x40)\r
124 value|=(pad&0x30)|((pad>>8)&0xf); // ?1CB MXYZ\r
125 else\r
126 value|=((pad&0xc0)>>2)|0x0f; // ?0SA 1111\r
127 return value;\r
128 }\r
129 }\r
130\r
131 if(data_reg&0x40) // TH\r
132 value|=(pad&0x3f); // ?1CB RLDU\r
133 else value|=((pad&0xc0)>>2)|(pad&3); // ?0SA 00DU\r
134\r
135 return value; // will mirror later\r
136}\r
137\r
138\r
cc68a136 139#ifndef _ASM_MEMORY_C\r
7969166e 140static\r
141#endif\r
142u32 SRAMRead(u32 a)\r
cc68a136 143{\r
7969166e 144 unsigned int sreg = Pico.m.sram_reg;\r
9dc09829 145 if (!(sreg & 0x10) && (sreg & 1) && a > 0x200001) { // not yet detected SRAM\r
1dceadae 146 elprintf(EL_SRAMIO, "normal sram detected.");\r
7969166e 147 Pico.m.sram_reg|=0x10; // should be normal SRAM\r
148 }\r
9dc09829 149 if (sreg & 4) // EEPROM read\r
7969166e 150 return SRAMReadEEPROM();\r
151 else // if(sreg & 1) // (sreg&5) is one of prerequisites\r
152 return *(u8 *)(SRam.data-SRam.start+a);\r
cc68a136 153}\r
cc68a136 154\r
9dc09829 155#ifndef _ASM_MEMORY_C\r
156static\r
157#endif\r
158u32 SRAMRead16(u32 a)\r
159{\r
160 u32 d;\r
161 if (Pico.m.sram_reg & 4) {\r
162 d = SRAMReadEEPROM();\r
163 d |= d << 8;\r
164 } else {\r
165 u8 *pm=(u8 *)(SRam.data-SRam.start+a);\r
166 d =*pm++ << 8;\r
167 d|=*pm++;\r
168 }\r
169 return d;\r
170}\r
171\r
7969166e 172static void SRAMWrite(u32 a, u32 d)\r
173{\r
7969166e 174 unsigned int sreg = Pico.m.sram_reg;\r
175 if(!(sreg & 0x10)) {\r
176 // not detected SRAM\r
177 if((a&~1)==0x200000) {\r
1dceadae 178 elprintf(EL_SRAMIO, "eeprom detected.");\r
179 sreg|=4; // this should be a game with EEPROM (like NBA Jam)\r
7969166e 180 SRam.start=0x200000; SRam.end=SRam.start+1;\r
1dceadae 181 } else\r
182 elprintf(EL_SRAMIO, "normal sram detected.");\r
183 sreg|=0x10;\r
184 Pico.m.sram_reg=sreg;\r
7969166e 185 }\r
186 if(sreg & 4) { // EEPROM write\r
1dceadae 187 // this diff must be at most 16 for NBA Jam to work\r
188 if(SekCyclesDoneT()-lastSSRamWrite < 16) {\r
7969166e 189 // just update pending state\r
1dceadae 190 elprintf(EL_EEPROM, "eeprom: skip because cycles=%i", SekCyclesDoneT()-lastSSRamWrite);\r
7969166e 191 SRAMUpdPending(a, d);\r
192 } else {\r
1dceadae 193 int old=sreg;\r
7969166e 194 SRAMWriteEEPROM(sreg>>6); // execute pending\r
195 SRAMUpdPending(a, d);\r
1dceadae 196 if ((old^Pico.m.sram_reg)&0xc0) // update time only if SDA/SCL changed\r
197 lastSSRamWrite = SekCyclesDoneT();\r
7969166e 198 }\r
199 } else if(!(sreg & 2)) {\r
200 u8 *pm=(u8 *)(SRam.data-SRam.start+a);\r
201 if(*pm != (u8)d) {\r
202 SRam.changed = 1;\r
203 *pm=(u8)d;\r
204 }\r
205 }\r
206}\r
cc68a136 207\r
208// for nonstandard reads\r
f53f286a 209static u32 OtherRead16End(u32 a, int realsize)\r
cc68a136 210{\r
211 u32 d=0;\r
212\r
9037e45d 213 // 32x test\r
214/*\r
215 if (a == 0xa130ec) { d = 0x4d41; goto end; } // MA\r
216 else if (a == 0xa130ee) { d = 0x5253; goto end; } // RS\r
217 else if (a == 0xa15100) { d = 0x0080; goto end; }\r
218 else\r
219*/\r
220\r
cc68a136 221 // for games with simple protection devices, discovered by Haze\r
222 // some dumb detection is used, but that should be enough to make things work\r
223 if ((a>>22) == 1 && Pico.romsize >= 512*1024) {\r
224 if (*(int *)(Pico.rom+0x123e4) == 0x00550c39 && *(int *)(Pico.rom+0x123e8) == 0x00000040) { // Super Bubble Bobble (Unl) [!]\r
4f672280 225 if (a == 0x400000) { d=0x55<<8; goto end; }\r
226 else if (a == 0x400002) { d=0x0f<<8; goto end; }\r
227 }\r
228 else if (*(int *)(Pico.rom+0x008c4) == 0x66240055 && *(int *)(Pico.rom+0x008c8) == 0x00404df9) { // Smart Mouse (Unl)\r
229 if (a == 0x400000) { d=0x55<<8; goto end; }\r
230 else if (a == 0x400002) { d=0x0f<<8; goto end; }\r
231 else if (a == 0x400004) { d=0xaa<<8; goto end; }\r
232 else if (a == 0x400006) { d=0xf0<<8; goto end; }\r
233 }\r
234 else if (*(int *)(Pico.rom+0x00404) == 0x00a90600 && *(int *)(Pico.rom+0x00408) == 0x6708b013) { // King of Fighters '98, The (Unl) [!]\r
235 if (a == 0x480000 || a == 0x4800e0 || a == 0x4824a0 || a == 0x488880) { d=0xaa<<8; goto end; }\r
236 else if (a == 0x4a8820) { d=0x0a<<8; goto end; }\r
237 // there is also a read @ 0x4F8820 which needs 0, but that is returned in default case\r
238 }\r
239 else if (*(int *)(Pico.rom+0x01b24) == 0x004013f9 && *(int *)(Pico.rom+0x01b28) == 0x00ff0000) { // Mahjong Lover (Unl) [!]\r
240 if (a == 0x400000) { d=0x90<<8; goto end; }\r
241 else if (a == 0x401000) { d=0xd3<<8; goto end; } // this one doesn't seem to be needed, the code does 2 comparisons and only then\r
242 // checks the result, which is of the above one. Left it just in case.\r
243 }\r
244 else if (*(int *)(Pico.rom+0x05254) == 0x0c3962d0 && *(int *)(Pico.rom+0x05258) == 0x00400055) { // Elf Wor (Unl)\r
245 if (a == 0x400000) { d=0x55<<8; goto end; }\r
246 else if (a == 0x400004) { d=0xc9<<8; goto end; } // this check is done if the above one fails\r
247 else if (a == 0x400002) { d=0x0f<<8; goto end; }\r
248 else if (a == 0x400006) { d=0x18<<8; goto end; } // similar to above\r
249 }\r
cc68a136 250 // our default behaviour is to return whatever was last written a 0x400000-0x7fffff range (used by Squirrel King (R) [!])\r
4f672280 251 // Lion King II, The (Unl) [!] writes @ 400000 and wants to get that val @ 400002 and wites another val\r
252 // @ 400004 which is expected @ 400006, so we really remember 2 values here\r
cc68a136 253 d = Pico.m.prot_bytes[(a>>2)&1]<<8;\r
254 }\r
255 else if (a == 0xa13000 && Pico.romsize >= 1024*1024) {\r
256 if (*(int *)(Pico.rom+0xc8af0) == 0x30133013 && *(int *)(Pico.rom+0xc8af4) == 0x000f0240) { // Rockman X3 (Unl) [!]\r
4f672280 257 d=0x0c; goto end;\r
258 }\r
cc68a136 259 else if (*(int *)(Pico.rom+0x28888) == 0x07fc0000 && *(int *)(Pico.rom+0x2888c) == 0x4eb94e75) { // Bug's Life, A (Unl) [!]\r
4f672280 260 d=0x28; goto end; // does the check from RAM\r
261 }\r
cc68a136 262 else if (*(int *)(Pico.rom+0xc8778) == 0x30133013 && *(int *)(Pico.rom+0xc877c) == 0x000f0240) { // Super Mario Bros. (Unl) [!]\r
4f672280 263 d=0x0c; goto end; // seems to be the same code as in Rockman X3 (Unl) [!]\r
264 }\r
cc68a136 265 else if (*(int *)(Pico.rom+0xf20ec) == 0x30143013 && *(int *)(Pico.rom+0xf20f0) == 0x000f0200) { // Super Mario 2 1998 (Unl) [!]\r
4f672280 266 d=0x0a; goto end;\r
267 }\r
cc68a136 268 }\r
269 else if (a == 0xa13002) { // Pocket Monsters (Unl)\r
270 d=0x01; goto end;\r
271 }\r
272 else if (a == 0xa1303E) { // Pocket Monsters (Unl)\r
273 d=0x1f; goto end;\r
274 }\r
275 else if (a == 0x30fe02) {\r
276 // Virtua Racing - just for fun\r
4f672280 277 // this seems to be some flag that SVP is ready or something similar\r
cc68a136 278 d=1; goto end;\r
279 }\r
280\r
281end:\r
1dceadae 282 elprintf(EL_UIO, "strange r%i: [%06x] %04x @%06x", realsize, a&0xffffff, d, SekPc);\r
cc68a136 283 return d;\r
284}\r
285\r
cc68a136 286\r
287//extern UINT32 mz80GetRegisterValue(void *, UINT32);\r
288\r
fa1e5e29 289static void OtherWrite8End(u32 a,u32 d,int realsize)\r
cc68a136 290{\r
cc68a136 291 // sram\r
cc68a136 292 if(a >= SRam.start && a <= SRam.end) {\r
1dceadae 293 elprintf(EL_SRAMIO, "sram w8 [%06x] %02x @ %06x", a, d, SekPc);\r
7969166e 294 SRAMWrite(a, d);\r
cc68a136 295 return;\r
296 }\r
297\r
298#ifdef _ASM_MEMORY_C\r
299 // special ROM hardware (currently only banking and sram reg supported)\r
300 if((a&0xfffff1) == 0xA130F1) {\r
301 PicoWriteRomHW_SSF2(a, d); // SSF2 or SRAM\r
302 return;\r
303 }\r
304#else\r
305 // sram access register\r
306 if(a == 0xA130F1) {\r
1dceadae 307 elprintf(EL_SRAMIO, "sram reg=%02x", d);\r
721cd396 308 Pico.m.sram_reg &= ~3;\r
309 Pico.m.sram_reg |= (u8)(d&3);\r
cc68a136 310 return;\r
311 }\r
312#endif\r
1dceadae 313 elprintf(EL_UIO, "strange w%i: %06x, %08x @%06x", realsize, a&0xffffff, d, SekPc);\r
cc68a136 314\r
cc68a136 315 // for games with simple protection devices, discovered by Haze\r
757f8dae 316 if ((a>>22) == 1)\r
cc68a136 317 Pico.m.prot_bytes[(a>>2)&1] = (u8)d;\r
318}\r
319\r
efcba75f 320#include "memory_cmn.c"\r
fa1e5e29 321\r
cc68a136 322\r
323// -----------------------------------------------------------------\r
324// Read Rom and read Ram\r
325\r
326#ifndef _ASM_MEMORY_C\r
8ab3e3c1 327PICO_INTERNAL_ASM u32 PicoRead8(u32 a)\r
cc68a136 328{\r
329 u32 d=0;\r
330\r
331 if ((a&0xe00000)==0xe00000) { d = *(u8 *)(Pico.ram+((a^1)&0xffff)); goto end; } // Ram\r
332\r
333 a&=0xffffff;\r
334\r
03e4f2a3 335#ifndef EMU_CORE_DEBUG\r
cc68a136 336 // sram\r
b5e5172d 337 if (a >= SRam.start && a <= SRam.end && (Pico.m.sram_reg&5)) {\r
7969166e 338 d = SRAMRead(a);\r
1dceadae 339 elprintf(EL_SRAMIO, "sram r8 [%06x] %02x @ %06x", a, d, SekPc);\r
7969166e 340 goto end;\r
cc68a136 341 }\r
342#endif\r
343\r
344 if (a<Pico.romsize) { d = *(u8 *)(Pico.rom+(a^1)); goto end; } // Rom\r
4f65685b 345 log_io(a, 8, 0);\r
cc68a136 346 if ((a&0xff4000)==0xa00000) { d=z80Read8(a); goto end; } // Z80 Ram\r
347\r
9761a7d0 348 if ((a&0xe700e0)==0xc00000) { d=PicoVideoRead8(a); goto end; } // VDP\r
c060a9ab 349\r
9761a7d0 350 d=OtherRead16(a&~1, 8);\r
b542be46 351 if ((a&1)==0) d>>=8;\r
352\r
81fda4e8 353end:\r
ca61ee42 354 elprintf(EL_IO, "r8 : %06x, %02x @%06x", a&0xffffff, (u8)d, SekPc);\r
03e4f2a3 355#ifdef EMU_CORE_DEBUG\r
b5e5172d 356 if (a>=Pico.romsize) {\r
cc68a136 357 lastread_a = a;\r
358 lastread_d[lrp_cyc++&15] = (u8)d;\r
359 }\r
360#endif\r
0af33fe0 361 return d;\r
cc68a136 362}\r
363\r
8ab3e3c1 364PICO_INTERNAL_ASM u32 PicoRead16(u32 a)\r
cc68a136 365{\r
0af33fe0 366 u32 d=0;\r
cc68a136 367\r
368 if ((a&0xe00000)==0xe00000) { d=*(u16 *)(Pico.ram+(a&0xfffe)); goto end; } // Ram\r
369\r
370 a&=0xfffffe;\r
371\r
03e4f2a3 372#ifndef EMU_CORE_DEBUG\r
cc68a136 373 // sram\r
b5e5172d 374 if (a >= SRam.start && a <= SRam.end && (Pico.m.sram_reg&5)) {\r
9dc09829 375 d = SRAMRead16(a);\r
1dceadae 376 elprintf(EL_SRAMIO, "sram r16 [%06x] %04x @ %06x", a, d, SekPc);\r
cc68a136 377 goto end;\r
378 }\r
379#endif\r
380\r
381 if (a<Pico.romsize) { d = *(u16 *)(Pico.rom+a); goto end; } // Rom\r
4f65685b 382 log_io(a, 16, 0);\r
cc68a136 383\r
b542be46 384 if ((a&0xe700e0)==0xc00000)\r
385 d = PicoVideoRead(a);\r
386 else d = OtherRead16(a, 16);\r
cc68a136 387\r
1dceadae 388end:\r
ca61ee42 389 elprintf(EL_IO, "r16: %06x, %04x @%06x", a&0xffffff, d, SekPc);\r
03e4f2a3 390#ifdef EMU_CORE_DEBUG\r
b5e5172d 391 if (a>=Pico.romsize) {\r
cc68a136 392 lastread_a = a;\r
393 lastread_d[lrp_cyc++&15] = d;\r
394 }\r
395#endif\r
396 return d;\r
397}\r
398\r
8ab3e3c1 399PICO_INTERNAL_ASM u32 PicoRead32(u32 a)\r
cc68a136 400{\r
401 u32 d=0;\r
402\r
403 if ((a&0xe00000)==0xe00000) { u16 *pm=(u16 *)(Pico.ram+(a&0xfffe)); d = (pm[0]<<16)|pm[1]; goto end; } // Ram\r
404\r
405 a&=0xfffffe;\r
406\r
407 // sram\r
7969166e 408 if(a >= SRam.start && a <= SRam.end && (Pico.m.sram_reg&5)) {\r
9dc09829 409 d = (SRAMRead16(a)<<16)|SRAMRead16(a+2);\r
1dceadae 410 elprintf(EL_SRAMIO, "sram r32 [%06x] %08x @ %06x", a, d, SekPc);\r
cc68a136 411 goto end;\r
412 }\r
413\r
414 if (a<Pico.romsize) { u16 *pm=(u16 *)(Pico.rom+a); d = (pm[0]<<16)|pm[1]; goto end; } // Rom\r
4f65685b 415 log_io(a, 32, 0);\r
cc68a136 416\r
b542be46 417 if ((a&0xe700e0)==0xc00000)\r
418 d = (PicoVideoRead(a)<<16)|PicoVideoRead(a+2);\r
419 else d = (OtherRead16(a, 32)<<16)|OtherRead16(a+2, 32);\r
cc68a136 420\r
1dceadae 421end:\r
ca61ee42 422 elprintf(EL_IO, "r32: %06x, %08x @%06x", a&0xffffff, d, SekPc);\r
03e4f2a3 423#ifdef EMU_CORE_DEBUG\r
b5e5172d 424 if (a>=Pico.romsize) {\r
cc68a136 425 lastread_a = a;\r
426 lastread_d[lrp_cyc++&15] = d;\r
427 }\r
428#endif\r
429 return d;\r
430}\r
431#endif\r
432\r
433// -----------------------------------------------------------------\r
434// Write Ram\r
435\r
3ec29f01 436#if !defined(_ASM_MEMORY_C) || defined(_ASM_MEMORY_C_AMIPS)\r
8ab3e3c1 437PICO_INTERNAL_ASM void PicoWrite8(u32 a,u8 d)\r
cc68a136 438{\r
ca61ee42 439 elprintf(EL_IO, "w8 : %06x, %02x @%06x", a&0xffffff, d, SekPc);\r
03e4f2a3 440#ifdef EMU_CORE_DEBUG\r
cc68a136 441 lastwrite_cyc_d[lwp_cyc++&15] = d;\r
442#endif\r
cc68a136 443\r
d9153729 444 if ((a&0xe00000)==0xe00000) { *(u8 *)(Pico.ram+((a^1)&0xffff))=d; return; } // Ram\r
4f65685b 445 log_io(a, 8, 1);\r
cc68a136 446\r
447 a&=0xffffff;\r
fb9bec94 448 OtherWrite8(a,d);\r
cc68a136 449}\r
e5503e2f 450#endif\r
cc68a136 451\r
8ab3e3c1 452void PicoWrite16(u32 a,u16 d)\r
cc68a136 453{\r
ca61ee42 454 elprintf(EL_IO, "w16: %06x, %04x", a&0xffffff, d);\r
03e4f2a3 455#ifdef EMU_CORE_DEBUG\r
cc68a136 456 lastwrite_cyc_d[lwp_cyc++&15] = d;\r
457#endif\r
cc68a136 458\r
459 if ((a&0xe00000)==0xe00000) { *(u16 *)(Pico.ram+(a&0xfffe))=d; return; } // Ram\r
4f65685b 460 log_io(a, 16, 1);\r
cc68a136 461\r
462 a&=0xfffffe;\r
b542be46 463 if ((a&0xe700e0)==0xc00000) { PicoVideoWrite(a,(u16)d); return; } // VDP\r
cc68a136 464 OtherWrite16(a,d);\r
465}\r
466\r
8ab3e3c1 467static void PicoWrite32(u32 a,u32 d)\r
cc68a136 468{\r
5f9a0d16 469 elprintf(EL_IO, "w32: %06x, %08x @%06x", a&0xffffff, d, SekPc);\r
03e4f2a3 470#ifdef EMU_CORE_DEBUG\r
cc68a136 471 lastwrite_cyc_d[lwp_cyc++&15] = d;\r
472#endif\r
473\r
474 if ((a&0xe00000)==0xe00000)\r
475 {\r
476 // Ram:\r
477 u16 *pm=(u16 *)(Pico.ram+(a&0xfffe));\r
478 pm[0]=(u16)(d>>16); pm[1]=(u16)d;\r
479 return;\r
480 }\r
4f65685b 481 log_io(a, 32, 1);\r
cc68a136 482\r
483 a&=0xfffffe;\r
b542be46 484 if ((a&0xe700e0)==0xc00000)\r
485 {\r
486 // VDP:\r
487 PicoVideoWrite(a, (u16)(d>>16));\r
488 PicoVideoWrite(a+2,(u16)d);\r
489 return;\r
490 }\r
491\r
cc68a136 492 OtherWrite16(a, (u16)(d>>16));\r
493 OtherWrite16(a+2,(u16)d);\r
494}\r
495\r
496\r
497// -----------------------------------------------------------------\r
f53f286a 498\r
f8ef8ff7 499static void OtherWrite16End(u32 a,u32 d,int realsize)\r
500{\r
501 PicoWrite8Hook(a, d>>8, realsize);\r
502 PicoWrite8Hook(a+1,d&0xff, realsize);\r
503}\r
f53f286a 504\r
f8ef8ff7 505u32 (*PicoRead16Hook) (u32 a, int realsize) = OtherRead16End;\r
506void (*PicoWrite8Hook) (u32 a, u32 d, int realsize) = OtherWrite8End;\r
507void (*PicoWrite16Hook)(u32 a, u32 d, int realsize) = OtherWrite16End;\r
508\r
509PICO_INTERNAL void PicoMemResetHooks(void)\r
cc68a136 510{\r
f53f286a 511 // default unmapped/cart specific handlers\r
512 PicoRead16Hook = OtherRead16End;\r
513 PicoWrite8Hook = OtherWrite8End;\r
f8ef8ff7 514 PicoWrite16Hook = OtherWrite16End;\r
515}\r
f53f286a 516\r
9037e45d 517#ifdef EMU_M68K\r
518static void m68k_mem_setup(void);\r
519#endif\r
520\r
f8ef8ff7 521PICO_INTERNAL void PicoMemSetup(void)\r
522{\r
cc68a136 523 // Setup memory callbacks:\r
70357ce5 524#ifdef EMU_C68K\r
3aa1e148 525 PicoCpuCM68k.checkpc=PicoCheckPc;\r
526 PicoCpuCM68k.fetch8 =PicoCpuCM68k.read8 =PicoRead8;\r
527 PicoCpuCM68k.fetch16=PicoCpuCM68k.read16=PicoRead16;\r
528 PicoCpuCM68k.fetch32=PicoCpuCM68k.read32=PicoRead32;\r
529 PicoCpuCM68k.write8 =PicoWrite8;\r
530 PicoCpuCM68k.write16=PicoWrite16;\r
531 PicoCpuCM68k.write32=PicoWrite32;\r
cc68a136 532#endif\r
70357ce5 533#ifdef EMU_F68K\r
3aa1e148 534 PicoCpuFM68k.read_byte =PicoRead8;\r
535 PicoCpuFM68k.read_word =PicoRead16;\r
536 PicoCpuFM68k.read_long =PicoRead32;\r
537 PicoCpuFM68k.write_byte=PicoWrite8;\r
538 PicoCpuFM68k.write_word=PicoWrite16;\r
539 PicoCpuFM68k.write_long=PicoWrite32;\r
540\r
541 // setup FAME fetchmap\r
542 {\r
543 int i;\r
9037e45d 544 // by default, point everything to first 64k of ROM\r
3aa1e148 545 for (i = 0; i < M68K_FETCHBANK1; i++)\r
546 PicoCpuFM68k.Fetch[i] = (unsigned int)Pico.rom - (i<<(24-FAMEC_FETCHBITS));\r
547 // now real ROM\r
548 for (i = 0; i < M68K_FETCHBANK1 && (i<<(24-FAMEC_FETCHBITS)) < Pico.romsize; i++)\r
549 PicoCpuFM68k.Fetch[i] = (unsigned int)Pico.rom;\r
550 // .. and RAM\r
551 for (i = M68K_FETCHBANK1*14/16; i < M68K_FETCHBANK1; i++)\r
552 PicoCpuFM68k.Fetch[i] = (unsigned int)Pico.ram - (i<<(24-FAMEC_FETCHBITS));\r
553 }\r
70357ce5 554#endif\r
9037e45d 555#ifdef EMU_M68K\r
556 m68k_mem_setup();\r
557#endif\r
c8d1e9b6 558\r
559 z80_mem_setup();\r
cc68a136 560}\r
561\r
9037e45d 562/* some nasty things below :( */\r
cc68a136 563#ifdef EMU_M68K\r
9037e45d 564unsigned int (*pm68k_read_memory_8) (unsigned int address) = NULL;\r
565unsigned int (*pm68k_read_memory_16)(unsigned int address) = NULL;\r
566unsigned int (*pm68k_read_memory_32)(unsigned int address) = NULL;\r
567void (*pm68k_write_memory_8) (unsigned int address, unsigned char value) = NULL;\r
568void (*pm68k_write_memory_16)(unsigned int address, unsigned short value) = NULL;\r
569void (*pm68k_write_memory_32)(unsigned int address, unsigned int value) = NULL;\r
570unsigned int (*pm68k_read_memory_pcr_8) (unsigned int address) = NULL;\r
571unsigned int (*pm68k_read_memory_pcr_16)(unsigned int address) = NULL;\r
572unsigned int (*pm68k_read_memory_pcr_32)(unsigned int address) = NULL;\r
573\r
574// these are here for core debugging mode\r
b5e5172d 575static unsigned int m68k_read_8 (unsigned int a, int do_fake)\r
576{\r
cc68a136 577 a&=0xffffff;\r
b5e5172d 578 if(a<Pico.romsize && m68ki_cpu_p==&PicoCpuMM68k) return *(u8 *)(Pico.rom+(a^1)); // Rom\r
03e4f2a3 579#ifdef EMU_CORE_DEBUG\r
2d0b15bb 580 if(do_fake&&((ppop&0x3f)==0x3a||(ppop&0x3f)==0x3b)) return lastread_d[lrp_mus++&15];\r
2270612a 581#endif\r
9037e45d 582 return pm68k_read_memory_pcr_8(a);\r
cc68a136 583}\r
b5e5172d 584static unsigned int m68k_read_16(unsigned int a, int do_fake)\r
585{\r
cc68a136 586 a&=0xffffff;\r
b5e5172d 587 if(a<Pico.romsize && m68ki_cpu_p==&PicoCpuMM68k) return *(u16 *)(Pico.rom+(a&~1)); // Rom\r
03e4f2a3 588#ifdef EMU_CORE_DEBUG\r
2d0b15bb 589 if(do_fake&&((ppop&0x3f)==0x3a||(ppop&0x3f)==0x3b)) return lastread_d[lrp_mus++&15];\r
2270612a 590#endif\r
9037e45d 591 return pm68k_read_memory_pcr_16(a);\r
cc68a136 592}\r
b5e5172d 593static unsigned int m68k_read_32(unsigned int a, int do_fake)\r
594{\r
cc68a136 595 a&=0xffffff;\r
b5e5172d 596 if(a<Pico.romsize && m68ki_cpu_p==&PicoCpuMM68k) { u16 *pm=(u16 *)(Pico.rom+(a&~1)); return (pm[0]<<16)|pm[1]; }\r
03e4f2a3 597#ifdef EMU_CORE_DEBUG\r
2d0b15bb 598 if(do_fake&&((ppop&0x3f)==0x3a||(ppop&0x3f)==0x3b)) return lastread_d[lrp_mus++&15];\r
2270612a 599#endif\r
9037e45d 600 return pm68k_read_memory_pcr_32(a);\r
cc68a136 601}\r
602\r
2d0b15bb 603unsigned int m68k_read_pcrelative_8 (unsigned int a) { return m68k_read_8 (a, 1); }\r
604unsigned int m68k_read_pcrelative_16(unsigned int a) { return m68k_read_16(a, 1); }\r
605unsigned int m68k_read_pcrelative_32(unsigned int a) { return m68k_read_32(a, 1); }\r
606unsigned int m68k_read_immediate_16(unsigned int a) { return m68k_read_16(a, 0); }\r
607unsigned int m68k_read_immediate_32(unsigned int a) { return m68k_read_32(a, 0); }\r
608unsigned int m68k_read_disassembler_8 (unsigned int a) { return m68k_read_8 (a, 0); }\r
609unsigned int m68k_read_disassembler_16(unsigned int a) { return m68k_read_16(a, 0); }\r
610unsigned int m68k_read_disassembler_32(unsigned int a) { return m68k_read_32(a, 0); }\r
cc68a136 611\r
9037e45d 612static unsigned int m68k_read_memory_pcr_8(unsigned int a)\r
613{\r
614 if((a&0xe00000)==0xe00000) return *(u8 *)(Pico.ram+((a^1)&0xffff)); // Ram\r
615 return 0;\r
616}\r
617\r
618static unsigned int m68k_read_memory_pcr_16(unsigned int a)\r
619{\r
620 if((a&0xe00000)==0xe00000) return *(u16 *)(Pico.ram+(a&0xfffe)); // Ram\r
621 return 0;\r
622}\r
623\r
624static unsigned int m68k_read_memory_pcr_32(unsigned int a)\r
625{\r
626 if((a&0xe00000)==0xe00000) { u16 *pm=(u16 *)(Pico.ram+(a&0xfffe)); return (pm[0]<<16)|pm[1]; } // Ram\r
627 return 0;\r
628}\r
629\r
03e4f2a3 630#ifdef EMU_CORE_DEBUG\r
cc68a136 631// ROM only\r
2d0b15bb 632unsigned int m68k_read_memory_8(unsigned int a)\r
633{\r
634 u8 d;\r
b5e5172d 635 if (a<Pico.romsize && m68ki_cpu_p==&PicoCpuMM68k)\r
636 d = *(u8 *) (Pico.rom+(a^1));\r
2d0b15bb 637 else d = (u8) lastread_d[lrp_mus++&15];\r
ca61ee42 638 elprintf(EL_IO, "r8_mu : %06x, %02x @%06x", a&0xffffff, d, SekPc);\r
2d0b15bb 639 return d;\r
640}\r
641unsigned int m68k_read_memory_16(unsigned int a)\r
642{\r
643 u16 d;\r
b5e5172d 644 if (a<Pico.romsize && m68ki_cpu_p==&PicoCpuMM68k)\r
645 d = *(u16 *)(Pico.rom+(a&~1));\r
2d0b15bb 646 else d = (u16) lastread_d[lrp_mus++&15];\r
ca61ee42 647 elprintf(EL_IO, "r16_mu: %06x, %04x @%06x", a&0xffffff, d, SekPc);\r
2d0b15bb 648 return d;\r
649}\r
650unsigned int m68k_read_memory_32(unsigned int a)\r
651{\r
652 u32 d;\r
b5e5172d 653 if (a<Pico.romsize && m68ki_cpu_p==&PicoCpuMM68k)\r
654 { u16 *pm=(u16 *)(Pico.rom+(a&~1));d=(pm[0]<<16)|pm[1]; }\r
655 else if (a <= 0x78) d = m68k_read_32(a, 0);\r
2d0b15bb 656 else d = lastread_d[lrp_mus++&15];\r
ca61ee42 657 elprintf(EL_IO, "r32_mu: %06x, %08x @%06x", a&0xffffff, d, SekPc);\r
2d0b15bb 658 return d;\r
659}\r
cc68a136 660\r
661// ignore writes, Cyclone already done that\r
662void m68k_write_memory_8(unsigned int address, unsigned int value) { lastwrite_mus_d[lwp_mus++&15] = value; }\r
663void m68k_write_memory_16(unsigned int address, unsigned int value) { lastwrite_mus_d[lwp_mus++&15] = value; }\r
664void m68k_write_memory_32(unsigned int address, unsigned int value) { lastwrite_mus_d[lwp_mus++&15] = value; }\r
cc68a136 665\r
9037e45d 666#else // if !EMU_CORE_DEBUG\r
cc68a136 667\r
9037e45d 668/* it appears that Musashi doesn't always mask the unused bits */\r
669unsigned int m68k_read_memory_8 (unsigned int address) { return pm68k_read_memory_8 (address) & 0xff; }\r
670unsigned int m68k_read_memory_16(unsigned int address) { return pm68k_read_memory_16(address) & 0xffff; }\r
671unsigned int m68k_read_memory_32(unsigned int address) { return pm68k_read_memory_32(address); }\r
672void m68k_write_memory_8 (unsigned int address, unsigned int value) { pm68k_write_memory_8 (address, (u8)value); }\r
673void m68k_write_memory_16(unsigned int address, unsigned int value) { pm68k_write_memory_16(address,(u16)value); }\r
674void m68k_write_memory_32(unsigned int address, unsigned int value) { pm68k_write_memory_32(address, value); }\r
675#endif // !EMU_CORE_DEBUG\r
676\r
677static void m68k_mem_setup(void)\r
678{\r
679 pm68k_read_memory_8 = PicoRead8;\r
680 pm68k_read_memory_16 = PicoRead16;\r
681 pm68k_read_memory_32 = PicoRead32;\r
682 pm68k_write_memory_8 = PicoWrite8;\r
683 pm68k_write_memory_16 = PicoWrite16;\r
684 pm68k_write_memory_32 = PicoWrite32;\r
685 pm68k_read_memory_pcr_8 = m68k_read_memory_pcr_8;\r
686 pm68k_read_memory_pcr_16 = m68k_read_memory_pcr_16;\r
687 pm68k_read_memory_pcr_32 = m68k_read_memory_pcr_32;\r
cc68a136 688}\r
cc68a136 689#endif // EMU_M68K\r
690\r
691\r
4b9c5888 692// -----------------------------------------------------------------\r
693\r
4b9c5888 694static int get_scanline(int is_from_z80)\r
695{\r
696 if (is_from_z80) {\r
697 int cycles = z80_cyclesDone();\r
698 while (cycles - z80_scanline_cycles >= 228)\r
699 z80_scanline++, z80_scanline_cycles += 228;\r
700 return z80_scanline;\r
701 }\r
702\r
2aa27095 703 return Pico.m.scanline;\r
4b9c5888 704}\r
705\r
48dc74f2 706/* probably should not be in this file, but it's near related code here */\r
43e6eaad 707void ym2612_sync_timers(int z80_cycles, int mode_old, int mode_new)\r
708{\r
709 int xcycles = z80_cycles << 8;\r
710\r
711 /* check for overflows */\r
712 if ((mode_old & 4) && xcycles > timer_a_next_oflow)\r
713 ym2612.OPN.ST.status |= 1;\r
714\r
715 if ((mode_old & 8) && xcycles > timer_b_next_oflow)\r
716 ym2612.OPN.ST.status |= 2;\r
717\r
718 /* update timer a */\r
719 if (mode_old & 1)\r
e53704e6 720 while (xcycles > timer_a_next_oflow)\r
43e6eaad 721 timer_a_next_oflow += timer_a_step;\r
722\r
723 if ((mode_old ^ mode_new) & 1) // turning on/off\r
724 {\r
48dc74f2 725 if (mode_old & 1)\r
e53704e6 726 timer_a_next_oflow = TIMER_NO_OFLOW;\r
43e6eaad 727 else\r
48dc74f2 728 timer_a_next_oflow = xcycles + timer_a_step;\r
43e6eaad 729 }\r
730 if (mode_new & 1)\r
731 elprintf(EL_YMTIMER, "timer a upd to %i @ %i", timer_a_next_oflow>>8, z80_cycles);\r
732\r
733 /* update timer b */\r
734 if (mode_old & 2)\r
e53704e6 735 while (xcycles > timer_b_next_oflow)\r
43e6eaad 736 timer_b_next_oflow += timer_b_step;\r
737\r
738 if ((mode_old ^ mode_new) & 2)\r
739 {\r
48dc74f2 740 if (mode_old & 2)\r
e53704e6 741 timer_b_next_oflow = TIMER_NO_OFLOW;\r
43e6eaad 742 else\r
48dc74f2 743 timer_b_next_oflow = xcycles + timer_b_step;\r
43e6eaad 744 }\r
745 if (mode_new & 2)\r
746 elprintf(EL_YMTIMER, "timer b upd to %i @ %i", timer_b_next_oflow>>8, z80_cycles);\r
747}\r
748\r
4b9c5888 749// ym2612 DAC and timer I/O handlers for z80\r
750int ym2612_write_local(u32 a, u32 d, int is_from_z80)\r
751{\r
752 int addr;\r
753\r
754 a &= 3;\r
755 if (a == 1 && ym2612.OPN.ST.address == 0x2a) /* DAC data */\r
756 {\r
757 int scanline = get_scanline(is_from_z80);\r
758 //elprintf(EL_STATUS, "%03i -> %03i dac w %08x z80 %i", PsndDacLine, scanline, d, is_from_z80);\r
759 ym2612.dacout = ((int)d - 0x80) << 6;\r
760 if (PsndOut && ym2612.dacen && scanline >= PsndDacLine)\r
761 PsndDoDAC(scanline);\r
762 return 0;\r
763 }\r
764\r
765 switch (a)\r
766 {\r
767 case 0: /* address port 0 */\r
768 ym2612.OPN.ST.address = d;\r
769 ym2612.addr_A1 = 0;\r
770#ifdef __GP2X__\r
771 if (PicoOpt & POPT_EXT_FM) YM2612Write_940(a, d, -1);\r
772#endif\r
773 return 0;\r
774\r
775 case 1: /* data port 0 */\r
776 if (ym2612.addr_A1 != 0)\r
777 return 0;\r
778\r
779 addr = ym2612.OPN.ST.address;\r
780 ym2612.REGS[addr] = d;\r
781\r
782 switch (addr)\r
783 {\r
784 case 0x24: // timer A High 8\r
785 case 0x25: { // timer A Low 2\r
786 int TAnew = (addr == 0x24) ? ((ym2612.OPN.ST.TA & 0x03)|(((int)d)<<2))\r
787 : ((ym2612.OPN.ST.TA & 0x3fc)|(d&3));\r
788 if (ym2612.OPN.ST.TA != TAnew)\r
789 {\r
790 //elprintf(EL_STATUS, "timer a set %i", TAnew);\r
791 ym2612.OPN.ST.TA = TAnew;\r
e53704e6 792 //ym2612.OPN.ST.TAC = (1024-TAnew)*18;\r
4b9c5888 793 //ym2612.OPN.ST.TAT = 0;\r
48dc74f2 794 timer_a_step = TIMER_A_TICK_ZCYCLES * (1024 - TAnew);\r
43e6eaad 795 if (ym2612.OPN.ST.mode & 1) {\r
48dc74f2 796 // this is not right, should really be done on overflow only\r
4b9c5888 797 int cycles = is_from_z80 ? z80_cyclesDone() : cycles_68k_to_z80(SekCyclesDone());\r
798 timer_a_next_oflow = (cycles << 8) + timer_a_step;\r
4b9c5888 799 }\r
43e6eaad 800 elprintf(EL_YMTIMER, "timer a set to %i, %i", 1024 - TAnew, timer_a_next_oflow>>8);\r
4b9c5888 801 }\r
802 return 0;\r
803 }\r
804 case 0x26: // timer B\r
805 if (ym2612.OPN.ST.TB != d) {\r
806 //elprintf(EL_STATUS, "timer b set %i", d);\r
807 ym2612.OPN.ST.TB = d;\r
e53704e6 808 //ym2612.OPN.ST.TBC = (256-d) * 288;\r
4b9c5888 809 //ym2612.OPN.ST.TBT = 0;\r
48dc74f2 810 timer_b_step = TIMER_B_TICK_ZCYCLES * (256 - d); // 262800\r
43e6eaad 811 if (ym2612.OPN.ST.mode & 2) {\r
812 int cycles = is_from_z80 ? z80_cyclesDone() : cycles_68k_to_z80(SekCyclesDone());\r
813 timer_b_next_oflow = (cycles << 8) + timer_b_step;\r
814 }\r
815 elprintf(EL_YMTIMER, "timer b set to %i, %i", 256 - d, timer_b_next_oflow>>8);\r
4b9c5888 816 }\r
817 return 0;\r
818 case 0x27: { /* mode, timer control */\r
819 int old_mode = ym2612.OPN.ST.mode;\r
43e6eaad 820 int cycles = is_from_z80 ? z80_cyclesDone() : cycles_68k_to_z80(SekCyclesDone());\r
821 ym2612.OPN.ST.mode = d;\r
4b9c5888 822\r
43e6eaad 823 elprintf(EL_YMTIMER, "st mode %02x", d);\r
824 ym2612_sync_timers(cycles, old_mode, d);\r
4b9c5888 825\r
43e6eaad 826 /* reset Timer a flag */\r
827 if (d & 0x10)\r
828 ym2612.OPN.ST.status &= ~1;\r
4b9c5888 829\r
830 /* reset Timer b flag */\r
831 if (d & 0x20)\r
832 ym2612.OPN.ST.status &= ~2;\r
833\r
43e6eaad 834 if ((d ^ old_mode) & 0xc0) {\r
4b9c5888 835#ifdef __GP2X__\r
52250671 836 if (PicoOpt & POPT_EXT_FM) return YM2612Write_940(a, d, get_scanline(is_from_z80));\r
4b9c5888 837#endif\r
43e6eaad 838 return 1;\r
839 }\r
4b9c5888 840 return 0;\r
841 }\r
842 case 0x2b: { /* DAC Sel (YM2612) */\r
843 int scanline = get_scanline(is_from_z80);\r
844 ym2612.dacen = d & 0x80;\r
845 if (d & 0x80) PsndDacLine = scanline;\r
846#ifdef __GP2X__\r
847 if (PicoOpt & POPT_EXT_FM) YM2612Write_940(a, d, scanline);\r
848#endif\r
849 return 0;\r
850 }\r
851 }\r
852 break;\r
853\r
854 case 2: /* address port 1 */\r
855 ym2612.OPN.ST.address = d;\r
856 ym2612.addr_A1 = 1;\r
857#ifdef __GP2X__\r
858 if (PicoOpt & POPT_EXT_FM) YM2612Write_940(a, d, -1);\r
859#endif\r
860 return 0;\r
861\r
862 case 3: /* data port 1 */\r
863 if (ym2612.addr_A1 != 1)\r
864 return 0;\r
865\r
866 addr = ym2612.OPN.ST.address | 0x100;\r
867 ym2612.REGS[addr] = d;\r
868 break;\r
869 }\r
870\r
871#ifdef __GP2X__\r
872 if (PicoOpt & POPT_EXT_FM)\r
873 return YM2612Write_940(a, d, get_scanline(is_from_z80));\r
874#endif\r
875 return YM2612Write_(a, d);\r
876}\r
877\r
453d2a6e 878\r
43e6eaad 879#define ym2612_read_local() \\r
880 if (xcycles >= timer_a_next_oflow) \\r
881 ym2612.OPN.ST.status |= (ym2612.OPN.ST.mode >> 2) & 1; \\r
882 if (xcycles >= timer_b_next_oflow) \\r
883 ym2612.OPN.ST.status |= (ym2612.OPN.ST.mode >> 2) & 2\r
884\r
c8d1e9b6 885static u32 MEMH_FUNC ym2612_read_local_z80(void)\r
4b9c5888 886{\r
887 int xcycles = z80_cyclesDone() << 8;\r
4b9c5888 888\r
43e6eaad 889 ym2612_read_local();\r
890\r
891 elprintf(EL_YMTIMER, "timer z80 read %i, sched %i, %i @ %i|%i", ym2612.OPN.ST.status,\r
892 timer_a_next_oflow>>8, timer_b_next_oflow>>8, xcycles >> 8, (xcycles >> 8) / 228);\r
893 return ym2612.OPN.ST.status;\r
894}\r
895\r
896u32 ym2612_read_local_68k(void)\r
897{\r
898 int xcycles = cycles_68k_to_z80(SekCyclesDone()) << 8;\r
899\r
900 ym2612_read_local();\r
901\r
902 elprintf(EL_YMTIMER, "timer 68k read %i, sched %i, %i @ %i|%i", ym2612.OPN.ST.status,\r
903 timer_a_next_oflow>>8, timer_b_next_oflow>>8, xcycles >> 8, (xcycles >> 8) / 228);\r
4b9c5888 904 return ym2612.OPN.ST.status;\r
905}\r
906\r
d2721b08 907void ym2612_pack_state(void)\r
908{\r
e53704e6 909 // timers are saved as tick counts, in 16.16 int format\r
910 int tac, tat = 0, tbc, tbt = 0;\r
911 tac = 1024 - ym2612.OPN.ST.TA;\r
912 tbc = 256 - ym2612.OPN.ST.TB;\r
913 if (timer_a_next_oflow != TIMER_NO_OFLOW)\r
914 tat = (int)((double)(timer_a_step - timer_a_next_oflow) / (double)timer_a_step * tac * 65536);\r
915 if (timer_b_next_oflow != TIMER_NO_OFLOW)\r
916 tbt = (int)((double)(timer_b_step - timer_b_next_oflow) / (double)timer_b_step * tbc * 65536);\r
917 elprintf(EL_YMTIMER, "save: timer a %i/%i", tat >> 16, tac);\r
918 elprintf(EL_YMTIMER, "save: timer b %i/%i", tbt >> 16, tbc);\r
919\r
d2721b08 920#ifdef __GP2X__\r
921 if (PicoOpt & POPT_EXT_FM)\r
e4fb433c 922 YM2612PicoStateSave2_940(tat, tbt);\r
d2721b08 923 else\r
924#endif\r
e53704e6 925 YM2612PicoStateSave2(tat, tbt);\r
d2721b08 926}\r
927\r
453d2a6e 928void ym2612_unpack_state(void)\r
929{\r
e53704e6 930 int i, ret, tac, tat, tbc, tbt;\r
453d2a6e 931 YM2612PicoStateLoad();\r
932\r
933 // feed all the registers and update internal state\r
db49317b 934 for (i = 0x20; i < 0xA0; i++) {\r
453d2a6e 935 ym2612_write_local(0, i, 0);\r
936 ym2612_write_local(1, ym2612.REGS[i], 0);\r
937 }\r
db49317b 938 for (i = 0x30; i < 0xA0; i++) {\r
939 ym2612_write_local(2, i, 0);\r
940 ym2612_write_local(3, ym2612.REGS[i|0x100], 0);\r
941 }\r
942 for (i = 0xAF; i >= 0xA0; i--) { // must apply backwards\r
943 ym2612_write_local(2, i, 0);\r
944 ym2612_write_local(3, ym2612.REGS[i|0x100], 0);\r
945 ym2612_write_local(0, i, 0);\r
946 ym2612_write_local(1, ym2612.REGS[i], 0);\r
947 }\r
948 for (i = 0xB0; i < 0xB8; i++) {\r
949 ym2612_write_local(0, i, 0);\r
950 ym2612_write_local(1, ym2612.REGS[i], 0);\r
453d2a6e 951 ym2612_write_local(2, i, 0);\r
952 ym2612_write_local(3, ym2612.REGS[i|0x100], 0);\r
953 }\r
d2721b08 954\r
955#ifdef __GP2X__\r
956 if (PicoOpt & POPT_EXT_FM)\r
e4fb433c 957 ret = YM2612PicoStateLoad2_940(&tat, &tbt);\r
d2721b08 958 else\r
959#endif\r
960 ret = YM2612PicoStateLoad2(&tat, &tbt);\r
db49317b 961 if (ret != 0) {\r
962 elprintf(EL_STATUS, "old ym2612 state");\r
963 return; // no saved timers\r
964 }\r
e53704e6 965\r
966 tac = (1024 - ym2612.OPN.ST.TA) << 16;\r
967 tbc = (256 - ym2612.OPN.ST.TB) << 16;\r
968 if (ym2612.OPN.ST.mode & 1)\r
48dc74f2 969 timer_a_next_oflow = (int)((double)(tac - tat) / (double)tac * timer_a_step);\r
e53704e6 970 else\r
971 timer_a_next_oflow = TIMER_NO_OFLOW;\r
972 if (ym2612.OPN.ST.mode & 2)\r
48dc74f2 973 timer_b_next_oflow = (int)((double)(tbc - tbt) / (double)tbc * timer_b_step);\r
e53704e6 974 else\r
975 timer_b_next_oflow = TIMER_NO_OFLOW;\r
976 elprintf(EL_YMTIMER, "load: %i/%i, timer_a_next_oflow %i", tat>>16, tac>>16, timer_a_next_oflow >> 8);\r
977 elprintf(EL_YMTIMER, "load: %i/%i, timer_b_next_oflow %i", tbt>>16, tbc>>16, timer_b_next_oflow >> 8);\r
453d2a6e 978}\r
979\r
cc68a136 980// -----------------------------------------------------------------\r
981// z80 memhandlers\r
982\r
c8d1e9b6 983static unsigned char MEMH_FUNC z80_md_vdp_read(unsigned short a)\r
cc68a136 984{\r
c8d1e9b6 985 // TODO?\r
986 elprintf(EL_ANOMALY, "z80 invalid r8 [%06x] %02x", a, 0xff);\r
987 return 0xff;\r
988}\r
cc68a136 989\r
c8d1e9b6 990static unsigned char MEMH_FUNC z80_md_bank_read(unsigned short a)\r
991{\r
992 extern unsigned int PicoReadM68k8(unsigned int a);\r
993 unsigned int addr68k;\r
994 unsigned char ret;\r
cc68a136 995\r
c8d1e9b6 996 addr68k = Pico.m.z80_bank68k<<15;\r
997 addr68k += a & 0x7fff;\r
998\r
999 if (addr68k < Pico.romsize) {\r
1000 ret = Pico.rom[addr68k^1];\r
1001 goto out;\r
cc68a136 1002 }\r
1003\r
c8d1e9b6 1004 elprintf(EL_ANOMALY, "z80->68k upper read [%06x] %02x", addr68k, ret);\r
1005 if (PicoAHW & PAHW_MCD)\r
1006 ret = PicoReadM68k8(addr68k);\r
1007 else ret = PicoRead8(addr68k);\r
cc68a136 1008\r
c8d1e9b6 1009out:\r
1010 elprintf(EL_Z80BNK, "z80->68k r8 [%06x] %02x", addr68k, ret);\r
cc68a136 1011 return ret;\r
1012}\r
1013\r
c8d1e9b6 1014static void MEMH_FUNC z80_md_ym2612_write(unsigned int a, unsigned char data)\r
cc68a136 1015{\r
c8d1e9b6 1016 if (PicoOpt & POPT_EN_FM)\r
1017 emustatus |= ym2612_write_local(a, data, 1) & 1;\r
1018}\r
cc68a136 1019\r
c8d1e9b6 1020static void MEMH_FUNC z80_md_vdp_br_write(unsigned int a, unsigned char data)\r
1021{\r
1022 // TODO: allow full VDP access\r
1023 if ((a&0xfff9) == 0x7f11) // 7f11 7f13 7f15 7f17\r
cc68a136 1024 {\r
c8d1e9b6 1025 if (PicoOpt & POPT_EN_PSG)\r
1026 SN76496Write(data);\r
cc68a136 1027 return;\r
1028 }\r
1029\r
c8d1e9b6 1030 if ((a>>8) == 0x60)\r
cc68a136 1031 {\r
c8d1e9b6 1032 Pico.m.z80_bank68k >>= 1;\r
1033 Pico.m.z80_bank68k |= data << 8;\r
1034 Pico.m.z80_bank68k &= 0x1ff; // 9 bits and filled in the new top one\r
cc68a136 1035 return;\r
1036 }\r
1037\r
c8d1e9b6 1038 elprintf(EL_ANOMALY, "z80 invalid w8 [%06x] %02x", a, data);\r
1039}\r
cc68a136 1040\r
c8d1e9b6 1041static void MEMH_FUNC z80_md_bank_write(unsigned int a, unsigned char data)\r
1042{\r
1043 extern void PicoWriteM68k8(unsigned int a, unsigned char d);\r
1044 unsigned int addr68k;\r
69996cb7 1045\r
c8d1e9b6 1046 addr68k = Pico.m.z80_bank68k << 15;\r
1047 addr68k += a & 0x7fff;\r
1048\r
1049 elprintf(EL_Z80BNK, "z80->68k w8 [%06x] %02x", addr68k, data);\r
1050 if (PicoAHW & PAHW_MCD)\r
1051 PicoWriteM68k8(addr68k, data);\r
1052 else PicoWrite8(addr68k, data);\r
cc68a136 1053}\r
1054\r
c8d1e9b6 1055// -----------------------------------------------------------------\r
1056\r
1057static unsigned char z80_md_in(unsigned short p)\r
a4221917 1058{\r
c8d1e9b6 1059 elprintf(EL_ANOMALY, "Z80 port %04x read", p);\r
1060 return 0xff;\r
a4221917 1061}\r
1062\r
c8d1e9b6 1063static void z80_md_out(unsigned short p, unsigned char d)\r
cc68a136 1064{\r
c8d1e9b6 1065 elprintf(EL_ANOMALY, "Z80 port %04x write %02x", p, d);\r
cc68a136 1066}\r
c8d1e9b6 1067\r
d8f51995 1068void z80_mem_setup(void)\r
c8d1e9b6 1069{\r
1070 z80_map_set(z80_read_map, 0x0000, 0x1fff, Pico.zram, 0);\r
1071 z80_map_set(z80_read_map, 0x2000, 0x3fff, Pico.zram, 0);\r
1072 z80_map_set(z80_read_map, 0x4000, 0x5fff, ym2612_read_local_z80, 1);\r
1073 z80_map_set(z80_read_map, 0x6000, 0x7fff, z80_md_vdp_read, 1);\r
1074 z80_map_set(z80_read_map, 0x8000, 0xffff, z80_md_bank_read, 1);\r
1075\r
1076 z80_map_set(z80_write_map, 0x0000, 0x1fff, Pico.zram, 0);\r
1077 z80_map_set(z80_write_map, 0x2000, 0x3fff, Pico.zram, 0);\r
1078 z80_map_set(z80_write_map, 0x4000, 0x5fff, z80_md_ym2612_write, 1);\r
1079 z80_map_set(z80_write_map, 0x6000, 0x7fff, z80_md_vdp_br_write, 1);\r
1080 z80_map_set(z80_write_map, 0x8000, 0xffff, z80_md_bank_write, 1);\r
1081\r
1082#ifdef _USE_DRZ80\r
1083 drZ80.z80_in = z80_md_in;\r
1084 drZ80.z80_out = z80_md_out;\r
1085#endif\r
1086#ifdef _USE_CZ80\r
1087 Cz80_Set_Fetch(&CZ80, 0x0000, 0x1fff, (UINT32)Pico.zram); // main RAM\r
1088 Cz80_Set_Fetch(&CZ80, 0x2000, 0x3fff, (UINT32)Pico.zram); // mirror\r
1089 Cz80_Set_INPort(&CZ80, z80_md_in);\r
1090 Cz80_Set_OUTPort(&CZ80, z80_md_out);\r
a4221917 1091#endif\r
c8d1e9b6 1092}\r
cc68a136 1093\r