d9fc2fe1 |
1 | // PicoDrive\r |
cc68a136 |
2 | \r |
3 | // (c) Copyright 2004 Dave, All rights reserved.\r |
d9fc2fe1 |
4 | // (c) Copyright 2006-2008 notaz, All rights reserved.\r |
cc68a136 |
5 | // Free for non-commercial use.\r |
6 | \r |
7 | // For commercial use, separate licencing terms must be obtained.\r |
8 | \r |
9 | \r |
efcba75f |
10 | #include "pico_int.h"\r |
cc68a136 |
11 | #include "sound/ym2612.h"\r |
12 | \r |
69996cb7 |
13 | int PicoVer=0x0133;\r |
cc68a136 |
14 | struct Pico Pico;\r |
602133e1 |
15 | int PicoOpt = 0;\r |
16 | int PicoSkipFrame = 0; // skip rendering frame?\r |
17 | int emustatus = 0; // rapid_ym2612, multi_ym_updates\r |
2b02d6e5 |
18 | int PicoPad[2]; // Joypads, format is MXYZ SACB RLDU\r |
5f9a0d16 |
19 | int PicoPadInt[2]; // internal copy\r |
9037e45d |
20 | int PicoAHW = 0; // active addon hardware: scd_active, 32x_active, svp_active, pico_active\r |
cc68a136 |
21 | int PicoRegionOverride = 0; // override the region detection 0: Auto, 1: Japan NTSC, 2: Japan PAL, 4: US, 8: Europe\r |
51a902ae |
22 | int PicoAutoRgnOrder = 0;\r |
602133e1 |
23 | struct PicoSRAM SRam = {0,};\r |
24 | \r |
f8ef8ff7 |
25 | void (*PicoWriteSound)(int len) = NULL; // called at the best time to send sound buffer (PsndOut) to hardware\r |
26 | void (*PicoResetHook)(void) = NULL;\r |
b0677887 |
27 | void (*PicoLineHook)(void) = NULL;\r |
cc68a136 |
28 | \r |
cc68a136 |
29 | // to be called once on emu init\r |
2aa27095 |
30 | void PicoInit(void)\r |
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31 | {\r |
32 | // Blank space for state:\r |
33 | memset(&Pico,0,sizeof(Pico));\r |
34 | memset(&PicoPad,0,sizeof(PicoPad));\r |
5f9a0d16 |
35 | memset(&PicoPadInt,0,sizeof(PicoPadInt));\r |
cc68a136 |
36 | \r |
37 | // Init CPUs:\r |
38 | SekInit();\r |
39 | z80_init(); // init even if we aren't going to use it\r |
40 | \r |
cc68a136 |
41 | PicoInitMCD();\r |
e807ac75 |
42 | PicoSVPInit();\r |
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43 | \r |
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44 | SRam.data=0;\r |
cc68a136 |
45 | }\r |
46 | \r |
47 | // to be called once on emu exit\r |
48 | void PicoExit(void)\r |
49 | {\r |
602133e1 |
50 | if (PicoAHW & PAHW_MCD)\r |
4f265db7 |
51 | PicoExitMCD();\r |
ca482e5d |
52 | PicoCartUnload();\r |
cc68a136 |
53 | z80_exit();\r |
54 | \r |
1cb1584b |
55 | if (SRam.data) free(SRam.data); SRam.data=0;\r |
cc68a136 |
56 | }\r |
57 | \r |
1cb1584b |
58 | void PicoPower(void)\r |
59 | {\r |
af37bca8 |
60 | unsigned char sram_status = Pico.m.sram_status; // must be preserved\r |
583ab72c |
61 | \r |
053fd9b4 |
62 | Pico.m.frame_count = 0;\r |
63 | \r |
1cb1584b |
64 | // clear all memory of the emulated machine\r |
65 | memset(&Pico.ram,0,(unsigned int)&Pico.rom-(unsigned int)&Pico.ram);\r |
66 | \r |
67 | memset(&Pico.video,0,sizeof(Pico.video));\r |
68 | memset(&Pico.m,0,sizeof(Pico.m));\r |
69 | \r |
70 | Pico.video.pending_ints=0;\r |
71 | z80_reset();\r |
72 | \r |
73 | // default VDP register values (based on Fusion)\r |
74 | Pico.video.reg[0] = Pico.video.reg[1] = 0x04;\r |
75 | Pico.video.reg[0xc] = 0x81;\r |
76 | Pico.video.reg[0xf] = 0x02;\r |
77 | \r |
602133e1 |
78 | if (PicoAHW & PAHW_MCD)\r |
1cb1584b |
79 | PicoPowerMCD();\r |
80 | \r |
af37bca8 |
81 | Pico.m.sram_status = sram_status;\r |
1cb1584b |
82 | PicoReset();\r |
83 | }\r |
84 | \r |
1e6b5e39 |
85 | PICO_INTERNAL void PicoDetectRegion(void)\r |
cc68a136 |
86 | {\r |
1e6b5e39 |
87 | int support=0, hw=0, i;\r |
cc68a136 |
88 | unsigned char pal=0;\r |
cc68a136 |
89 | \r |
1e6b5e39 |
90 | if (PicoRegionOverride)\r |
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91 | {\r |
92 | support = PicoRegionOverride;\r |
93 | }\r |
94 | else\r |
95 | {\r |
96 | // Read cartridge region data:\r |
af37bca8 |
97 | unsigned short *rd = (unsigned short *)(Pico.rom + 0x1f0);\r |
98 | int region = (rd[0] << 16) | rd[1];\r |
cc68a136 |
99 | \r |
af37bca8 |
100 | for (i = 0; i < 4; i++)\r |
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101 | {\r |
af37bca8 |
102 | int c;\r |
cc68a136 |
103 | \r |
af37bca8 |
104 | c = region >> (i<<3);\r |
105 | c &= 0xff;\r |
106 | if (c <= ' ') continue;\r |
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107 | \r |
51a902ae |
108 | if (c=='J') support|=1;\r |
109 | else if (c=='U') support|=4;\r |
110 | else if (c=='E') support|=8;\r |
111 | else if (c=='j') {support|=1; break; }\r |
112 | else if (c=='u') {support|=4; break; }\r |
113 | else if (c=='e') {support|=8; break; }\r |
cc68a136 |
114 | else\r |
115 | {\r |
116 | // New style code:\r |
117 | char s[2]={0,0};\r |
118 | s[0]=(char)c;\r |
119 | support|=strtol(s,NULL,16);\r |
120 | }\r |
121 | }\r |
122 | }\r |
123 | \r |
51a902ae |
124 | // auto detection order override\r |
125 | if (PicoAutoRgnOrder) {\r |
126 | if (((PicoAutoRgnOrder>>0)&0xf) & support) support = (PicoAutoRgnOrder>>0)&0xf;\r |
127 | else if (((PicoAutoRgnOrder>>4)&0xf) & support) support = (PicoAutoRgnOrder>>4)&0xf;\r |
128 | else if (((PicoAutoRgnOrder>>8)&0xf) & support) support = (PicoAutoRgnOrder>>8)&0xf;\r |
129 | }\r |
130 | \r |
cc68a136 |
131 | // Try to pick the best hardware value for English/50hz:\r |
132 | if (support&8) { hw=0xc0; pal=1; } // Europe\r |
133 | else if (support&4) hw=0x80; // USA\r |
134 | else if (support&2) { hw=0x40; pal=1; } // Japan PAL\r |
135 | else if (support&1) hw=0x00; // Japan NTSC\r |
136 | else hw=0x80; // USA\r |
137 | \r |
138 | Pico.m.hardware=(unsigned char)(hw|0x20); // No disk attached\r |
139 | Pico.m.pal=pal;\r |
1e6b5e39 |
140 | }\r |
141 | \r |
142 | int PicoReset(void)\r |
143 | {\r |
af37bca8 |
144 | unsigned char sram_status = Pico.m.sram_status; // must be preserved\r |
1e6b5e39 |
145 | \r |
2ec9bec5 |
146 | if (Pico.romsize <= 0)\r |
147 | return 1;\r |
1e6b5e39 |
148 | \r |
149 | /* must call now, so that banking is reset, and correct vectors get fetched */\r |
2ec9bec5 |
150 | if (PicoResetHook)\r |
151 | PicoResetHook();\r |
1e6b5e39 |
152 | \r |
5f9a0d16 |
153 | memset(&PicoPadInt,0,sizeof(PicoPadInt));\r |
2ec9bec5 |
154 | emustatus = 0;\r |
155 | \r |
156 | if (PicoAHW & PAHW_SMS) {\r |
157 | PicoResetMS();\r |
158 | return 0;\r |
159 | }\r |
160 | \r |
161 | SekReset();\r |
1e6b5e39 |
162 | // s68k doesn't have the TAS quirk, so we just globally set normal TAS handler in MCD mode (used by Batman games).\r |
163 | SekSetRealTAS(PicoAHW & PAHW_MCD);\r |
164 | SekCycleCntT=0;\r |
165 | \r |
166 | if (PicoAHW & PAHW_MCD)\r |
167 | // needed for MCD to reset properly, probably some bug hides behind this..\r |
168 | memset(Pico.ioports,0,sizeof(Pico.ioports));\r |
1e6b5e39 |
169 | \r |
170 | Pico.m.dirtyPal = 1;\r |
171 | \r |
1832075e |
172 | Pico.m.z80_bank68k = 0;\r |
af37bca8 |
173 | Pico.m.z80_reset = 1;\r |
1832075e |
174 | memset(Pico.zram, 0, sizeof(Pico.zram)); // ??\r |
175 | \r |
1e6b5e39 |
176 | PicoDetectRegion();\r |
e5fa9817 |
177 | Pico.video.status = 0x3428 | Pico.m.pal; // 'always set' bits | vblank | collision | pal\r |
cc68a136 |
178 | \r |
9d917eea |
179 | PsndReset(); // pal must be known here\r |
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180 | \r |
1cb1584b |
181 | // create an empty "dma" to cause 68k exec start at random frame location\r |
2ec9bec5 |
182 | if (Pico.m.dma_xfers == 0 && !(PicoOpt & POPT_DIS_VDP_FIFO))\r |
1cb1584b |
183 | Pico.m.dma_xfers = rand() & 0x1fff;\r |
184 | \r |
5ed2a20e |
185 | SekFinishIdleDet();\r |
186 | \r |
602133e1 |
187 | if (PicoAHW & PAHW_MCD) {\r |
1cb1584b |
188 | PicoResetMCD();\r |
cc68a136 |
189 | return 0;\r |
190 | }\r |
5ed2a20e |
191 | \r |
192 | // reinit, so that checksum checks pass\r |
193 | if (!(PicoOpt & POPT_DIS_IDLE_DET))\r |
194 | SekInitIdleDet();\r |
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195 | \r |
1dceadae |
196 | // reset sram state; enable sram access by default if it doesn't overlap with ROM\r |
af37bca8 |
197 | Pico.m.sram_status = sram_status & (SRS_DETECTED|SRS_EEPROM);\r |
198 | if (!(Pico.m.sram_status & SRS_EEPROM) && Pico.romsize <= SRam.start)\r |
199 | Pico.m.sram_status |= SRS_MAPPED;\r |
cc68a136 |
200 | \r |
1dceadae |
201 | elprintf(EL_STATUS, "sram: det: %i; eeprom: %i; start: %06x; end: %06x",\r |
af37bca8 |
202 | !!(sram_status & SRS_DETECTED), !!(sram_status & SRS_EEPROM), SRam.start, SRam.end);\r |
cc68a136 |
203 | \r |
204 | return 0;\r |
205 | }\r |
206 | \r |
1dceadae |
207 | \r |
69996cb7 |
208 | // dma2vram settings are just hacks to unglitch Legend of Galahad (needs <= 104 to work)\r |
209 | // same for Outrunners (92-121, when active is set to 24)\r |
48df6e9e |
210 | // 96 is VR hack\r |
69996cb7 |
211 | static const int dma_timings[] = {\r |
053fd9b4 |
212 | 96, 167, 166, 83, // vblank: 32cell: dma2vram dma2[vs|c]ram vram_fill vram_copy\r |
213 | 102, 205, 204, 102, // vblank: 40cell:\r |
214 | 16, 16, 15, 8, // active: 32cell:\r |
215 | 24, 18, 17, 9 // ...\r |
4f672280 |
216 | };\r |
217 | \r |
69996cb7 |
218 | static const int dma_bsycles[] = {\r |
053fd9b4 |
219 | (488<<8)/96, (488<<8)/167, (488<<8)/166, (488<<8)/83,\r |
220 | (488<<8)/102, (488<<8)/205, (488<<8)/204, (488<<8)/102,\r |
221 | (488<<8)/16, (488<<8)/16, (488<<8)/15, (488<<8)/8,\r |
222 | (488<<8)/24, (488<<8)/18, (488<<8)/17, (488<<8)/9\r |
312e9ce1 |
223 | };\r |
224 | \r |
eff55556 |
225 | PICO_INTERNAL int CheckDMA(void)\r |
4f672280 |
226 | {\r |
69996cb7 |
227 | int burn = 0, xfers_can, dma_op = Pico.video.reg[0x17]>>6; // see gens for 00 and 01 modes\r |
228 | int xfers = Pico.m.dma_xfers;\r |
312e9ce1 |
229 | int dma_op1;\r |
4f672280 |
230 | \r |
312e9ce1 |
231 | if(!(dma_op&2)) dma_op = (Pico.video.type==1) ? 0 : 1; // setting dma_timings offset here according to Gens\r |
232 | dma_op1 = dma_op;\r |
233 | if(Pico.video.reg[12] & 1) dma_op |= 4; // 40 cell mode?\r |
234 | if(!(Pico.video.status&8)&&(Pico.video.reg[1]&0x40)) dma_op|=8; // active display?\r |
69996cb7 |
235 | xfers_can = dma_timings[dma_op];\r |
9761a7d0 |
236 | if(xfers <= xfers_can)\r |
237 | {\r |
4f672280 |
238 | if(dma_op&2) Pico.video.status&=~2; // dma no longer busy\r |
239 | else {\r |
69996cb7 |
240 | burn = xfers * dma_bsycles[dma_op] >> 8; // have to be approximate because can't afford division..\r |
4f672280 |
241 | }\r |
69996cb7 |
242 | Pico.m.dma_xfers = 0;\r |
4f672280 |
243 | } else {\r |
244 | if(!(dma_op&2)) burn = 488;\r |
69996cb7 |
245 | Pico.m.dma_xfers -= xfers_can;\r |
4f672280 |
246 | }\r |
247 | \r |
69996cb7 |
248 | elprintf(EL_VDPDMA, "~Dma %i op=%i can=%i burn=%i [%i]", Pico.m.dma_xfers, dma_op1, xfers_can, burn, SekCyclesDone());\r |
312e9ce1 |
249 | //dprintf("~aim: %i, cnt: %i", SekCycleAim, SekCycleCnt);\r |
250 | return burn;\r |
4f672280 |
251 | }\r |
252 | \r |
bf5fbbb4 |
253 | static __inline void SekRunM68k(int cyc)\r |
cc68a136 |
254 | {\r |
255 | int cyc_do;\r |
256 | SekCycleAim+=cyc;\r |
053fd9b4 |
257 | if ((cyc_do=SekCycleAim-SekCycleCnt) <= 0) return;\r |
03e4f2a3 |
258 | #if defined(EMU_CORE_DEBUG)\r |
259 | // this means we do run-compare\r |
b5e5172d |
260 | SekCycleCnt+=CM_compareRun(cyc_do, 0);\r |
cc68a136 |
261 | #elif defined(EMU_C68K)\r |
3aa1e148 |
262 | PicoCpuCM68k.cycles=cyc_do;\r |
263 | CycloneRun(&PicoCpuCM68k);\r |
264 | SekCycleCnt+=cyc_do-PicoCpuCM68k.cycles;\r |
cc68a136 |
265 | #elif defined(EMU_M68K)\r |
266 | SekCycleCnt+=m68k_execute(cyc_do);\r |
70357ce5 |
267 | #elif defined(EMU_F68K)\r |
c060a9ab |
268 | SekCycleCnt+=fm68k_emulate(cyc_do+1, 0, 0);\r |
cc68a136 |
269 | #endif\r |
270 | }\r |
271 | \r |
efcba75f |
272 | #include "pico_cmn.c"\r |
4b9c5888 |
273 | \r |
274 | int z80stopCycle;\r |
275 | int z80_cycle_cnt; /* 'done' z80 cycles before z80_run() */\r |
276 | int z80_cycle_aim;\r |
277 | int z80_scanline;\r |
278 | int z80_scanline_cycles; /* cycles done until z80_scanline */\r |
279 | \r |
280 | /* sync z80 to 68k */\r |
281 | PICO_INTERNAL void PicoSyncZ80(int m68k_cycles_done)\r |
cc68a136 |
282 | {\r |
4b9c5888 |
283 | int cnt;\r |
284 | z80_cycle_aim = cycles_68k_to_z80(m68k_cycles_done);\r |
285 | cnt = z80_cycle_aim - z80_cycle_cnt;\r |
cc68a136 |
286 | \r |
e5fa9817 |
287 | elprintf(EL_BUSREQ, "z80 sync %i (%i|%i -> %i|%i)", cnt, z80_cycle_cnt, z80_cycle_cnt / 228,\r |
4b9c5888 |
288 | z80_cycle_aim, z80_cycle_aim / 228);\r |
289 | \r |
290 | if (cnt > 0)\r |
291 | z80_cycle_cnt += z80_run(cnt);\r |
cc68a136 |
292 | }\r |
293 | \r |
4b9c5888 |
294 | \r |
2aa27095 |
295 | void PicoFrame(void)\r |
cc68a136 |
296 | {\r |
8c1952f0 |
297 | Pico.m.frame_count++;\r |
298 | \r |
19954be1 |
299 | if (PicoAHW & PAHW_SMS) {\r |
300 | PicoFrameMS();\r |
2aa27095 |
301 | return;\r |
cc68a136 |
302 | }\r |
19954be1 |
303 | \r |
304 | if (PicoAHW & PAHW_MCD) {\r |
305 | PicoFrameMCD();\r |
3e49ffd0 |
306 | return;\r |
307 | }\r |
cc68a136 |
308 | \r |
cc68a136 |
309 | //if(Pico.video.reg[12]&0x2) Pico.video.status ^= 0x10; // change odd bit in interlace mode\r |
310 | \r |
19954be1 |
311 | PicoFrameStart();\r |
2aa27095 |
312 | PicoFrameHints();\r |
cc68a136 |
313 | }\r |
314 | \r |
a12e0116 |
315 | void PicoFrameDrawOnly(void)\r |
316 | {\r |
87b0845f |
317 | if (!(PicoAHW & PAHW_SMS)) {\r |
318 | PicoFrameStart();\r |
319 | PicoDrawSync(223, 0);\r |
320 | } else {\r |
321 | PicoFrameDrawOnlyMS();\r |
322 | }\r |
a12e0116 |
323 | }\r |
324 | \r |
4609d0cd |
325 | void PicoGetInternal(pint_t which, pint_ret_t *r)\r |
8e5427a0 |
326 | {\r |
327 | switch (which)\r |
328 | {\r |
4609d0cd |
329 | case PI_ROM: r->vptr = Pico.rom; break;\r |
330 | case PI_ISPAL: r->vint = Pico.m.pal; break;\r |
331 | case PI_IS40_CELL: r->vint = Pico.video.reg[12]&1; break;\r |
332 | case PI_IS240_LINES: r->vint = Pico.m.pal && (Pico.video.reg[1]&8); break;\r |
8e5427a0 |
333 | }\r |
8e5427a0 |
334 | }\r |
335 | \r |
66fdc0f0 |
336 | // callback to output message from emu\r |
337 | void (*PicoMessage)(const char *msg)=NULL;\r |
cc68a136 |
338 | \r |