[picodrive.git] / pico / sek.c

/*\r
 * PicoDrive\r
 * (c) Copyright Dave, 2004\r
 * (C) notaz, 2006-2009\r
 *\r
 * This work is licensed under the terms of MAME license.\r
 * See COPYING file in the top-level directory.\r
 */\r
\r
#include "pico_int.h"\r
#include "memory.h"\r
\r
/* context */\r
// Cyclone 68000\r
#ifdef EMU_C68K\r
struct Cyclone PicoCpuCM68k;\r
#endif\r
// MUSASHI 68000\r
#ifdef EMU_M68K\r
m68ki_cpu_core PicoCpuMM68k;\r
#endif\r
// FAME 68000\r
#ifdef EMU_F68K\r
M68K_CONTEXT PicoCpuFM68k;\r
#endif\r
\r
\r
static int do_ack(int level)\r
{\r
  struct PicoVideo *pv = &Pico.video;\r
\r
  elprintf(EL_INTS, "%cack: @ %06x [%u], p=%02x",\r
    level == 6 ? 'v' : 'h', SekPc, SekCyclesDone(), pv->pending_ints);\r
  // the VDP doesn't look at the 68k level\r
  if (pv->pending_ints & pv->reg[1] & 0x20) {\r
    pv->pending_ints &= ~0x20;\r
    pv->status &= ~SR_F;\r
    return (pv->reg[0] & pv->pending_ints & 0x10) >> 2;\r
  }\r
  else if (pv->pending_ints & pv->reg[0] & 0x10)\r
    pv->pending_ints &= ~0x10;\r
\r
  return 0;\r
}\r
\r
/* callbacks */\r
#ifdef EMU_C68K\r
// interrupt acknowledgment\r
static int SekIntAck(int level)\r
{\r
  PicoCpuCM68k.irq = do_ack(level);\r
  return CYCLONE_INT_ACK_AUTOVECTOR;\r
}\r
\r
static void SekResetAck(void)\r
{\r
  elprintf(EL_ANOMALY, "Reset encountered @ %06x", SekPc);\r
}\r
\r
static int SekUnrecognizedOpcode()\r
{\r
  unsigned int pc;\r
  pc = SekPc;\r
  elprintf(EL_ANOMALY, "Unrecognized Opcode @ %06x", pc);\r
  // see if we are still in a mapped region\r
  pc &= 0x00ffffff;\r
  if (map_flag_set(m68k_read16_map[pc >> M68K_MEM_SHIFT])) {\r
    elprintf(EL_STATUS|EL_ANOMALY, "m68k crash @%06x", pc);\r
    PicoCpuCM68k.cycles = 0;\r
    PicoCpuCM68k.state_flags |= 1;\r
    return 1;\r
  }\r
  // happened once - may happen again\r
  SekFinishIdleDet();\r
#ifdef EMU_M68K // debugging cyclone\r
  {\r
    extern int have_illegal;\r
    have_illegal = 1;\r
  }\r
#endif\r
  return 0;\r
}\r
#endif\r
\r
\r
#ifdef EMU_M68K\r
static int SekIntAckM68K(int level)\r
{\r
  CPU_INT_LEVEL = do_ack(level) << 8;\r
  return M68K_INT_ACK_AUTOVECTOR;\r
}\r
\r
static int SekTasCallback(void)\r
{\r
  return 0; // no writeback\r
}\r
#endif\r
\r
\r
#ifdef EMU_F68K\r
static void SekIntAckF68K(unsigned level)\r
{\r
  PicoCpuFM68k.interrupts[0] = do_ack(level);\r
}\r
#endif\r
\r
\r
PICO_INTERNAL void SekInit(void)\r
{\r
#ifdef EMU_C68K\r
  CycloneInit();\r
  memset(&PicoCpuCM68k,0,sizeof(PicoCpuCM68k));\r
  PicoCpuCM68k.IrqCallback=SekIntAck;\r
  PicoCpuCM68k.ResetCallback=SekResetAck;\r
  PicoCpuCM68k.UnrecognizedCallback=SekUnrecognizedOpcode;\r
  PicoCpuCM68k.flags=4;   // Z set\r
#endif\r
#ifdef EMU_M68K\r
  {\r
    void *oldcontext = m68ki_cpu_p;\r
    m68k_set_context(&PicoCpuMM68k);\r
    m68k_set_cpu_type(M68K_CPU_TYPE_68000);\r
    m68k_init();\r
    m68k_set_int_ack_callback(SekIntAckM68K);\r
    m68k_set_tas_instr_callback(SekTasCallback);\r
    //m68k_pulse_reset();\r
    m68k_set_context(oldcontext);\r
  }\r
#endif\r
#ifdef EMU_F68K\r
  memset(&PicoCpuFM68k, 0, sizeof(PicoCpuFM68k));\r
  fm68k_init();\r
  PicoCpuFM68k.iack_handler = SekIntAckF68K;\r
  PicoCpuFM68k.sr = 0x2704; // Z flag\r
#endif\r
}\r
\r
\r
// Reset the 68000:\r
PICO_INTERNAL int SekReset(void)\r
{\r
  if (Pico.rom==NULL) return 1;\r
\r
#ifdef EMU_C68K\r
  CycloneReset(&PicoCpuCM68k);\r
#endif\r
#ifdef EMU_M68K\r
  m68k_set_context(&PicoCpuMM68k); // if we ever reset m68k, we always need it's context to be set\r
  m68ki_cpu.sp[0]=0;\r
  m68k_set_irq(0);\r
  m68k_pulse_reset();\r
  REG_USP = 0; // ?\r
#endif\r
#ifdef EMU_F68K\r
  fm68k_reset(&PicoCpuFM68k);\r
#endif\r
\r
  return 0;\r
}\r
\r
void SekStepM68k(void)\r
{\r
  Pico.t.m68c_aim = Pico.t.m68c_cnt + 1;\r
#if defined(EMU_CORE_DEBUG)\r
  Pico.t.m68c_cnt += CM_compareRun(1, 0);\r
#elif defined(EMU_C68K)\r
  PicoCpuCM68k.cycles=1;\r
  CycloneRun(&PicoCpuCM68k);\r
  Pico.t.m68c_cnt += 1 - PicoCpuCM68k.cycles;\r
#elif defined(EMU_M68K)\r
  Pico.t.m68c_cnt += m68k_execute(1);\r
#elif defined(EMU_F68K)\r
  Pico.t.m68c_cnt += fm68k_emulate(&PicoCpuFM68k, 1, 0);\r
#endif\r
}\r
\r
PICO_INTERNAL void SekSetRealTAS(int use_real)\r
{\r
#ifdef EMU_C68K\r
  CycloneSetRealTAS(use_real);\r
#endif\r
#ifdef EMU_F68K\r
  // TODO\r
#endif\r
}\r
\r
// Pack the cpu into a common format:\r
// XXX: rename\r
PICO_INTERNAL void SekPackCpu(unsigned char *cpu, int is_sub)\r
{\r
  unsigned int pc=0;\r
\r
#if defined(EMU_C68K)\r
  struct Cyclone *context = is_sub ? &PicoCpuCS68k : &PicoCpuCM68k;\r
  memcpy(cpu,context->d,0x40);\r
  pc=context->pc-context->membase;\r
  *(unsigned int *)(cpu+0x44)=CycloneGetSr(context);\r
  *(unsigned int *)(cpu+0x48)=context->osp;\r
  cpu[0x4c] = context->irq;\r
  cpu[0x4d] = context->state_flags & 1;\r
#elif defined(EMU_M68K)\r
  void *oldcontext = m68ki_cpu_p;\r
  m68k_set_context(is_sub ? &PicoCpuMS68k : &PicoCpuMM68k);\r
  memcpy(cpu,m68ki_cpu_p->dar,0x40);\r
  pc=m68ki_cpu_p->pc;\r
  *(unsigned int  *)(cpu+0x44)=m68k_get_reg(NULL, M68K_REG_SR);\r
  *(unsigned int  *)(cpu+0x48)=m68ki_cpu_p->sp[m68ki_cpu_p->s_flag^SFLAG_SET];\r
  cpu[0x4c] = CPU_INT_LEVEL>>8;\r
  cpu[0x4d] = CPU_STOPPED;\r
  m68k_set_context(oldcontext);\r
#elif defined(EMU_F68K)\r
  M68K_CONTEXT *context = is_sub ? &PicoCpuFS68k : &PicoCpuFM68k;\r
  memcpy(cpu,context->dreg,0x40);\r
  pc=context->pc;\r
  *(unsigned int  *)(cpu+0x44)=context->sr;\r
  *(unsigned int  *)(cpu+0x48)=context->asp;\r
  cpu[0x4c] = context->interrupts[0];\r
  cpu[0x4d] = (context->execinfo & FM68K_HALTED) ? 1 : 0;\r
#endif\r
\r
  *(unsigned int *)(cpu+0x40) = pc;\r
  *(unsigned int *)(cpu+0x50) =\r
    is_sub ? SekCycleCntS68k : Pico.t.m68c_cnt;\r
}\r
\r
PICO_INTERNAL void SekUnpackCpu(const unsigned char *cpu, int is_sub)\r
{\r
#if defined(EMU_C68K)\r
  struct Cyclone *context = is_sub ? &PicoCpuCS68k : &PicoCpuCM68k;\r
  CycloneSetSr(context, *(unsigned int *)(cpu+0x44));\r
  context->osp=*(unsigned int *)(cpu+0x48);\r
  memcpy(context->d,cpu,0x40);\r
  context->membase = 0;\r
  context->pc = *(unsigned int *)(cpu+0x40);\r
  CycloneUnpack(context, NULL); // rebase PC\r
  context->irq = cpu[0x4c];\r
  context->state_flags = 0;\r
  if (cpu[0x4d])\r
    context->state_flags |= 1;\r
#elif defined(EMU_M68K)\r
  void *oldcontext = m68ki_cpu_p;\r
  m68k_set_context(is_sub ? &PicoCpuMS68k : &PicoCpuMM68k);\r
  m68k_set_reg(M68K_REG_SR, *(unsigned int *)(cpu+0x44));\r
  memcpy(m68ki_cpu_p->dar,cpu,0x40);\r
  m68ki_cpu_p->pc=*(unsigned int *)(cpu+0x40);\r
  m68ki_cpu_p->sp[m68ki_cpu_p->s_flag^SFLAG_SET]=*(unsigned int *)(cpu+0x48);\r
  CPU_INT_LEVEL = cpu[0x4c] << 8;\r
  CPU_STOPPED = cpu[0x4d];\r
  m68k_set_context(oldcontext);\r
#elif defined(EMU_F68K)\r
  M68K_CONTEXT *context = is_sub ? &PicoCpuFS68k : &PicoCpuFM68k;\r
  memcpy(context->dreg,cpu,0x40);\r
  context->pc =*(unsigned int *)(cpu+0x40);\r
  context->sr =*(unsigned int *)(cpu+0x44);\r
  context->asp=*(unsigned int *)(cpu+0x48);\r
  context->interrupts[0] = cpu[0x4c];\r
  context->execinfo &= ~FM68K_HALTED;\r
  if (cpu[0x4d]&1) context->execinfo |= FM68K_HALTED;\r
#endif\r
  if (is_sub)\r
    SekCycleCntS68k = *(unsigned int *)(cpu+0x50);\r
  else\r
    Pico.t.m68c_cnt = *(unsigned int *)(cpu+0x50);\r
}\r
\r
\r
/* idle loop detection, not to be used in CD mode */\r
#ifdef EMU_C68K\r
#include "cpu/cyclone/tools/idle.h"\r
#endif\r
\r
static unsigned short **idledet_ptrs = NULL;\r
static int idledet_count = 0, idledet_bads = 0;\r
static int idledet_start_frame = 0;\r
\r
#if 0\r
#define IDLE_STATS 1\r
unsigned int idlehit_addrs[128], idlehit_counts[128];\r
\r
void SekRegisterIdleHit(unsigned int pc)\r
{\r
  int i;\r
  for (i = 0; i < 127 && idlehit_addrs[i]; i++) {\r
    if (idlehit_addrs[i] == pc) {\r
      idlehit_counts[i]++;\r
      return;\r
    }\r
  }\r
  idlehit_addrs[i] = pc;\r
  idlehit_counts[i] = 1;\r
  idlehit_addrs[i+1] = 0;\r
}\r
#endif\r
\r
void SekInitIdleDet(void)\r
{\r
  unsigned short **tmp;\r
  tmp = realloc(idledet_ptrs, 0x200 * sizeof(tmp[0]));\r
  if (tmp == NULL) {\r
    free(idledet_ptrs);\r
    idledet_ptrs = NULL;\r
  }\r
  else\r
    idledet_ptrs = tmp;\r
  idledet_count = idledet_bads = 0;\r
  idledet_start_frame = Pico.m.frame_count + 360;\r
#ifdef IDLE_STATS\r
  idlehit_addrs[0] = 0;\r
#endif\r
\r
#ifdef EMU_C68K\r
  CycloneInitIdle();\r
#endif\r
#ifdef EMU_F68K\r
  fm68k_idle_install();\r
#endif\r
}\r
\r
int SekIsIdleReady(void)\r
{\r
	return (Pico.m.frame_count >= idledet_start_frame);\r
}\r
\r
int SekIsIdleCode(unsigned short *dst, int bytes)\r
{\r
  // printf("SekIsIdleCode %04x %i\n", *dst, bytes);\r
  switch (bytes)\r
  {\r
    case 2:\r
      if ((*dst & 0xf000) != 0x6000)     // not another branch\r
        return 1;\r
      break;\r
    case 4:\r
      if ( (*dst & 0xff3f) == 0x4a38 || // tst.x ($xxxx.w); tas ($xxxx.w)\r
           (*dst & 0xc1ff) == 0x0038 || // move.x ($xxxx.w), dX\r
           (*dst & 0xf13f) == 0xb038)   // cmp.x ($xxxx.w), dX\r
        return 1;\r
      if (PicoIn.AHW & (PAHW_MCD|PAHW_32X))\r
        break;\r
      // with no addons, there should be no need to wait\r
      // for byte change anywhere\r
      if ( (*dst & 0xfff8) == 0x4a10 || // tst.b ($aX)\r
           (*dst & 0xfff8) == 0x4a28)   // tst.b ($xxxx,a0)\r
        return 1;\r
      break;\r
    case 6:\r
      if ( ((dst[1] & 0xe0) == 0xe0 && ( // RAM and\r
            *dst == 0x4a39 ||            //   tst.b ($xxxxxxxx)\r
            *dst == 0x4a79 ||            //   tst.w ($xxxxxxxx)\r
            *dst == 0x4ab9 ||            //   tst.l ($xxxxxxxx)\r
            (*dst & 0xc1ff) == 0x0039 || //   move.x ($xxxxxxxx), dX\r
            (*dst & 0xf13f) == 0xb039))||//   cmp.x ($xxxxxxxx), dX\r
            *dst == 0x0838 ||            // btst $X, ($xxxx.w) [6 byte op]\r
            (*dst & 0xffbf) == 0x0c38)   // cmpi.{b,w} $X, ($xxxx.w)\r
        return 1;\r
      break;\r
    case 8:\r
      if ( ((dst[2] & 0xe0) == 0xe0 && ( // RAM and\r
            *dst == 0x0839 ||            //   btst $X, ($xxxxxxxx.w) [8 byte op]\r
            (*dst & 0xffbf) == 0x0c39))||//   cmpi.{b,w} $X, ($xxxxxxxx)\r
            *dst == 0x0cb8)              // cmpi.l $X, ($xxxx.w)\r
        return 1;\r
      break;\r
    case 12:\r
      if (PicoIn.AHW & (PAHW_MCD|PAHW_32X))\r
        break;\r
      if ( (*dst & 0xf1f8) == 0x3010 && // move.w (aX), dX\r
            (dst[1]&0xf100) == 0x0000 && // arithmetic\r
            (dst[3]&0xf100) == 0x0000)   // arithmetic\r
        return 1;\r
      break;\r
  }\r
\r
  return 0;\r
}\r
\r
int SekRegisterIdlePatch(unsigned int pc, int oldop, int newop, void *ctx)\r
{\r
  int is_main68k = 1;\r
  u16 *target;\r
  uptr v;\r
\r
#if   defined(EMU_C68K)\r
  struct Cyclone *cyc = ctx;\r
  is_main68k = cyc == &PicoCpuCM68k;\r
  pc -= cyc->membase;\r
#elif defined(EMU_F68K)\r
  is_main68k = ctx == &PicoCpuFM68k;\r
#endif\r
  pc &= ~0xff000000;\r
  if (!(newop&0x200))\r
  elprintf(EL_IDLE, "idle: patch %06x %04x %04x %c %c #%i", pc, oldop, newop,\r
    (newop&0x200)?'n':'y', is_main68k?'m':'s', idledet_count);\r
\r
  // XXX: probably shouldn't patch RAM too\r
  v = m68k_read16_map[pc >> M68K_MEM_SHIFT];\r
  if (!(v & 0x80000000))\r
    target = (u16 *)((v << 1) + pc);\r
  else {\r
    if (++idledet_bads > 128)\r
      return 2; // remove detector\r
    return 1; // don't patch\r
  }\r
\r
  if (idledet_count >= 0x200 && (idledet_count & 0x1ff) == 0) {\r
    unsigned short **tmp;\r
    tmp = realloc(idledet_ptrs, (idledet_count+0x200) * sizeof(tmp[0]));\r
    if (tmp == NULL)\r
      return 1;\r
    idledet_ptrs = tmp;\r
  }\r
\r
  idledet_ptrs[idledet_count++] = target;\r
\r
  return 0;\r
}\r
\r
void SekFinishIdleDet(void)\r
{\r
  if (idledet_count < 0)\r
    return;\r
#ifdef EMU_C68K\r
  CycloneFinishIdle();\r
#endif\r
#ifdef EMU_F68K\r
  fm68k_idle_remove();\r
#endif\r
  while (idledet_count > 0)\r
  {\r
    unsigned short *op = idledet_ptrs[--idledet_count];\r
    if      ((*op & 0xfd00) == 0x7100)\r
      *op &= 0xff, *op |= 0x6600;\r
    else if ((*op & 0xfd00) == 0x7500)\r
      *op &= 0xff, *op |= 0x6700;\r
    else if ((*op & 0xfd00) == 0x7d00)\r
      *op &= 0xff, *op |= 0x6000;\r
    else\r
      elprintf(EL_STATUS|EL_IDLE, "idle: don't know how to restore %04x", *op);\r
  }\r
  idledet_count = -1;\r
}\r
\r
\r
#if defined(CPU_CMP_R) || defined(CPU_CMP_W)\r
#include "debug.h"\r
\r
struct ref_68k {\r
  u32 dar[16];\r
  u32 pc;\r
  u32 sr;\r
  u32 cycles;\r
  u32 pc_prev;\r
};\r
struct ref_68k ref_68ks[2];\r
static int current_68k;\r
\r
void SekTrace(int is_s68k)\r
{\r
  struct ref_68k *x68k = &ref_68ks[is_s68k];\r
  u32 pc = is_s68k ? SekPcS68k : SekPc;\r
  u32 sr = is_s68k ? SekSrS68k : SekSr;\r
  u32 cycles = is_s68k ? SekCycleCntS68k : Pico.t.m68c_cnt;\r
  u32 r;\r
  u8 cmd;\r
#ifdef CPU_CMP_W\r
  int i;\r
\r
  if (is_s68k != current_68k) {\r
    current_68k = is_s68k;\r
    cmd = CTL_68K_SLAVE | current_68k;\r
    tl_write(&cmd, sizeof(cmd));\r
  }\r
  if (pc != x68k->pc) {\r
    x68k->pc = pc;\r
    tl_write_uint(CTL_68K_PC, x68k->pc);\r
  }\r
  if (sr != x68k->sr) {\r
    x68k->sr = sr;\r
    tl_write_uint(CTL_68K_SR, x68k->sr);\r
  }\r
  for (i = 0; i < 16; i++) {\r
    r = is_s68k ? SekDarS68k(i) : SekDar(i);\r
    if (r != x68k->dar[i]) {\r
      x68k->dar[i] = r;\r
      tl_write_uint(CTL_68K_R + i, r);\r
    }\r
  }\r
  tl_write_uint(CTL_68K_CYCLES, cycles);\r
#else\r
  int i, bad = 0;\r
\r
  while (1)\r
  {\r
    int ret = tl_read(&cmd, sizeof(cmd));\r
    if (ret == 0) {\r
      elprintf(EL_STATUS, "EOF");\r
      exit(1);\r
    }\r
    switch (cmd) {\r
    case CTL_68K_SLAVE:\r
    case CTL_68K_SLAVE + 1:\r
      current_68k = cmd & 1;\r
      break;\r
    case CTL_68K_PC:\r
      tl_read_uint(&x68k->pc);\r
      break;\r
    case CTL_68K_SR:\r
      tl_read_uint(&x68k->sr);\r
      break;\r
    case CTL_68K_CYCLES:\r
      tl_read_uint(&x68k->cycles);\r
      goto breakloop;\r
    default:\r
      if (CTL_68K_R <= cmd && cmd < CTL_68K_R + 0x10)\r
        tl_read_uint(&x68k->dar[cmd - CTL_68K_R]);\r
      else\r
        elprintf(EL_STATUS, "invalid cmd: %02x", cmd);\r
    }\r
  }\r
\r
breakloop:\r
  if (is_s68k != current_68k) {\r
		printf("bad 68k: %d %d\n", is_s68k, current_68k);\r
    bad = 1;\r
  }\r
  if (cycles != x68k->cycles) {\r
		printf("bad cycles: %u %u\n", cycles, x68k->cycles);\r
    bad = 1;\r
  }\r
  if ((pc ^ x68k->pc) & 0xffffff) {\r
		printf("bad PC: %08x %08x\n", pc, x68k->pc);\r
    bad = 1;\r
  }\r
  if (sr != x68k->sr) {\r
		printf("bad SR:  %03x %03x\n", sr, x68k->sr);\r
    bad = 1;\r
  }\r
  for (i = 0; i < 16; i++) {\r
    r = is_s68k ? SekDarS68k(i) : SekDar(i);\r
    if (r != x68k->dar[i]) {\r
		  printf("bad %c%d: %08x %08x\n", i < 8 ? 'D' : 'A', i & 7,\r
        r, x68k->dar[i]);\r
      bad = 1;\r
    }\r
  }\r
  if (bad) {\r
    for (i = 0; i < 8; i++)\r
			printf("D%d: %08x  A%d: %08x\n", i, x68k->dar[i],\r
        i, x68k->dar[i + 8]);\r
		printf("PC: %08x, %08x\n", x68k->pc, x68k->pc_prev);\r
		printf("SR: %04x\n", x68k->sr);\r
\r
    PDebugDumpMem();\r
    exit(1);\r
  }\r
  x68k->pc_prev = x68k->pc;\r
#endif\r
}\r
#endif // CPU_CMP_*\r
\r
#if defined(EMU_M68K) && M68K_INSTRUCTION_HOOK == OPT_SPECIFY_HANDLER\r
static unsigned char op_flags[0x400000/2] = { 0, };\r
static int atexit_set = 0;\r
\r
static void make_idc(void)\r
{\r
  FILE *f = fopen("idc.idc", "w");\r
  int i;\r
  if (!f) return;\r
  fprintf(f, "#include <idc.idc>\nstatic main() {\n");\r
  for (i = 0; i < 0x400000/2; i++)\r
    if (op_flags[i] != 0)\r
      fprintf(f, "  MakeCode(0x%06x);\n", i*2);\r
  fprintf(f, "}\n");\r
  fclose(f);\r
}\r
\r
void instruction_hook(void)\r
{\r
  if (!atexit_set) {\r
    atexit(make_idc);\r
    atexit_set = 1;\r
  }\r
  if (REG_PC < 0x400000)\r
    op_flags[REG_PC/2] = 1;\r
}\r
#endif\r
\r
// vim:shiftwidth=2:ts=2:expandtab\r
Commit	Line	Data
cff531af	1	/*\r
	2	* PicoDrive\r
	3	* (c) Copyright Dave, 2004\r
	4	* (C) notaz, 2006-2009\r
	5	*\r
	6	* This work is licensed under the terms of MAME license.\r
	7	* See COPYING file in the top-level directory.\r
	8	*/\r
cc68a136	9	\r
efcba75f	10	#include "pico_int.h"\r
488c0bbf	11	#include "memory.h"\r
cc68a136	12	\r
70357ce5	13	/* context */\r
70357ce5	14	// Cyclone 68000\r
cc68a136	15	#ifdef EMU_C68K\r
3aa1e148	16	struct Cyclone PicoCpuCM68k;\r
cc68a136	17	#endif\r
70357ce5	18	// MUSASHI 68000\r
cc68a136	19	#ifdef EMU_M68K\r
3aa1e148	20	m68ki_cpu_core PicoCpuMM68k;\r
cc68a136	21	#endif\r
70357ce5	22	// FAME 68000\r
70357ce5	23	#ifdef EMU_F68K\r
3aa1e148	24	M68K_CONTEXT PicoCpuFM68k;\r
cc68a136	25	#endif\r
	26	\r
	27	\r
22814963	28	static int do_ack(int level)\r
	29	{\r
	30	struct PicoVideo *pv = &Pico.video;\r
	31	\r
	32	elprintf(EL_INTS, "%cack: @ %06x [%u], p=%02x",\r
	33	level == 6 ? 'v' : 'h', SekPc, SekCyclesDone(), pv->pending_ints);\r
	34	// the VDP doesn't look at the 68k level\r
	35	if (pv->pending_ints & pv->reg[1] & 0x20) {\r
	36	pv->pending_ints &= ~0x20;\r
0e4bde9b	37	pv->status &= ~SR_F;\r
22814963	38	return (pv->reg[0] & pv->pending_ints & 0x10) >> 2;\r
	39	}\r
	40	else if (pv->pending_ints & pv->reg[0] & 0x10)\r
	41	pv->pending_ints &= ~0x10;\r
	42	\r
	43	return 0;\r
	44	}\r
	45	\r
70357ce5	46	/* callbacks */\r
cc68a136	47	#ifdef EMU_C68K\r
b837b69b	48	// interrupt acknowledgment\r
0af33fe0	49	static int SekIntAck(int level)\r
cc68a136	50	{\r
22814963	51	PicoCpuCM68k.irq = do_ack(level);\r
0af33fe0	52	return CYCLONE_INT_ACK_AUTOVECTOR;\r
cc68a136	53	}\r
cc68a136	54	\r
69996cb7	55	static void SekResetAck(void)\r
cc68a136	56	{\r
69996cb7	57	elprintf(EL_ANOMALY, "Reset encountered @ %06x", SekPc);\r
cc68a136	58	}\r
	59	\r
	60	static int SekUnrecognizedOpcode()\r
	61	{\r
b4db550e	62	unsigned int pc;\r
cc68a136	63	pc = SekPc;\r
b4db550e	64	elprintf(EL_ANOMALY, "Unrecognized Opcode @ %06x", pc);\r
	65	// see if we are still in a mapped region\r
	66	pc &= 0x00ffffff;\r
	67	if (map_flag_set(m68k_read16_map[pc >> M68K_MEM_SHIFT])) {\r
	68	elprintf(EL_STATUS\|EL_ANOMALY, "m68k crash @%06x", pc);\r
3aa1e148	69	PicoCpuCM68k.cycles = 0;\r
3aa1e148	70	PicoCpuCM68k.state_flags \|= 1;\r
cc68a136	71	return 1;\r
cc68a136	72	}\r
2b15cea8	73	// happened once - may happen again\r
2b15cea8	74	SekFinishIdleDet();\r
2d0b15bb	75	#ifdef EMU_M68K // debugging cyclone\r
	76	{\r
	77	extern int have_illegal;\r
	78	have_illegal = 1;\r
	79	}\r
	80	#endif\r
cc68a136	81	return 0;\r
	82	}\r
	83	#endif\r
	84	\r
	85	\r
	86	#ifdef EMU_M68K\r
	87	static int SekIntAckM68K(int level)\r
	88	{\r
22814963	89	CPU_INT_LEVEL = do_ack(level) << 8;\r
cc68a136	90	return M68K_INT_ACK_AUTOVECTOR;\r
cc68a136	91	}\r
0af33fe0	92	\r
	93	static int SekTasCallback(void)\r
	94	{\r
	95	return 0; // no writeback\r
	96	}\r
cc68a136	97	#endif\r
	98	\r
	99	\r
70357ce5	100	#ifdef EMU_F68K\r
3aa1e148	101	static void SekIntAckF68K(unsigned level)\r
70357ce5	102	{\r
22814963	103	PicoCpuFM68k.interrupts[0] = do_ack(level);\r
70357ce5	104	}\r
	105	#endif\r
	106	\r
cc68a136	107	\r
2aa27095	108	PICO_INTERNAL void SekInit(void)\r
cc68a136	109	{\r
	110	#ifdef EMU_C68K\r
	111	CycloneInit();\r
3aa1e148	112	memset(&PicoCpuCM68k,0,sizeof(PicoCpuCM68k));\r
	113	PicoCpuCM68k.IrqCallback=SekIntAck;\r
	114	PicoCpuCM68k.ResetCallback=SekResetAck;\r
	115	PicoCpuCM68k.UnrecognizedCallback=SekUnrecognizedOpcode;\r
03e4f2a3	116	PicoCpuCM68k.flags=4; // Z set\r
cc68a136	117	#endif\r
cc68a136	118	#ifdef EMU_M68K\r
	119	{\r
	120	void *oldcontext = m68ki_cpu_p;\r
3aa1e148	121	m68k_set_context(&PicoCpuMM68k);\r
cc68a136	122	m68k_set_cpu_type(M68K_CPU_TYPE_68000);\r
	123	m68k_init();\r
	124	m68k_set_int_ack_callback(SekIntAckM68K);\r
0af33fe0	125	m68k_set_tas_instr_callback(SekTasCallback);\r
9037e45d	126	//m68k_pulse_reset();\r
cc68a136	127	m68k_set_context(oldcontext);\r
	128	}\r
	129	#endif\r
70357ce5	130	#ifdef EMU_F68K\r
7669591e	131	memset(&PicoCpuFM68k, 0, sizeof(PicoCpuFM68k));\r
	132	fm68k_init();\r
	133	PicoCpuFM68k.iack_handler = SekIntAckF68K;\r
	134	PicoCpuFM68k.sr = 0x2704; // Z flag\r
70357ce5	135	#endif\r
cc68a136	136	}\r
cc68a136	137	\r
70357ce5	138	\r
cc68a136	139	// Reset the 68000:\r
2aa27095	140	PICO_INTERNAL int SekReset(void)\r
cc68a136	141	{\r
	142	if (Pico.rom==NULL) return 1;\r
	143	\r
	144	#ifdef EMU_C68K\r
5e89f0f5	145	CycloneReset(&PicoCpuCM68k);\r
cc68a136	146	#endif\r
cc68a136	147	#ifdef EMU_M68K\r
3aa1e148	148	m68k_set_context(&PicoCpuMM68k); // if we ever reset m68k, we always need it's context to be set\r
2d0b15bb	149	m68ki_cpu.sp[0]=0;\r
2d0b15bb	150	m68k_set_irq(0);\r
b837b69b	151	m68k_pulse_reset();\r
99464b62	152	REG_USP = 0; // ?\r
cc68a136	153	#endif\r
70357ce5	154	#ifdef EMU_F68K\r
12f23dac	155	fm68k_reset(&PicoCpuFM68k);\r
70357ce5	156	#endif\r
cc68a136	157	\r
	158	return 0;\r
	159	}\r
	160	\r
5f9a0d16	161	void SekStepM68k(void)\r
5f9a0d16	162	{\r
88fd63ad	163	Pico.t.m68c_aim = Pico.t.m68c_cnt + 1;\r
5f9a0d16	164	#if defined(EMU_CORE_DEBUG)\r
88fd63ad	165	Pico.t.m68c_cnt += CM_compareRun(1, 0);\r
5f9a0d16	166	#elif defined(EMU_C68K)\r
	167	PicoCpuCM68k.cycles=1;\r
	168	CycloneRun(&PicoCpuCM68k);\r
88fd63ad	169	Pico.t.m68c_cnt += 1 - PicoCpuCM68k.cycles;\r
5f9a0d16	170	#elif defined(EMU_M68K)\r
88fd63ad	171	Pico.t.m68c_cnt += m68k_execute(1);\r
5f9a0d16	172	#elif defined(EMU_F68K)\r
12f23dac	173	Pico.t.m68c_cnt += fm68k_emulate(&PicoCpuFM68k, 1, 0);\r
5f9a0d16	174	#endif\r
5f9a0d16	175	}\r
cc68a136	176	\r
eff55556	177	PICO_INTERNAL void SekSetRealTAS(int use_real)\r
2433f409	178	{\r
	179	#ifdef EMU_C68K\r
	180	CycloneSetRealTAS(use_real);\r
	181	#endif\r
70357ce5	182	#ifdef EMU_F68K\r
	183	// TODO\r
	184	#endif\r
2433f409	185	}\r
2433f409	186	\r
b4db550e	187	// Pack the cpu into a common format:\r
	188	// XXX: rename\r
	189	PICO_INTERNAL void SekPackCpu(unsigned char *cpu, int is_sub)\r
	190	{\r
	191	unsigned int pc=0;\r
	192	\r
	193	#if defined(EMU_C68K)\r
	194	struct Cyclone *context = is_sub ? &PicoCpuCS68k : &PicoCpuCM68k;\r
	195	memcpy(cpu,context->d,0x40);\r
	196	pc=context->pc-context->membase;\r
	197	(unsigned int )(cpu+0x44)=CycloneGetSr(context);\r
	198	(unsigned int )(cpu+0x48)=context->osp;\r
	199	cpu[0x4c] = context->irq;\r
	200	cpu[0x4d] = context->state_flags & 1;\r
	201	#elif defined(EMU_M68K)\r
	202	void *oldcontext = m68ki_cpu_p;\r
	203	m68k_set_context(is_sub ? &PicoCpuMS68k : &PicoCpuMM68k);\r
	204	memcpy(cpu,m68ki_cpu_p->dar,0x40);\r
	205	pc=m68ki_cpu_p->pc;\r
	206	(unsigned int )(cpu+0x44)=m68k_get_reg(NULL, M68K_REG_SR);\r
	207	(unsigned int )(cpu+0x48)=m68ki_cpu_p->sp[m68ki_cpu_p->s_flag^SFLAG_SET];\r
	208	cpu[0x4c] = CPU_INT_LEVEL>>8;\r
	209	cpu[0x4d] = CPU_STOPPED;\r
	210	m68k_set_context(oldcontext);\r
	211	#elif defined(EMU_F68K)\r
	212	M68K_CONTEXT *context = is_sub ? &PicoCpuFS68k : &PicoCpuFM68k;\r
	213	memcpy(cpu,context->dreg,0x40);\r
	214	pc=context->pc;\r
	215	(unsigned int )(cpu+0x44)=context->sr;\r
	216	(unsigned int )(cpu+0x48)=context->asp;\r
	217	cpu[0x4c] = context->interrupts[0];\r
	218	cpu[0x4d] = (context->execinfo & FM68K_HALTED) ? 1 : 0;\r
	219	#endif\r
	220	\r
6a98f03e	221	(unsigned int )(cpu+0x40) = pc;\r
ae214f1c	222	(unsigned int )(cpu+0x50) =\r
88fd63ad	223	is_sub ? SekCycleCntS68k : Pico.t.m68c_cnt;\r
b4db550e	224	}\r
	225	\r
	226	PICO_INTERNAL void SekUnpackCpu(const unsigned char *cpu, int is_sub)\r
	227	{\r
	228	#if defined(EMU_C68K)\r
	229	struct Cyclone *context = is_sub ? &PicoCpuCS68k : &PicoCpuCM68k;\r
	230	CycloneSetSr(context, (unsigned int )(cpu+0x44));\r
	231	context->osp=(unsigned int )(cpu+0x48);\r
	232	memcpy(context->d,cpu,0x40);\r
	233	context->membase = 0;\r
	234	context->pc = (unsigned int )(cpu+0x40);\r
	235	CycloneUnpack(context, NULL); // rebase PC\r
	236	context->irq = cpu[0x4c];\r
	237	context->state_flags = 0;\r
	238	if (cpu[0x4d])\r
	239	context->state_flags \|= 1;\r
	240	#elif defined(EMU_M68K)\r
	241	void *oldcontext = m68ki_cpu_p;\r
	242	m68k_set_context(is_sub ? &PicoCpuMS68k : &PicoCpuMM68k);\r
	243	m68k_set_reg(M68K_REG_SR, (unsigned int )(cpu+0x44));\r
	244	memcpy(m68ki_cpu_p->dar,cpu,0x40);\r
	245	m68ki_cpu_p->pc=(unsigned int )(cpu+0x40);\r
	246	m68ki_cpu_p->sp[m68ki_cpu_p->s_flag^SFLAG_SET]=(unsigned int )(cpu+0x48);\r
	247	CPU_INT_LEVEL = cpu[0x4c] << 8;\r
	248	CPU_STOPPED = cpu[0x4d];\r
	249	m68k_set_context(oldcontext);\r
	250	#elif defined(EMU_F68K)\r
	251	M68K_CONTEXT *context = is_sub ? &PicoCpuFS68k : &PicoCpuFM68k;\r
	252	memcpy(context->dreg,cpu,0x40);\r
	253	context->pc =(unsigned int )(cpu+0x40);\r
	254	context->sr =(unsigned int )(cpu+0x44);\r
	255	context->asp=(unsigned int )(cpu+0x48);\r
	256	context->interrupts[0] = cpu[0x4c];\r
	257	context->execinfo &= ~FM68K_HALTED;\r
	258	if (cpu[0x4d]&1) context->execinfo \|= FM68K_HALTED;\r
	259	#endif\r
ae214f1c	260	if (is_sub)\r
	261	SekCycleCntS68k = (unsigned int )(cpu+0x50);\r
	262	else\r
88fd63ad	263	Pico.t.m68c_cnt = (unsigned int )(cpu+0x50);\r
b4db550e	264	}\r
b4db550e	265	\r
5f9a0d16	266	\r
053fd9b4	267	/* idle loop detection, not to be used in CD mode */\r
053fd9b4	268	#ifdef EMU_C68K\r
d4d62665	269	#include "cpu/cyclone/tools/idle.h"\r
053fd9b4	270	#endif\r
053fd9b4	271	\r
488c0bbf	272	static unsigned short **idledet_ptrs = NULL;\r
053fd9b4	273	static int idledet_count = 0, idledet_bads = 0;\r
0219d379	274	static int idledet_start_frame = 0;\r
053fd9b4	275	\r
5ed2a20e	276	#if 0\r
	277	#define IDLE_STATS 1\r
	278	unsigned int idlehit_addrs[128], idlehit_counts[128];\r
	279	\r
	280	void SekRegisterIdleHit(unsigned int pc)\r
	281	{\r
	282	int i;\r
	283	for (i = 0; i < 127 && idlehit_addrs[i]; i++) {\r
	284	if (idlehit_addrs[i] == pc) {\r
	285	idlehit_counts[i]++;\r
	286	return;\r
	287	}\r
	288	}\r
	289	idlehit_addrs[i] = pc;\r
	290	idlehit_counts[i] = 1;\r
	291	idlehit_addrs[i+1] = 0;\r
	292	}\r
	293	#endif\r
	294	\r
053fd9b4	295	void SekInitIdleDet(void)\r
053fd9b4	296	{\r
8f80007b	297	unsigned short **tmp;\r
8f80007b	298	tmp = realloc(idledet_ptrs, 0x200 * sizeof(tmp[0]));\r
053fd9b4	299	if (tmp == NULL) {\r
488c0bbf	300	free(idledet_ptrs);\r
488c0bbf	301	idledet_ptrs = NULL;\r
053fd9b4	302	}\r
053fd9b4	303	else\r
488c0bbf	304	idledet_ptrs = tmp;\r
053fd9b4	305	idledet_count = idledet_bads = 0;\r
053fd9b4	306	idledet_start_frame = Pico.m.frame_count + 360;\r
5ed2a20e	307	#ifdef IDLE_STATS\r
	308	idlehit_addrs[0] = 0;\r
	309	#endif\r
053fd9b4	310	\r
053fd9b4	311	#ifdef EMU_C68K\r
	312	CycloneInitIdle();\r
	313	#endif\r
c060a9ab	314	#ifdef EMU_F68K\r
12f23dac	315	fm68k_idle_install();\r
c060a9ab	316	#endif\r
053fd9b4	317	}\r
053fd9b4	318	\r
0219d379	319	int SekIsIdleReady(void)\r
	320	{\r
	321	return (Pico.m.frame_count >= idledet_start_frame);\r
	322	}\r
	323	\r
053fd9b4	324	int SekIsIdleCode(unsigned short *dst, int bytes)\r
053fd9b4	325	{\r
8187ba84	326	// printf("SekIsIdleCode %04x %i\n", *dst, bytes);\r
053fd9b4	327	switch (bytes)\r
053fd9b4	328	{\r
5ed2a20e	329	case 2:\r
	330	if ((*dst & 0xf000) != 0x6000) // not another branch\r
	331	return 1;\r
	332	break;\r
053fd9b4	333	case 4:\r
0219d379	334	if ( (*dst & 0xff3f) == 0x4a38 \|\| // tst.x ($xxxx.w); tas ($xxxx.w)\r
	335	(*dst & 0xc1ff) == 0x0038 \|\| // move.x ($xxxx.w), dX\r
	336	(*dst & 0xf13f) == 0xb038) // cmp.x ($xxxx.w), dX\r
	337	return 1;\r
93f9619e	338	if (PicoIn.AHW & (PAHW_MCD\|PAHW_32X))\r
0219d379	339	break;\r
	340	// with no addons, there should be no need to wait\r
	341	// for byte change anywhere\r
	342	if ( (*dst & 0xfff8) == 0x4a10 \|\| // tst.b ($aX)\r
	343	(*dst & 0xfff8) == 0x4a28) // tst.b ($xxxx,a0)\r
053fd9b4	344	return 1;\r
	345	break;\r
	346	case 6:\r
b0677887	347	if ( ((dst[1] & 0xe0) == 0xe0 && ( // RAM and\r
	348	*dst == 0x4a39 \|\| // tst.b ($xxxxxxxx)\r
	349	*dst == 0x4a79 \|\| // tst.w ($xxxxxxxx)\r
	350	*dst == 0x4ab9 \|\| // tst.l ($xxxxxxxx)\r
	351	(*dst & 0xc1ff) == 0x0039 \|\| // move.x ($xxxxxxxx), dX\r
	352	(*dst & 0xf13f) == 0xb039))\|\|// cmp.x ($xxxxxxxx), dX\r
	353	*dst == 0x0838 \|\| // btst $X, ($xxxx.w) [6 byte op]\r
	354	(*dst & 0xffbf) == 0x0c38) // cmpi.{b,w} $X, ($xxxx.w)\r
053fd9b4	355	return 1;\r
	356	break;\r
	357	case 8:\r
b0677887	358	if ( ((dst[2] & 0xe0) == 0xe0 && ( // RAM and\r
	359	*dst == 0x0839 \|\| // btst $X, ($xxxxxxxx.w) [8 byte op]\r
	360	(*dst & 0xffbf) == 0x0c39))\|\|// cmpi.{b,w} $X, ($xxxxxxxx)\r
	361	*dst == 0x0cb8) // cmpi.l $X, ($xxxx.w)\r
053fd9b4	362	return 1;\r
	363	break;\r
	364	case 12:\r
93f9619e	365	if (PicoIn.AHW & (PAHW_MCD\|PAHW_32X))\r
0219d379	366	break;\r
0219d379	367	if ( (*dst & 0xf1f8) == 0x3010 && // move.w (aX), dX\r
b0677887	368	(dst[1]&0xf100) == 0x0000 && // arithmetic\r
b0677887	369	(dst[3]&0xf100) == 0x0000) // arithmetic\r
053fd9b4	370	return 1;\r
	371	break;\r
	372	}\r
	373	\r
	374	return 0;\r
	375	}\r
	376	\r
5ed2a20e	377	int SekRegisterIdlePatch(unsigned int pc, int oldop, int newop, void *ctx)\r
053fd9b4	378	{\r
5ed2a20e	379	int is_main68k = 1;\r
488c0bbf	380	u16 *target;\r
	381	uptr v;\r
	382	\r
5ed2a20e	383	#if defined(EMU_C68K)\r
	384	struct Cyclone *cyc = ctx;\r
	385	is_main68k = cyc == &PicoCpuCM68k;\r
	386	pc -= cyc->membase;\r
	387	#elif defined(EMU_F68K)\r
	388	is_main68k = ctx == &PicoCpuFM68k;\r
053fd9b4	389	#endif\r
053fd9b4	390	pc &= ~0xff000000;\r
0219d379	391	if (!(newop&0x200))\r
5ed2a20e	392	elprintf(EL_IDLE, "idle: patch %06x %04x %04x %c %c #%i", pc, oldop, newop,\r
	393	(newop&0x200)?'n':'y', is_main68k?'m':'s', idledet_count);\r
	394	\r
488c0bbf	395	// XXX: probably shouldn't patch RAM too\r
	396	v = m68k_read16_map[pc >> M68K_MEM_SHIFT];\r
	397	if (!(v & 0x80000000))\r
	398	target = (u16 *)((v << 1) + pc);\r
	399	else {\r
	400	if (++idledet_bads > 128)\r
	401	return 2; // remove detector\r
053fd9b4	402	return 1; // don't patch\r
	403	}\r
	404	\r
	405	if (idledet_count >= 0x200 && (idledet_count & 0x1ff) == 0) {\r
8f80007b	406	unsigned short **tmp;\r
8f80007b	407	tmp = realloc(idledet_ptrs, (idledet_count+0x200) * sizeof(tmp[0]));\r
488c0bbf	408	if (tmp == NULL)\r
	409	return 1;\r
	410	idledet_ptrs = tmp;\r
053fd9b4	411	}\r
053fd9b4	412	\r
488c0bbf	413	idledet_ptrs[idledet_count++] = target;\r
b0677887	414	\r
053fd9b4	415	return 0;\r
	416	}\r
	417	\r
	418	void SekFinishIdleDet(void)\r
	419	{\r
2b15cea8	420	if (idledet_count < 0)\r
2b15cea8	421	return;\r
053fd9b4	422	#ifdef EMU_C68K\r
053fd9b4	423	CycloneFinishIdle();\r
c060a9ab	424	#endif\r
c060a9ab	425	#ifdef EMU_F68K\r
12f23dac	426	fm68k_idle_remove();\r
053fd9b4	427	#endif\r
	428	while (idledet_count > 0)\r
	429	{\r
488c0bbf	430	unsigned short *op = idledet_ptrs[--idledet_count];\r
053fd9b4	431	if ((*op & 0xfd00) == 0x7100)\r
	432	op &= 0xff, op \|= 0x6600;\r
	433	else if ((*op & 0xfd00) == 0x7500)\r
	434	op &= 0xff, op \|= 0x6700;\r
	435	else if ((*op & 0xfd00) == 0x7d00)\r
	436	op &= 0xff, op \|= 0x6000;\r
	437	else\r
	438	elprintf(EL_STATUS\|EL_IDLE, "idle: don't know how to restore %04x", *op);\r
	439	}\r
2b15cea8	440	idledet_count = -1;\r
053fd9b4	441	}\r
	442	\r
	443	\r
12da51c2	444	#if defined(CPU_CMP_R) \|\| defined(CPU_CMP_W)\r
	445	#include "debug.h"\r
	446	\r
	447	struct ref_68k {\r
	448	u32 dar[16];\r
	449	u32 pc;\r
	450	u32 sr;\r
	451	u32 cycles;\r
	452	u32 pc_prev;\r
	453	};\r
	454	struct ref_68k ref_68ks[2];\r
	455	static int current_68k;\r
	456	\r
	457	void SekTrace(int is_s68k)\r
	458	{\r
	459	struct ref_68k *x68k = &ref_68ks[is_s68k];\r
	460	u32 pc = is_s68k ? SekPcS68k : SekPc;\r
	461	u32 sr = is_s68k ? SekSrS68k : SekSr;\r
88fd63ad	462	u32 cycles = is_s68k ? SekCycleCntS68k : Pico.t.m68c_cnt;\r
12da51c2	463	u32 r;\r
	464	u8 cmd;\r
	465	#ifdef CPU_CMP_W\r
	466	int i;\r
	467	\r
	468	if (is_s68k != current_68k) {\r
	469	current_68k = is_s68k;\r
	470	cmd = CTL_68K_SLAVE \| current_68k;\r
	471	tl_write(&cmd, sizeof(cmd));\r
	472	}\r
	473	if (pc != x68k->pc) {\r
	474	x68k->pc = pc;\r
	475	tl_write_uint(CTL_68K_PC, x68k->pc);\r
	476	}\r
	477	if (sr != x68k->sr) {\r
	478	x68k->sr = sr;\r
	479	tl_write_uint(CTL_68K_SR, x68k->sr);\r
	480	}\r
	481	for (i = 0; i < 16; i++) {\r
	482	r = is_s68k ? SekDarS68k(i) : SekDar(i);\r
	483	if (r != x68k->dar[i]) {\r
	484	x68k->dar[i] = r;\r
	485	tl_write_uint(CTL_68K_R + i, r);\r
	486	}\r
	487	}\r
	488	tl_write_uint(CTL_68K_CYCLES, cycles);\r
	489	#else\r
	490	int i, bad = 0;\r
	491	\r
	492	while (1)\r
	493	{\r
	494	int ret = tl_read(&cmd, sizeof(cmd));\r
	495	if (ret == 0) {\r
	496	elprintf(EL_STATUS, "EOF");\r
	497	exit(1);\r
	498	}\r
	499	switch (cmd) {\r
	500	case CTL_68K_SLAVE:\r
	501	case CTL_68K_SLAVE + 1:\r
	502	current_68k = cmd & 1;\r
	503	break;\r
	504	case CTL_68K_PC:\r
	505	tl_read_uint(&x68k->pc);\r
	506	break;\r
	507	case CTL_68K_SR:\r
	508	tl_read_uint(&x68k->sr);\r
	509	break;\r
	510	case CTL_68K_CYCLES:\r
	511	tl_read_uint(&x68k->cycles);\r
	512	goto breakloop;\r
	513	default:\r
	514	if (CTL_68K_R <= cmd && cmd < CTL_68K_R + 0x10)\r
	515	tl_read_uint(&x68k->dar[cmd - CTL_68K_R]);\r
	516	else\r
	517	elprintf(EL_STATUS, "invalid cmd: %02x", cmd);\r
	518	}\r
	519	}\r
	520	\r
	521	breakloop:\r
	522	if (is_s68k != current_68k) {\r
	523	printf("bad 68k: %d %d\n", is_s68k, current_68k);\r
	524	bad = 1;\r
	525	}\r
	526	if (cycles != x68k->cycles) {\r
527	printf("bad cycles: %u %u\n", cycles, x68k->cycles);\r
528	bad = 1;\r
529	}\r
530	if ((pc ^ x68k->pc) & 0xffffff) {\r
531	printf("bad PC: %08x %08x\n", pc, x68k->pc);\r
532	bad = 1;\r
533	}\r
534	if (sr != x68k->sr) {\r
535	printf("bad SR: %03x %03x\n", sr, x68k->sr);\r
536	bad = 1;\r
537	}\r
538	for (i = 0; i < 16; i++) {\r
539	r = is_s68k ? SekDarS68k(i) : SekDar(i);\r
540	if (r != x68k->dar[i]) {\r
541	printf("bad %c%d: %08x %08x\n", i < 8 ? 'D' : 'A', i & 7,\r
542	r, x68k->dar[i]);\r
543	bad = 1;\r
544	}\r
545	}\r
546	if (bad) {\r
547	for (i = 0; i < 8; i++)\r
548	printf("D%d: %08x A%d: %08x\n", i, x68k->dar[i],\r
549	i, x68k->dar[i + 8]);\r
550	printf("PC: %08x, %08x\n", x68k->pc, x68k->pc_prev);\r
a39743e3	551	printf("SR: %04x\n", x68k->sr);\r
12da51c2	552	\r
	553	PDebugDumpMem();\r
	554	exit(1);\r
	555	}\r
	556	x68k->pc_prev = x68k->pc;\r
	557	#endif\r
	558	}\r
	559	#endif // CPU_CMP_*\r
	560	\r
6cab49fd	561	#if defined(EMU_M68K) && M68K_INSTRUCTION_HOOK == OPT_SPECIFY_HANDLER\r
	562	static unsigned char op_flags[0x400000/2] = { 0, };\r
	563	static int atexit_set = 0;\r
	564	\r
	565	static void make_idc(void)\r
	566	{\r
	567	FILE *f = fopen("idc.idc", "w");\r
	568	int i;\r
	569	if (!f) return;\r
	570	fprintf(f, "#include <idc.idc>\nstatic main() {\n");\r
	571	for (i = 0; i < 0x400000/2; i++)\r
	572	if (op_flags[i] != 0)\r
	573	fprintf(f, " MakeCode(0x%06x);\n", i*2);\r
	574	fprintf(f, "}\n");\r
	575	fclose(f);\r
	576	}\r
	577	\r
	578	void instruction_hook(void)\r
	579	{\r
	580	if (!atexit_set) {\r
	581	atexit(make_idc);\r
	582	atexit_set = 1;\r
	583	}\r
	584	if (REG_PC < 0x400000)\r
	585	op_flags[REG_PC/2] = 1;\r
	586	}\r
	587	#endif\r
12da51c2	588	\r
12da51c2	589	// vim:shiftwidth=2:ts=2:expandtab\r