[picodrive.git] / Pico / Sek.c

// This is part of Pico Library\r
\r
// (c) Copyright 2004 Dave, All rights reserved.\r
// (c) Copyright 2006 notaz, All rights reserved.\r
// Free for non-commercial use.\r
\r
// For commercial use, separate licencing terms must be obtained.\r
\r
\r
#include "PicoInt.h"\r
\r
\r
int SekCycleCnt=0; // cycles done in this frame\r
int SekCycleAim=0; // cycle aim\r
unsigned int SekCycleCntT=0;\r
\r
\r
/* context */\r
// Cyclone 68000\r
#ifdef EMU_C68K\r
struct Cyclone PicoCpuCM68k;\r
#endif\r
// MUSASHI 68000\r
#ifdef EMU_M68K\r
m68ki_cpu_core PicoCpuMM68k;\r
#endif\r
// FAME 68000\r
#ifdef EMU_F68K\r
M68K_CONTEXT PicoCpuFM68k;\r
#endif\r
\r
\r
/* callbacks */\r
#ifdef EMU_C68K\r
// interrupt acknowledgment\r
static int SekIntAck(int level)\r
{\r
  // try to emulate VDP's reaction to 68000 int ack\r
  if     (level == 4) { Pico.video.pending_ints  =  0;    elprintf(EL_INTS, "hack: @ %06x [%i]", SekPc, SekCycleCnt); }\r
  else if(level == 6) { Pico.video.pending_ints &= ~0x20; elprintf(EL_INTS, "vack: @ %06x [%i]", SekPc, SekCycleCnt); }\r
  PicoCpuCM68k.irq = 0;\r
  return CYCLONE_INT_ACK_AUTOVECTOR;\r
}\r
\r
static void SekResetAck(void)\r
{\r
  elprintf(EL_ANOMALY, "Reset encountered @ %06x", SekPc);\r
}\r
\r
static int SekUnrecognizedOpcode()\r
{\r
  unsigned int pc, op;\r
  pc = SekPc;\r
  op = PicoCpuCM68k.read16(pc);\r
  elprintf(EL_ANOMALY, "Unrecognized Opcode %04x @ %06x", op, pc);\r
  // see if we are not executing trash\r
  if (pc < 0x200 || (pc > Pico.romsize+4 && (pc&0xe00000)!=0xe00000)) {\r
    PicoCpuCM68k.cycles = 0;\r
    PicoCpuCM68k.state_flags |= 1;\r
    return 1;\r
  }\r
#ifdef EMU_M68K // debugging cyclone\r
  {\r
    extern int have_illegal;\r
    have_illegal = 1;\r
  }\r
#endif\r
  return 0;\r
}\r
#endif\r
\r
\r
#ifdef EMU_M68K\r
static int SekIntAckM68K(int level)\r
{\r
  if     (level == 4) { Pico.video.pending_ints  =  0;    elprintf(EL_INTS, "hack: @ %06x [%i]", SekPc, SekCycleCnt); }\r
  else if(level == 6) { Pico.video.pending_ints &= ~0x20; elprintf(EL_INTS, "vack: @ %06x [%i]", SekPc, SekCycleCnt); }\r
  CPU_INT_LEVEL = 0;\r
  return M68K_INT_ACK_AUTOVECTOR;\r
}\r
\r
static int SekTasCallback(void)\r
{\r
  return 0; // no writeback\r
}\r
#endif\r
\r
\r
#ifdef EMU_F68K\r
static void SekIntAckF68K(unsigned level)\r
{\r
  if     (level == 4) { Pico.video.pending_ints  =  0;    elprintf(EL_INTS, "hack: @ %06x [%i]", SekPc, SekCycleCnt); }\r
  else if(level == 6) { Pico.video.pending_ints &= ~0x20; elprintf(EL_INTS, "vack: @ %06x [%i]", SekPc, SekCycleCnt); }\r
  PicoCpuFM68k.interrupts[0] = 0;\r
}\r
#endif\r
\r
\r
PICO_INTERNAL void SekInit(void)\r
{\r
#ifdef EMU_C68K\r
  CycloneInit();\r
  memset(&PicoCpuCM68k,0,sizeof(PicoCpuCM68k));\r
  PicoCpuCM68k.IrqCallback=SekIntAck;\r
  PicoCpuCM68k.ResetCallback=SekResetAck;\r
  PicoCpuCM68k.UnrecognizedCallback=SekUnrecognizedOpcode;\r
  PicoCpuCM68k.flags=4;   // Z set\r
#endif\r
#ifdef EMU_M68K\r
  {\r
    void *oldcontext = m68ki_cpu_p;\r
    m68k_set_context(&PicoCpuMM68k);\r
    m68k_set_cpu_type(M68K_CPU_TYPE_68000);\r
    m68k_init();\r
    m68k_set_int_ack_callback(SekIntAckM68K);\r
    m68k_set_tas_instr_callback(SekTasCallback);\r
    //m68k_pulse_reset();\r
    m68k_set_context(oldcontext);\r
  }\r
#endif\r
#ifdef EMU_F68K\r
  {\r
    void *oldcontext = g_m68kcontext;\r
    g_m68kcontext = &PicoCpuFM68k;\r
    memset(&PicoCpuFM68k, 0, sizeof(PicoCpuFM68k));\r
    fm68k_init();\r
    PicoCpuFM68k.iack_handler = SekIntAckF68K;\r
    PicoCpuFM68k.sr = 0x2704; // Z flag\r
    g_m68kcontext = oldcontext;\r
  }\r
#endif\r
}\r
\r
\r
// Reset the 68000:\r
PICO_INTERNAL int SekReset(void)\r
{\r
  if (Pico.rom==NULL) return 1;\r
\r
#ifdef EMU_C68K\r
  PicoCpuCM68k.state_flags=0;\r
  PicoCpuCM68k.osp=0;\r
  PicoCpuCM68k.srh =0x27; // Supervisor mode\r
  PicoCpuCM68k.irq=0;\r
  PicoCpuCM68k.a[7]=PicoCpuCM68k.read32(0); // Stack Pointer\r
  PicoCpuCM68k.membase=0;\r
  PicoCpuCM68k.pc=PicoCpuCM68k.checkpc(PicoCpuCM68k.read32(4)); // Program Counter\r
#endif\r
#ifdef EMU_M68K\r
  m68k_set_context(&PicoCpuMM68k); // if we ever reset m68k, we always need it's context to be set\r
  m68ki_cpu.sp[0]=0;\r
  m68k_set_irq(0);\r
  m68k_pulse_reset();\r
  REG_USP = 0; // ?\r
#endif\r
#ifdef EMU_F68K\r
  {\r
    g_m68kcontext = &PicoCpuFM68k;\r
    fm68k_reset();\r
  }\r
#endif\r
\r
  return 0;\r
}\r
\r
void SekStepM68k(void)\r
{\r
  SekCycleAim=SekCycleCnt+1;\r
#if defined(EMU_CORE_DEBUG)\r
  SekCycleCnt+=CM_compareRun(1, 0);\r
#elif defined(EMU_C68K)\r
  PicoCpuCM68k.cycles=1;\r
  CycloneRun(&PicoCpuCM68k);\r
  SekCycleCnt+=1-PicoCpuCM68k.cycles;\r
#elif defined(EMU_M68K)\r
  SekCycleCnt+=m68k_execute(1);\r
#elif defined(EMU_F68K)\r
  SekCycleCnt+=fm68k_emulate(1, 0, 0);\r
#endif\r
}\r
\r
PICO_INTERNAL void SekSetRealTAS(int use_real)\r
{\r
#ifdef EMU_C68K\r
  CycloneSetRealTAS(use_real);\r
#endif\r
#ifdef EMU_F68K\r
  // TODO\r
#endif\r
}\r
\r
\r
/* idle loop detection, not to be used in CD mode */\r
#ifdef EMU_C68K\r
#include "cpu/Cyclone/tools/idle.h"\r
#endif\r
\r
static int *idledet_addrs = NULL;\r
static int idledet_count = 0, idledet_bads = 0;\r
int idledet_start_frame = 0;\r
\r
void SekInitIdleDet(void)\r
{\r
  void *tmp = realloc(idledet_addrs, 0x200*4);\r
  if (tmp == NULL) {\r
    free(idledet_addrs);\r
    idledet_addrs = NULL;\r
  }\r
  else\r
    idledet_addrs = tmp;\r
  idledet_count = idledet_bads = 0;\r
  idledet_start_frame = Pico.m.frame_count + 360;\r
\r
#ifdef EMU_C68K\r
  CycloneInitIdle();\r
#endif\r
#ifdef EMU_F68K\r
  fm68k_emulate(0, 0, 1);\r
#endif\r
}\r
\r
int SekIsIdleCode(unsigned short *dst, int bytes)\r
{\r
  // printf("SekIsIdleCode %04x %i\n", *dst, bytes);\r
  switch (bytes)\r
  {\r
    case 4:\r
      if (  (*dst & 0xfff8) == 0x4a10 || // tst.b ($aX)      // there should be no need to wait\r
            (*dst & 0xfff8) == 0x4a28 || // tst.b ($xxxx,a0) // for byte change anywhere\r
            (*dst & 0xff3f) == 0x4a38 || // tst.x ($xxxx.w); tas ($xxxx.w)\r
            (*dst & 0xc1ff) == 0x0038 || // move.x ($xxxx.w), dX\r
            (*dst & 0xf13f) == 0xb038)   // cmp.x ($xxxx.w), dX\r
        return 1;\r
      break;\r
    case 6:\r
      if ( ((dst[1] & 0xe0) == 0xe0 && ( // RAM and\r
            *dst == 0x4a39 ||            //   tst.b ($xxxxxxxx)\r
            *dst == 0x4a79 ||            //   tst.w ($xxxxxxxx)\r
            *dst == 0x4ab9 ||            //   tst.l ($xxxxxxxx)\r
            (*dst & 0xc1ff) == 0x0039 || //   move.x ($xxxxxxxx), dX\r
            (*dst & 0xf13f) == 0xb039))||//   cmp.x ($xxxxxxxx), dX\r
            *dst == 0x0838 ||            // btst $X, ($xxxx.w) [6 byte op]\r
            (*dst & 0xffbf) == 0x0c38)   // cmpi.{b,w} $X, ($xxxx.w)\r
        return 1;\r
      break;\r
    case 8:\r
      if ( ((dst[2] & 0xe0) == 0xe0 && ( // RAM and\r
            *dst == 0x0839 ||            //   btst $X, ($xxxxxxxx.w) [8 byte op]\r
            (*dst & 0xffbf) == 0x0c39))||//   cmpi.{b,w} $X, ($xxxxxxxx)\r
            *dst == 0x0cb8)              // cmpi.l $X, ($xxxx.w)\r
        return 1;\r
      break;\r
    case 12:\r
       if ((*dst & 0xf1f8) == 0x3010 && // move.w (aX), dX\r
            (dst[1]&0xf100) == 0x0000 && // arithmetic\r
            (dst[3]&0xf100) == 0x0000)   // arithmetic\r
        return 1;\r
      break;\r
  }\r
\r
  return 0;\r
}\r
\r
int SekRegisterIdlePatch(unsigned int pc, int oldop, int newop)\r
{\r
#ifdef EMU_C68K\r
  pc -= PicoCpuCM68k.membase;\r
#endif\r
  pc &= ~0xff000000;\r
  elprintf(EL_IDLE, "idle: patch %06x %04x %04x #%i", pc, oldop, newop, idledet_count);\r
  if (pc > Pico.romsize && !(PicoAHW & PAHW_SVP)) {\r
    if (++idledet_bads > 128) return 2; // remove detector\r
    return 1; // don't patch\r
  }\r
\r
  if (idledet_count >= 0x200 && (idledet_count & 0x1ff) == 0) {\r
    void *tmp = realloc(idledet_addrs, (idledet_count+0x200)*4);\r
    if (tmp == NULL) return 1;\r
    idledet_addrs = tmp;\r
  }\r
\r
  if (pc < Pico.romsize)\r
    idledet_addrs[idledet_count++] = pc;\r
\r
  return 0;\r
}\r
\r
void SekFinishIdleDet(void)\r
{\r
#ifdef EMU_C68K\r
  CycloneFinishIdle();\r
#endif\r
#ifdef EMU_F68K\r
  fm68k_emulate(0, 0, 2);\r
#endif\r
  while (idledet_count > 0)\r
  {\r
    unsigned short *op = (unsigned short *)&Pico.rom[idledet_addrs[--idledet_count]];\r
    if      ((*op & 0xfd00) == 0x7100)\r
      *op &= 0xff, *op |= 0x6600;\r
    else if ((*op & 0xfd00) == 0x7500)\r
      *op &= 0xff, *op |= 0x6700;\r
    else if ((*op & 0xfd00) == 0x7d00)\r
      *op &= 0xff, *op |= 0x6000;\r
    else\r
      elprintf(EL_STATUS|EL_IDLE, "idle: don't know how to restore %04x", *op);\r
  }\r
}\r
\r
\r
#if defined(EMU_M68K) && M68K_INSTRUCTION_HOOK == OPT_SPECIFY_HANDLER\r
static unsigned char op_flags[0x400000/2] = { 0, };\r
static int atexit_set = 0;\r
\r
static void make_idc(void)\r
{\r
  FILE *f = fopen("idc.idc", "w");\r
  int i;\r
  if (!f) return;\r
  fprintf(f, "#include <idc.idc>\nstatic main() {\n");\r
  for (i = 0; i < 0x400000/2; i++)\r
    if (op_flags[i] != 0)\r
      fprintf(f, "  MakeCode(0x%06x);\n", i*2);\r
  fprintf(f, "}\n");\r
  fclose(f);\r
}\r
\r
void instruction_hook(void)\r
{\r
  if (!atexit_set) {\r
    atexit(make_idc);\r
    atexit_set = 1;\r
  }\r
  if (REG_PC < 0x400000)\r
    op_flags[REG_PC/2] = 1;\r
}\r
#endif\r
Commit	Line	Data
cc68a136	1	// This is part of Pico Library\r
	2	\r
	3	// (c) Copyright 2004 Dave, All rights reserved.\r
	4	// (c) Copyright 2006 notaz, All rights reserved.\r
	5	// Free for non-commercial use.\r
	6	\r
	7	// For commercial use, separate licencing terms must be obtained.\r
	8	\r
	9	\r
	10	#include "PicoInt.h"\r
	11	\r
	12	\r
	13	int SekCycleCnt=0; // cycles done in this frame\r
	14	int SekCycleAim=0; // cycle aim\r
	15	unsigned int SekCycleCntT=0;\r
	16	\r
70357ce5	17	\r
	18	/* context */\r
	19	// Cyclone 68000\r
cc68a136	20	#ifdef EMU_C68K\r
3aa1e148	21	struct Cyclone PicoCpuCM68k;\r
cc68a136	22	#endif\r
70357ce5	23	// MUSASHI 68000\r
cc68a136	24	#ifdef EMU_M68K\r
3aa1e148	25	m68ki_cpu_core PicoCpuMM68k;\r
cc68a136	26	#endif\r
70357ce5	27	// FAME 68000\r
70357ce5	28	#ifdef EMU_F68K\r
3aa1e148	29	M68K_CONTEXT PicoCpuFM68k;\r
cc68a136	30	#endif\r
	31	\r
	32	\r
70357ce5	33	/* callbacks */\r
cc68a136	34	#ifdef EMU_C68K\r
b837b69b	35	// interrupt acknowledgment\r
0af33fe0	36	static int SekIntAck(int level)\r
cc68a136	37	{\r
cc68a136	38	// try to emulate VDP's reaction to 68000 int ack\r
69996cb7	39	if (level == 4) { Pico.video.pending_ints = 0; elprintf(EL_INTS, "hack: @ %06x [%i]", SekPc, SekCycleCnt); }\r
69996cb7	40	else if(level == 6) { Pico.video.pending_ints &= ~0x20; elprintf(EL_INTS, "vack: @ %06x [%i]", SekPc, SekCycleCnt); }\r
3aa1e148	41	PicoCpuCM68k.irq = 0;\r
0af33fe0	42	return CYCLONE_INT_ACK_AUTOVECTOR;\r
cc68a136	43	}\r
cc68a136	44	\r
69996cb7	45	static void SekResetAck(void)\r
cc68a136	46	{\r
69996cb7	47	elprintf(EL_ANOMALY, "Reset encountered @ %06x", SekPc);\r
cc68a136	48	}\r
	49	\r
	50	static int SekUnrecognizedOpcode()\r
	51	{\r
	52	unsigned int pc, op;\r
	53	pc = SekPc;\r
3aa1e148	54	op = PicoCpuCM68k.read16(pc);\r
69996cb7	55	elprintf(EL_ANOMALY, "Unrecognized Opcode %04x @ %06x", op, pc);\r
cc68a136	56	// see if we are not executing trash\r
cc68a136	57	if (pc < 0x200 \|\| (pc > Pico.romsize+4 && (pc&0xe00000)!=0xe00000)) {\r
3aa1e148	58	PicoCpuCM68k.cycles = 0;\r
3aa1e148	59	PicoCpuCM68k.state_flags \|= 1;\r
cc68a136	60	return 1;\r
cc68a136	61	}\r
2d0b15bb	62	#ifdef EMU_M68K // debugging cyclone\r
	63	{\r
	64	extern int have_illegal;\r
	65	have_illegal = 1;\r
	66	}\r
	67	#endif\r
cc68a136	68	return 0;\r
	69	}\r
	70	#endif\r
	71	\r
	72	\r
	73	#ifdef EMU_M68K\r
	74	static int SekIntAckM68K(int level)\r
	75	{\r
69996cb7	76	if (level == 4) { Pico.video.pending_ints = 0; elprintf(EL_INTS, "hack: @ %06x [%i]", SekPc, SekCycleCnt); }\r
69996cb7	77	else if(level == 6) { Pico.video.pending_ints &= ~0x20; elprintf(EL_INTS, "vack: @ %06x [%i]", SekPc, SekCycleCnt); }\r
cc68a136	78	CPU_INT_LEVEL = 0;\r
	79	return M68K_INT_ACK_AUTOVECTOR;\r
	80	}\r
0af33fe0	81	\r
	82	static int SekTasCallback(void)\r
	83	{\r
	84	return 0; // no writeback\r
	85	}\r
cc68a136	86	#endif\r
	87	\r
	88	\r
70357ce5	89	#ifdef EMU_F68K\r
3aa1e148	90	static void SekIntAckF68K(unsigned level)\r
70357ce5	91	{\r
	92	if (level == 4) { Pico.video.pending_ints = 0; elprintf(EL_INTS, "hack: @ %06x [%i]", SekPc, SekCycleCnt); }\r
	93	else if(level == 6) { Pico.video.pending_ints &= ~0x20; elprintf(EL_INTS, "vack: @ %06x [%i]", SekPc, SekCycleCnt); }\r
3aa1e148	94	PicoCpuFM68k.interrupts[0] = 0;\r
70357ce5	95	}\r
	96	#endif\r
	97	\r
cc68a136	98	\r
2aa27095	99	PICO_INTERNAL void SekInit(void)\r
cc68a136	100	{\r
	101	#ifdef EMU_C68K\r
	102	CycloneInit();\r
3aa1e148	103	memset(&PicoCpuCM68k,0,sizeof(PicoCpuCM68k));\r
	104	PicoCpuCM68k.IrqCallback=SekIntAck;\r
	105	PicoCpuCM68k.ResetCallback=SekResetAck;\r
	106	PicoCpuCM68k.UnrecognizedCallback=SekUnrecognizedOpcode;\r
03e4f2a3	107	PicoCpuCM68k.flags=4; // Z set\r
cc68a136	108	#endif\r
cc68a136	109	#ifdef EMU_M68K\r
	110	{\r
	111	void *oldcontext = m68ki_cpu_p;\r
3aa1e148	112	m68k_set_context(&PicoCpuMM68k);\r
cc68a136	113	m68k_set_cpu_type(M68K_CPU_TYPE_68000);\r
	114	m68k_init();\r
	115	m68k_set_int_ack_callback(SekIntAckM68K);\r
0af33fe0	116	m68k_set_tas_instr_callback(SekTasCallback);\r
9037e45d	117	//m68k_pulse_reset();\r
cc68a136	118	m68k_set_context(oldcontext);\r
	119	}\r
	120	#endif\r
70357ce5	121	#ifdef EMU_F68K\r
	122	{\r
	123	void *oldcontext = g_m68kcontext;\r
3aa1e148	124	g_m68kcontext = &PicoCpuFM68k;\r
3aa1e148	125	memset(&PicoCpuFM68k, 0, sizeof(PicoCpuFM68k));\r
03e4f2a3	126	fm68k_init();\r
3aa1e148	127	PicoCpuFM68k.iack_handler = SekIntAckF68K;\r
b5e5172d	128	PicoCpuFM68k.sr = 0x2704; // Z flag\r
70357ce5	129	g_m68kcontext = oldcontext;\r
	130	}\r
	131	#endif\r
cc68a136	132	}\r
cc68a136	133	\r
70357ce5	134	\r
cc68a136	135	// Reset the 68000:\r
2aa27095	136	PICO_INTERNAL int SekReset(void)\r
cc68a136	137	{\r
	138	if (Pico.rom==NULL) return 1;\r
	139	\r
	140	#ifdef EMU_C68K\r
3aa1e148	141	PicoCpuCM68k.state_flags=0;\r
	142	PicoCpuCM68k.osp=0;\r
	143	PicoCpuCM68k.srh =0x27; // Supervisor mode\r
3aa1e148	144	PicoCpuCM68k.irq=0;\r
	145	PicoCpuCM68k.a[7]=PicoCpuCM68k.read32(0); // Stack Pointer\r
	146	PicoCpuCM68k.membase=0;\r
	147	PicoCpuCM68k.pc=PicoCpuCM68k.checkpc(PicoCpuCM68k.read32(4)); // Program Counter\r
cc68a136	148	#endif\r
cc68a136	149	#ifdef EMU_M68K\r
3aa1e148	150	m68k_set_context(&PicoCpuMM68k); // if we ever reset m68k, we always need it's context to be set\r
2d0b15bb	151	m68ki_cpu.sp[0]=0;\r
2d0b15bb	152	m68k_set_irq(0);\r
b837b69b	153	m68k_pulse_reset();\r
99464b62	154	REG_USP = 0; // ?\r
cc68a136	155	#endif\r
70357ce5	156	#ifdef EMU_F68K\r
70357ce5	157	{\r
3aa1e148	158	g_m68kcontext = &PicoCpuFM68k;\r
03e4f2a3	159	fm68k_reset();\r
70357ce5	160	}\r
70357ce5	161	#endif\r
cc68a136	162	\r
	163	return 0;\r
	164	}\r
	165	\r
5f9a0d16	166	void SekStepM68k(void)\r
	167	{\r
	168	SekCycleAim=SekCycleCnt+1;\r
	169	#if defined(EMU_CORE_DEBUG)\r
	170	SekCycleCnt+=CM_compareRun(1, 0);\r
	171	#elif defined(EMU_C68K)\r
	172	PicoCpuCM68k.cycles=1;\r
	173	CycloneRun(&PicoCpuCM68k);\r
	174	SekCycleCnt+=1-PicoCpuCM68k.cycles;\r
	175	#elif defined(EMU_M68K)\r
	176	SekCycleCnt+=m68k_execute(1);\r
	177	#elif defined(EMU_F68K)\r
f579f7b8	178	SekCycleCnt+=fm68k_emulate(1, 0, 0);\r
5f9a0d16	179	#endif\r
5f9a0d16	180	}\r
cc68a136	181	\r
eff55556	182	PICO_INTERNAL void SekSetRealTAS(int use_real)\r
2433f409	183	{\r
	184	#ifdef EMU_C68K\r
	185	CycloneSetRealTAS(use_real);\r
	186	#endif\r
70357ce5	187	#ifdef EMU_F68K\r
	188	// TODO\r
	189	#endif\r
2433f409	190	}\r
2433f409	191	\r
5f9a0d16	192	\r
053fd9b4	193	/* idle loop detection, not to be used in CD mode */\r
	194	#ifdef EMU_C68K\r
	195	#include "cpu/Cyclone/tools/idle.h"\r
	196	#endif\r
	197	\r
	198	static int *idledet_addrs = NULL;\r
	199	static int idledet_count = 0, idledet_bads = 0;\r
	200	int idledet_start_frame = 0;\r
053fd9b4	201	\r
	202	void SekInitIdleDet(void)\r
	203	{\r
	204	void tmp = realloc(idledet_addrs, 0x2004);\r
	205	if (tmp == NULL) {\r
	206	free(idledet_addrs);\r
	207	idledet_addrs = NULL;\r
	208	}\r
	209	else\r
	210	idledet_addrs = tmp;\r
	211	idledet_count = idledet_bads = 0;\r
	212	idledet_start_frame = Pico.m.frame_count + 360;\r
	213	\r
053fd9b4	214	#ifdef EMU_C68K\r
	215	CycloneInitIdle();\r
	216	#endif\r
c060a9ab	217	#ifdef EMU_F68K\r
c060a9ab	218	fm68k_emulate(0, 0, 1);\r
c060a9ab	219	#endif\r
053fd9b4	220	}\r
	221	\r
	222	int SekIsIdleCode(unsigned short *dst, int bytes)\r
	223	{\r
8187ba84	224	// printf("SekIsIdleCode %04x %i\n", *dst, bytes);\r
053fd9b4	225	switch (bytes)\r
	226	{\r
	227	case 4:\r
b0677887	228	if ( (*dst & 0xfff8) == 0x4a10 \|\| // tst.b ($aX) // there should be no need to wait\r
	229	(*dst & 0xfff8) == 0x4a28 \|\| // tst.b ($xxxx,a0) // for byte change anywhere\r
	230	(*dst & 0xff3f) == 0x4a38 \|\| // tst.x ($xxxx.w); tas ($xxxx.w)\r
053fd9b4	231	(*dst & 0xc1ff) == 0x0038 \|\| // move.x ($xxxx.w), dX\r
	232	(*dst & 0xf13f) == 0xb038) // cmp.x ($xxxx.w), dX\r
	233	return 1;\r
	234	break;\r
	235	case 6:\r
b0677887	236	if ( ((dst[1] & 0xe0) == 0xe0 && ( // RAM and\r
	237	*dst == 0x4a39 \|\| // tst.b ($xxxxxxxx)\r
	238	*dst == 0x4a79 \|\| // tst.w ($xxxxxxxx)\r
	239	*dst == 0x4ab9 \|\| // tst.l ($xxxxxxxx)\r
	240	(*dst & 0xc1ff) == 0x0039 \|\| // move.x ($xxxxxxxx), dX\r
	241	(*dst & 0xf13f) == 0xb039))\|\|// cmp.x ($xxxxxxxx), dX\r
	242	*dst == 0x0838 \|\| // btst $X, ($xxxx.w) [6 byte op]\r
	243	(*dst & 0xffbf) == 0x0c38) // cmpi.{b,w} $X, ($xxxx.w)\r
053fd9b4	244	return 1;\r
	245	break;\r
	246	case 8:\r
b0677887	247	if ( ((dst[2] & 0xe0) == 0xe0 && ( // RAM and\r
	248	*dst == 0x0839 \|\| // btst $X, ($xxxxxxxx.w) [8 byte op]\r
	249	(*dst & 0xffbf) == 0x0c39))\|\|// cmpi.{b,w} $X, ($xxxxxxxx)\r
	250	*dst == 0x0cb8) // cmpi.l $X, ($xxxx.w)\r
053fd9b4	251	return 1;\r
	252	break;\r
	253	case 12:\r
	254	if ((*dst & 0xf1f8) == 0x3010 && // move.w (aX), dX\r
b0677887	255	(dst[1]&0xf100) == 0x0000 && // arithmetic\r
b0677887	256	(dst[3]&0xf100) == 0x0000) // arithmetic\r
053fd9b4	257	return 1;\r
	258	break;\r
	259	}\r
	260	\r
	261	return 0;\r
	262	}\r
	263	\r
	264	int SekRegisterIdlePatch(unsigned int pc, int oldop, int newop)\r
	265	{\r
	266	#ifdef EMU_C68K\r
	267	pc -= PicoCpuCM68k.membase;\r
	268	#endif\r
	269	pc &= ~0xff000000;\r
	270	elprintf(EL_IDLE, "idle: patch %06x %04x %04x #%i", pc, oldop, newop, idledet_count);\r
b0677887	271	if (pc > Pico.romsize && !(PicoAHW & PAHW_SVP)) {\r
053fd9b4	272	if (++idledet_bads > 128) return 2; // remove detector\r
	273	return 1; // don't patch\r
	274	}\r
	275	\r
	276	if (idledet_count >= 0x200 && (idledet_count & 0x1ff) == 0) {\r
	277	void tmp = realloc(idledet_addrs, (idledet_count+0x200)4);\r
	278	if (tmp == NULL) return 1;\r
	279	idledet_addrs = tmp;\r
	280	}\r
	281	\r
b0677887	282	if (pc < Pico.romsize)\r
	283	idledet_addrs[idledet_count++] = pc;\r
	284	\r
053fd9b4	285	return 0;\r
	286	}\r
	287	\r
	288	void SekFinishIdleDet(void)\r
	289	{\r
053fd9b4	290	#ifdef EMU_C68K\r
053fd9b4	291	CycloneFinishIdle();\r
c060a9ab	292	#endif\r
	293	#ifdef EMU_F68K\r
	294	fm68k_emulate(0, 0, 2);\r
053fd9b4	295	#endif\r
	296	while (idledet_count > 0)\r
	297	{\r
	298	unsigned short op = (unsigned short )&Pico.rom[idledet_addrs[--idledet_count]];\r
	299	if ((*op & 0xfd00) == 0x7100)\r
	300	op &= 0xff, op \|= 0x6600;\r
	301	else if ((*op & 0xfd00) == 0x7500)\r
	302	op &= 0xff, op \|= 0x6700;\r
	303	else if ((*op & 0xfd00) == 0x7d00)\r
	304	op &= 0xff, op \|= 0x6000;\r
	305	else\r
	306	elprintf(EL_STATUS\|EL_IDLE, "idle: don't know how to restore %04x", *op);\r
	307	}\r
053fd9b4	308	}\r
	309	\r
	310	\r
6cab49fd	311	#if defined(EMU_M68K) && M68K_INSTRUCTION_HOOK == OPT_SPECIFY_HANDLER\r
	312	static unsigned char op_flags[0x400000/2] = { 0, };\r
	313	static int atexit_set = 0;\r
	314	\r
	315	static void make_idc(void)\r
	316	{\r
	317	FILE *f = fopen("idc.idc", "w");\r
	318	int i;\r
	319	if (!f) return;\r
	320	fprintf(f, "#include <idc.idc>\nstatic main() {\n");\r
	321	for (i = 0; i < 0x400000/2; i++)\r
	322	if (op_flags[i] != 0)\r
	323	fprintf(f, " MakeCode(0x%06x);\n", i*2);\r
	324	fprintf(f, "}\n");\r
	325	fclose(f);\r
	326	}\r
	327	\r
	328	void instruction_hook(void)\r
	329	{\r
	330	if (!atexit_set) {\r
	331	atexit(make_idc);\r
	332	atexit_set = 1;\r
	333	}\r
	334	if (REG_PC < 0x400000)\r
	335	op_flags[REG_PC/2] = 1;\r
	336	}\r
	337	#endif\r