[picodrive.git] / pico / sek.c

/*\r
 * PicoDrive\r
 * (c) Copyright Dave, 2004\r
 * (C) notaz, 2006-2009\r
 *\r
 * This work is licensed under the terms of MAME license.\r
 * See COPYING file in the top-level directory.\r
 */\r
\r
#include "pico_int.h"\r
#include "memory.h"\r
\r
/* context */\r
// Cyclone 68000\r
#ifdef EMU_C68K\r
struct Cyclone PicoCpuCM68k;\r
#endif\r
// MUSASHI 68000\r
#ifdef EMU_M68K\r
m68ki_cpu_core PicoCpuMM68k;\r
#endif\r
// FAME 68000\r
#ifdef EMU_F68K\r
M68K_CONTEXT PicoCpuFM68k;\r
#endif\r
\r
\r
static int do_ack(int level)\r
{\r
  struct PicoVideo *pv = &Pico.video;\r
\r
  elprintf(EL_INTS, "%cack: @ %06x [%u], p=%02x",\r
    level == 6 ? 'v' : 'h', SekPc, SekCyclesDone(), pv->pending_ints);\r
  // the VDP doesn't look at the 68k level\r
  if (pv->pending_ints & pv->reg[1] & 0x20) {\r
    pv->pending_ints &= ~0x20;\r
    pv->status &= ~SR_F;\r
    if (pv->reg[0] & pv->pending_ints & 0x10)\r
      return pv->hint_irq;\r
  }\r
  else if (pv->pending_ints & pv->reg[0] & 0x10)\r
    pv->pending_ints &= ~0x10;\r
\r
  return (PicoIn.AHW & PAHW_PICO ? PicoPicoIrqAck(level) : 0);\r
}\r
\r
/* callbacks */\r
#ifdef EMU_C68K\r
// interrupt acknowledgment\r
static int SekIntAck(int level)\r
{\r
  PicoCpuCM68k.irq = do_ack(level);\r
  return CYCLONE_INT_ACK_AUTOVECTOR;\r
}\r
\r
static void SekResetAck(void)\r
{\r
  elprintf(EL_ANOMALY, "Reset encountered @ %06x", SekPc);\r
}\r
\r
static int SekUnrecognizedOpcode()\r
{\r
  unsigned int pc;\r
  pc = SekPc;\r
  elprintf(EL_ANOMALY, "Unrecognized Opcode @ %06x", pc);\r
  // see if we are still in a mapped region\r
  pc &= 0x00ffffff;\r
  if (map_flag_set(m68k_read16_map[pc >> M68K_MEM_SHIFT])) {\r
    elprintf(EL_STATUS|EL_ANOMALY, "m68k crash @%06x", pc);\r
    PicoCpuCM68k.cycles = 0;\r
    PicoCpuCM68k.state_flags |= 1;\r
    return 1;\r
  }\r
  // happened once - may happen again\r
  SekFinishIdleDet();\r
#ifdef EMU_M68K // debugging cyclone\r
  {\r
    extern int have_illegal;\r
    have_illegal = 1;\r
  }\r
#endif\r
  return 0;\r
}\r
#endif\r
\r
\r
#ifdef EMU_M68K\r
static int SekIntAckM68K(int level)\r
{\r
  CPU_INT_LEVEL = do_ack(level) << 8;\r
  return M68K_INT_ACK_AUTOVECTOR;\r
}\r
\r
static int SekTasCallback(void)\r
{\r
  return 0; // no writeback\r
}\r
#endif\r
\r
\r
#ifdef EMU_F68K\r
static void SekIntAckF68K(unsigned level)\r
{\r
  PicoCpuFM68k.interrupts[0] = do_ack(level);\r
}\r
#endif\r
\r
\r
PICO_INTERNAL void SekInit(void)\r
{\r
#ifdef EMU_C68K\r
  CycloneInit();\r
  memset(&PicoCpuCM68k,0,sizeof(PicoCpuCM68k));\r
  PicoCpuCM68k.IrqCallback=SekIntAck;\r
  PicoCpuCM68k.ResetCallback=SekResetAck;\r
  PicoCpuCM68k.UnrecognizedCallback=SekUnrecognizedOpcode;\r
  PicoCpuCM68k.flags=4;   // Z set\r
#endif\r
#ifdef EMU_M68K\r
  {\r
    void *oldcontext = m68ki_cpu_p;\r
    m68k_set_context(&PicoCpuMM68k);\r
    m68k_set_cpu_type(M68K_CPU_TYPE_68000);\r
    m68k_init();\r
    m68k_set_int_ack_callback(SekIntAckM68K);\r
    m68k_set_tas_instr_callback(SekTasCallback);\r
    //m68k_pulse_reset();\r
    m68k_set_context(oldcontext);\r
  }\r
#endif\r
#ifdef EMU_F68K\r
  memset(&PicoCpuFM68k, 0, sizeof(PicoCpuFM68k));\r
  fm68k_init();\r
  PicoCpuFM68k.iack_handler = SekIntAckF68K;\r
  PicoCpuFM68k.sr = 0x2704; // Z flag\r
#endif\r
}\r
\r
\r
// Reset the 68000:\r
PICO_INTERNAL int SekReset(void)\r
{\r
  if (Pico.rom==NULL) return 1;\r
\r
#ifdef EMU_C68K\r
  CycloneReset(&PicoCpuCM68k);\r
#endif\r
#ifdef EMU_M68K\r
  m68k_set_context(&PicoCpuMM68k); // if we ever reset m68k, we always need it's context to be set\r
  m68ki_cpu.sp[0]=0;\r
  m68k_set_irq(0);\r
  m68k_pulse_reset();\r
  REG_USP = 0; // ?\r
#endif\r
#ifdef EMU_F68K\r
  fm68k_reset(&PicoCpuFM68k);\r
#endif\r
\r
  return 0;\r
}\r
\r
void SekStepM68k(void)\r
{\r
  Pico.t.m68c_aim = Pico.t.m68c_cnt + 1;\r
#if defined(EMU_CORE_DEBUG)\r
  Pico.t.m68c_cnt += CM_compareRun(1, 0);\r
#elif defined(EMU_C68K)\r
  PicoCpuCM68k.cycles=1;\r
  CycloneRun(&PicoCpuCM68k);\r
  Pico.t.m68c_cnt += 1 - PicoCpuCM68k.cycles;\r
#elif defined(EMU_M68K)\r
  Pico.t.m68c_cnt += m68k_execute(1);\r
#elif defined(EMU_F68K)\r
  Pico.t.m68c_cnt += fm68k_emulate(&PicoCpuFM68k, 1, 0);\r
#endif\r
}\r
\r
PICO_INTERNAL void SekSetRealTAS(int use_real)\r
{\r
#ifdef EMU_C68K\r
  CycloneSetRealTAS(use_real);\r
#endif\r
#ifdef EMU_F68K\r
  // TODO\r
#endif\r
}\r
\r
// Pack the cpu into a common format:\r
// XXX: rename\r
PICO_INTERNAL void SekPackCpu(unsigned char *cpu, int is_sub)\r
{\r
#if defined(EMU_C68K)\r
  struct Cyclone *context = is_sub ? &PicoCpuCS68k : &PicoCpuCM68k;\r
  memcpy(cpu,context->d,0x40);\r
  *(u32 *)(cpu+0x40)=context->pc-context->membase;\r
  *(u32 *)(cpu+0x44)=CycloneGetSr(context);\r
  *(u32 *)(cpu+0x48)=context->osp;\r
  cpu[0x4c] = context->irq;\r
  cpu[0x4d] = context->state_flags & 1;\r
#elif defined(EMU_M68K)\r
  void *oldcontext = m68ki_cpu_p;\r
  m68k_set_context(is_sub ? &PicoCpuMS68k : &PicoCpuMM68k);\r
  memcpy(cpu,m68ki_cpu_p->dar,0x40);\r
  *(u32  *)(cpu+0x40)=m68ki_cpu_p->pc;\r
  *(u32  *)(cpu+0x44)=m68k_get_reg(NULL, M68K_REG_SR);\r
  *(u32  *)(cpu+0x48)=m68ki_cpu_p->sp[m68ki_cpu_p->s_flag^SFLAG_SET];\r
  cpu[0x4c] = CPU_INT_LEVEL>>8;\r
  cpu[0x4d] = CPU_STOPPED;\r
  m68k_set_context(oldcontext);\r
#elif defined(EMU_F68K)\r
  M68K_CONTEXT *context = is_sub ? &PicoCpuFS68k : &PicoCpuFM68k;\r
  memcpy(cpu,context->dreg,0x40);\r
  *(u32  *)(cpu+0x40)=context->pc;\r
  *(u32  *)(cpu+0x44)=context->sr;\r
  *(u32  *)(cpu+0x48)=context->asp;\r
  cpu[0x4c] = context->interrupts[0];\r
  cpu[0x4d] = (context->execinfo & FM68K_HALTED) ? 1 : 0;\r
#endif\r
\r
  if (is_sub) {\r
    *(u32 *)(cpu+0x50) = SekCycleCntS68k;\r
    *(s16 *)(cpu+0x4e) = SekCycleCntS68k - SekCycleAimS68k;\r
  } else {\r
    *(u32 *)(cpu+0x50) = Pico.t.m68c_cnt + Pico.t.z80_buscycles +\r
                          ((Pico.t.refresh_delay + (1<<14)/2) >> 14);\r
    *(s16 *)(cpu+0x4e) = Pico.t.m68c_cnt - Pico.t.m68c_aim;\r
  }\r
}\r
\r
PICO_INTERNAL void SekUnpackCpu(const unsigned char *cpu, int is_sub)\r
{\r
#if defined(EMU_C68K)\r
  struct Cyclone *context = is_sub ? &PicoCpuCS68k : &PicoCpuCM68k;\r
  CycloneSetSr(context, *(u32 *)(cpu+0x44));\r
  context->osp=*(u32 *)(cpu+0x48);\r
  memcpy(context->d,cpu,0x40);\r
  context->membase = 0;\r
  context->pc = *(u32 *)(cpu+0x40);\r
  CycloneUnpack(context, NULL); // rebase PC\r
  context->irq = cpu[0x4c];\r
  context->state_flags = 0;\r
  if (cpu[0x4d])\r
    context->state_flags |= 1;\r
#elif defined(EMU_M68K)\r
  void *oldcontext = m68ki_cpu_p;\r
  m68k_set_context(is_sub ? &PicoCpuMS68k : &PicoCpuMM68k);\r
  m68k_set_reg(M68K_REG_SR, *(u32 *)(cpu+0x44));\r
  memcpy(m68ki_cpu_p->dar,cpu,0x40);\r
  m68ki_cpu_p->pc=*(u32 *)(cpu+0x40);\r
  m68ki_cpu_p->sp[m68ki_cpu_p->s_flag^SFLAG_SET]=*(u32 *)(cpu+0x48);\r
  CPU_INT_LEVEL = cpu[0x4c] << 8;\r
  CPU_STOPPED = cpu[0x4d];\r
  m68k_set_context(oldcontext);\r
#elif defined(EMU_F68K)\r
  M68K_CONTEXT *context = is_sub ? &PicoCpuFS68k : &PicoCpuFM68k;\r
  memcpy(context->dreg,cpu,0x40);\r
  context->pc =*(u32 *)(cpu+0x40);\r
  context->sr =*(u32 *)(cpu+0x44);\r
  context->asp=*(u32 *)(cpu+0x48);\r
  context->interrupts[0] = cpu[0x4c];\r
  context->execinfo &= ~FM68K_HALTED;\r
  if (cpu[0x4d]&1) context->execinfo |= FM68K_HALTED;\r
#endif\r
  if (is_sub) {\r
    SekCycleCntS68k = *(u32 *)(cpu+0x50);\r
    SekCycleAimS68k = SekCycleCntS68k - *(s16 *)(cpu+0x4e);\r
  } else {\r
    Pico.t.m68c_cnt = *(u32 *)(cpu+0x50);\r
    Pico.t.m68c_aim = Pico.t.m68c_cnt - *(s16 *)(cpu+0x4e);\r
    Pico.t.z80_buscycles = 0;\r
    Pico.t.refresh_delay = 0;\r
  }\r
}\r
\r
\r
/* idle loop detection, not to be used in CD mode */\r
#ifdef EMU_C68K\r
#include <cpu/cyclone/tools/idle.h>\r
#endif\r
\r
static unsigned short **idledet_ptrs = NULL;\r
static int idledet_count = 0, idledet_bads = 0;\r
static int idledet_start_frame = 0;\r
\r
#if 0\r
#define IDLE_STATS 1\r
unsigned int idlehit_addrs[128], idlehit_counts[128];\r
\r
void SekRegisterIdleHit(unsigned int pc)\r
{\r
  int i;\r
  for (i = 0; i < 127 && idlehit_addrs[i]; i++) {\r
    if (idlehit_addrs[i] == pc) {\r
      idlehit_counts[i]++;\r
      return;\r
    }\r
  }\r
  idlehit_addrs[i] = pc;\r
  idlehit_counts[i] = 1;\r
  idlehit_addrs[i+1] = 0;\r
}\r
#endif\r
\r
void SekInitIdleDet(void)\r
{\r
  idledet_count = idledet_bads = 0;\r
  idledet_start_frame = Pico.m.frame_count + 360;\r
#ifdef IDLE_STATS\r
  idlehit_addrs[0] = 0;\r
#endif\r
\r
#ifdef EMU_C68K\r
  CycloneInitIdle();\r
#endif\r
#ifdef EMU_F68K\r
  fm68k_idle_install();\r
#endif\r
}\r
\r
int SekIsIdleReady(void)\r
{\r
	return (Pico.m.frame_count >= idledet_start_frame);\r
}\r
\r
int SekIsIdleCode(unsigned short *dst, int bytes)\r
{\r
  // printf("SekIsIdleCode %04x %i\n", *dst, bytes);\r
  if (idledet_count >= 0) switch (bytes)\r
  {\r
    case 2:\r
      if ((*dst & 0xf000) != 0x6000)     // not another branch\r
        return 1;\r
      break;\r
    case 4:\r
      if ( (*dst & 0xff3f) == 0x4a38 || // tst.x ($xxxx.w); tas ($xxxx.w)\r
           (*dst & 0xc1ff) == 0x0038 || // move.x ($xxxx.w), dX\r
           (*dst & 0xf13f) == 0xb038)   // cmp.x ($xxxx.w), dX\r
        return 1;\r
      if (PicoIn.AHW & (PAHW_MCD|PAHW_32X))\r
        break;\r
      // with no addons, there should be no need to wait\r
      // for byte change anywhere\r
      if ( (*dst & 0xfff8) == 0x4a10 || // tst.b ($aX)\r
           (*dst & 0xfff8) == 0x4a28)   // tst.b ($xxxx,a0)\r
        return 1;\r
      break;\r
    case 6:\r
      if ( ((dst[1] & 0xe0) == 0xe0 && ( // RAM and\r
            *dst == 0x4a39 ||            //   tst.b ($xxxxxxxx)\r
            *dst == 0x4a79 ||            //   tst.w ($xxxxxxxx)\r
            *dst == 0x4ab9 ||            //   tst.l ($xxxxxxxx)\r
            (*dst & 0xc1ff) == 0x0039 || //   move.x ($xxxxxxxx), dX\r
            (*dst & 0xf13f) == 0xb039))||//   cmp.x ($xxxxxxxx), dX\r
            *dst == 0x0838 ||            // btst $X, ($xxxx.w) [6 byte op]\r
            (*dst & 0xffbf) == 0x0c38)   // cmpi.{b,w} $X, ($xxxx.w)\r
        return 1;\r
      break;\r
    case 8:\r
      if ( ((dst[2] & 0xe0) == 0xe0 && ( // RAM and\r
            *dst == 0x0839 ||            //   btst $X, ($xxxxxxxx.w) [8 byte op]\r
            (*dst & 0xffbf) == 0x0c39))||//   cmpi.{b,w} $X, ($xxxxxxxx)\r
            *dst == 0x0cb8)              // cmpi.l $X, ($xxxx.w)\r
        return 1;\r
      break;\r
    case 12:\r
      if (PicoIn.AHW & (PAHW_MCD|PAHW_32X))\r
        break;\r
      if ( (*dst & 0xf1f8) == 0x3010 && // move.w (aX), dX\r
            (dst[1]&0xf100) == 0x0000 && // arithmetic\r
            (dst[3]&0xf100) == 0x0000)   // arithmetic\r
        return 1;\r
      break;\r
  }\r
\r
  return 0;\r
}\r
\r
int SekRegisterIdlePatch(unsigned int pc, int oldop, int newop, void *ctx)\r
{\r
  int is_main68k = 1;\r
  u16 *target;\r
  uptr v;\r
\r
#if   defined(EMU_C68K)\r
  struct Cyclone *cyc = ctx;\r
  is_main68k = cyc == &PicoCpuCM68k;\r
  pc -= cyc->membase;\r
#elif defined(EMU_F68K)\r
  is_main68k = ctx == &PicoCpuFM68k;\r
#endif\r
  pc &= ~0xff000000;\r
  if (!(newop&0x200))\r
  elprintf(EL_IDLE, "idle: patch %06x %04x %04x %c %c #%i", pc, oldop, newop,\r
    (newop&0x200)?'n':'y', is_main68k?'m':'s', idledet_count);\r
\r
  // XXX: probably shouldn't patch RAM too\r
  if (is_main68k)\r
    v = m68k_read16_map[pc >> M68K_MEM_SHIFT];\r
  else\r
    v = s68k_read16_map[pc >> M68K_MEM_SHIFT];\r
  if (~v & ~((uptr)-1LL >> 1)) // MSB clear?\r
    target = (u16 *)((v << 1) + pc);\r
  else {\r
    if (++idledet_bads > 128)\r
      return 2; // remove detector\r
    return 1; // don't patch\r
  }\r
\r
  if (!idledet_ptrs || (idledet_count & 0x1ff) == 0) {\r
    unsigned short **tmp;\r
    tmp = realloc(idledet_ptrs, (idledet_count+0x200) * sizeof(tmp[0]));\r
    if (tmp == NULL)\r
      return 1;\r
    idledet_ptrs = tmp;\r
  }\r
\r
  idledet_ptrs[idledet_count++] = target;\r
\r
  return 0;\r
}\r
\r
void SekFinishIdleDet(void)\r
{\r
  if (idledet_count < 0)\r
    return;\r
#ifdef EMU_C68K\r
  CycloneFinishIdle();\r
#endif\r
#ifdef EMU_F68K\r
  fm68k_idle_remove();\r
#endif\r
  while (idledet_count > 0)\r
  {\r
    unsigned short *op = idledet_ptrs[--idledet_count];\r
    if      ((*op & 0xfd00) == 0x7100)\r
      *op &= 0xff, *op |= 0x6600;\r
    else if ((*op & 0xfd00) == 0x7500)\r
      *op &= 0xff, *op |= 0x6700;\r
    else if ((*op & 0xfd00) == 0x7d00)\r
      *op &= 0xff, *op |= 0x6000;\r
    else\r
      elprintf(EL_STATUS|EL_IDLE, "idle: don't know how to restore %04x", *op);\r
  }\r
\r
  idledet_count = -1;\r
  if (idledet_ptrs)\r
    free(idledet_ptrs);\r
  idledet_ptrs = NULL;\r
}\r
\r
\r
#if defined(CPU_CMP_R) || defined(CPU_CMP_W)\r
#include "debug.h"\r
\r
struct ref_68k {\r
  u32 dar[16];\r
  u32 pc;\r
  u32 sr;\r
  u32 cycles;\r
  u32 pc_prev;\r
};\r
struct ref_68k ref_68ks[2];\r
static int current_68k;\r
\r
void SekTrace(int is_s68k)\r
{\r
  struct ref_68k *x68k = &ref_68ks[is_s68k];\r
  u32 pc = is_s68k ? SekPcS68k : SekPc;\r
  u32 sr = is_s68k ? SekSrS68k : SekSr;\r
  u32 cycles = is_s68k ? SekCycleCntS68k : Pico.t.m68c_cnt;\r
  u32 r;\r
  u8 cmd;\r
#ifdef CPU_CMP_W\r
  int i;\r
\r
  if (is_s68k != current_68k) {\r
    current_68k = is_s68k;\r
    cmd = CTL_68K_SLAVE | current_68k;\r
    tl_write(&cmd, sizeof(cmd));\r
  }\r
  if (pc != x68k->pc) {\r
    x68k->pc = pc;\r
    tl_write_uint(CTL_68K_PC, x68k->pc);\r
  }\r
  if (sr != x68k->sr) {\r
    x68k->sr = sr;\r
    tl_write_uint(CTL_68K_SR, x68k->sr);\r
  }\r
  for (i = 0; i < 16; i++) {\r
    r = is_s68k ? SekDarS68k(i) : SekDar(i);\r
    if (r != x68k->dar[i]) {\r
      x68k->dar[i] = r;\r
      tl_write_uint(CTL_68K_R + i, r);\r
    }\r
  }\r
  tl_write_uint(CTL_68K_CYCLES, cycles);\r
#else\r
  int i, bad = 0;\r
\r
  while (1)\r
  {\r
    int ret = tl_read(&cmd, sizeof(cmd));\r
    if (ret == 0) {\r
      elprintf(EL_STATUS, "EOF");\r
      exit(1);\r
    }\r
    switch (cmd) {\r
    case CTL_68K_SLAVE:\r
    case CTL_68K_SLAVE + 1:\r
      current_68k = cmd & 1;\r
      break;\r
    case CTL_68K_PC:\r
      tl_read_uint(&x68k->pc);\r
      break;\r
    case CTL_68K_SR:\r
      tl_read_uint(&x68k->sr);\r
      break;\r
    case CTL_68K_CYCLES:\r
      tl_read_uint(&x68k->cycles);\r
      goto breakloop;\r
    default:\r
      if (CTL_68K_R <= cmd && cmd < CTL_68K_R + 0x10)\r
        tl_read_uint(&x68k->dar[cmd - CTL_68K_R]);\r
      else\r
        elprintf(EL_STATUS, "invalid cmd: %02x", cmd);\r
    }\r
  }\r
\r
breakloop:\r
  if (is_s68k != current_68k) {\r
		printf("bad 68k: %d %d\n", is_s68k, current_68k);\r
    bad = 1;\r
  }\r
  if (cycles != x68k->cycles) {\r
		printf("bad cycles: %u %u\n", cycles, x68k->cycles);\r
    bad = 1;\r
  }\r
  if ((pc ^ x68k->pc) & 0xffffff) {\r
		printf("bad PC: %08x %08x\n", pc, x68k->pc);\r
    bad = 1;\r
  }\r
  if (sr != x68k->sr) {\r
		printf("bad SR:  %03x %03x\n", sr, x68k->sr);\r
    bad = 1;\r
  }\r
  for (i = 0; i < 16; i++) {\r
    r = is_s68k ? SekDarS68k(i) : SekDar(i);\r
    if (r != x68k->dar[i]) {\r
		  printf("bad %c%d: %08x %08x\n", i < 8 ? 'D' : 'A', i & 7,\r
        r, x68k->dar[i]);\r
      bad = 1;\r
    }\r
  }\r
  if (bad) {\r
    for (i = 0; i < 8; i++)\r
			printf("D%d: %08x  A%d: %08x\n", i, x68k->dar[i],\r
        i, x68k->dar[i + 8]);\r
		printf("PC: %08x, %08x\n", x68k->pc, x68k->pc_prev);\r
		printf("SR: %04x\n", x68k->sr);\r
\r
    PDebugDumpMem();\r
    exit(1);\r
  }\r
  x68k->pc_prev = x68k->pc;\r
#endif\r
}\r
#endif // CPU_CMP_*\r
\r
#if defined(EMU_M68K) && M68K_INSTRUCTION_HOOK == OPT_SPECIFY_HANDLER\r
static unsigned char op_flags[0x400000/2] = { 0, };\r
static int atexit_set = 0;\r
\r
static void make_idc(void)\r
{\r
  FILE *f = fopen("idc.idc", "w");\r
  int i;\r
  if (!f) return;\r
  fprintf(f, "#include <idc.idc>\nstatic main() {\n");\r
  for (i = 0; i < 0x400000/2; i++)\r
    if (op_flags[i] != 0)\r
      fprintf(f, "  MakeCode(0x%06x);\n", i*2);\r
  fprintf(f, "}\n");\r
  fclose(f);\r
}\r
\r
void instruction_hook(void)\r
{\r
  if (!atexit_set) {\r
    atexit(make_idc);\r
    atexit_set = 1;\r
  }\r
  if (REG_PC < 0x400000)\r
    op_flags[REG_PC/2] = 1;\r
}\r
#endif\r
\r
// vim:shiftwidth=2:ts=2:expandtab\r
Commit	Line	Data
cff531af	1	/*\r
	2	* PicoDrive\r
	3	* (c) Copyright Dave, 2004\r
	4	* (C) notaz, 2006-2009\r
	5	*\r
	6	* This work is licensed under the terms of MAME license.\r
	7	* See COPYING file in the top-level directory.\r
	8	*/\r
cc68a136	9	\r
efcba75f	10	#include "pico_int.h"\r
488c0bbf	11	#include "memory.h"\r
cc68a136	12	\r
70357ce5	13	/* context */\r
70357ce5	14	// Cyclone 68000\r
cc68a136	15	#ifdef EMU_C68K\r
3aa1e148	16	struct Cyclone PicoCpuCM68k;\r
cc68a136	17	#endif\r
70357ce5	18	// MUSASHI 68000\r
cc68a136	19	#ifdef EMU_M68K\r
3aa1e148	20	m68ki_cpu_core PicoCpuMM68k;\r
cc68a136	21	#endif\r
70357ce5	22	// FAME 68000\r
70357ce5	23	#ifdef EMU_F68K\r
3aa1e148	24	M68K_CONTEXT PicoCpuFM68k;\r
cc68a136	25	#endif\r
	26	\r
	27	\r
22814963	28	static int do_ack(int level)\r
	29	{\r
	30	struct PicoVideo *pv = &Pico.video;\r
	31	\r
	32	elprintf(EL_INTS, "%cack: @ %06x [%u], p=%02x",\r
	33	level == 6 ? 'v' : 'h', SekPc, SekCyclesDone(), pv->pending_ints);\r
	34	// the VDP doesn't look at the 68k level\r
	35	if (pv->pending_ints & pv->reg[1] & 0x20) {\r
	36	pv->pending_ints &= ~0x20;\r
0e4bde9b	37	pv->status &= ~SR_F;\r
ba2b97dc	38	if (pv->reg[0] & pv->pending_ints & 0x10)\r
ba2b97dc	39	return pv->hint_irq;\r
22814963	40	}\r
	41	else if (pv->pending_ints & pv->reg[0] & 0x10)\r
	42	pv->pending_ints &= ~0x10;\r
	43	\r
f1b425e3	44	return (PicoIn.AHW & PAHW_PICO ? PicoPicoIrqAck(level) : 0);\r
22814963	45	}\r
22814963	46	\r
70357ce5	47	/* callbacks */\r
cc68a136	48	#ifdef EMU_C68K\r
b837b69b	49	// interrupt acknowledgment\r
0af33fe0	50	static int SekIntAck(int level)\r
cc68a136	51	{\r
22814963	52	PicoCpuCM68k.irq = do_ack(level);\r
0af33fe0	53	return CYCLONE_INT_ACK_AUTOVECTOR;\r
cc68a136	54	}\r
cc68a136	55	\r
69996cb7	56	static void SekResetAck(void)\r
cc68a136	57	{\r
69996cb7	58	elprintf(EL_ANOMALY, "Reset encountered @ %06x", SekPc);\r
cc68a136	59	}\r
	60	\r
	61	static int SekUnrecognizedOpcode()\r
	62	{\r
b4db550e	63	unsigned int pc;\r
cc68a136	64	pc = SekPc;\r
b4db550e	65	elprintf(EL_ANOMALY, "Unrecognized Opcode @ %06x", pc);\r
	66	// see if we are still in a mapped region\r
	67	pc &= 0x00ffffff;\r
	68	if (map_flag_set(m68k_read16_map[pc >> M68K_MEM_SHIFT])) {\r
	69	elprintf(EL_STATUS\|EL_ANOMALY, "m68k crash @%06x", pc);\r
3aa1e148	70	PicoCpuCM68k.cycles = 0;\r
3aa1e148	71	PicoCpuCM68k.state_flags \|= 1;\r
cc68a136	72	return 1;\r
cc68a136	73	}\r
2b15cea8	74	// happened once - may happen again\r
2b15cea8	75	SekFinishIdleDet();\r
2d0b15bb	76	#ifdef EMU_M68K // debugging cyclone\r
	77	{\r
	78	extern int have_illegal;\r
	79	have_illegal = 1;\r
	80	}\r
	81	#endif\r
cc68a136	82	return 0;\r
	83	}\r
	84	#endif\r
	85	\r
	86	\r
	87	#ifdef EMU_M68K\r
	88	static int SekIntAckM68K(int level)\r
	89	{\r
22814963	90	CPU_INT_LEVEL = do_ack(level) << 8;\r
cc68a136	91	return M68K_INT_ACK_AUTOVECTOR;\r
cc68a136	92	}\r
0af33fe0	93	\r
	94	static int SekTasCallback(void)\r
	95	{\r
	96	return 0; // no writeback\r
	97	}\r
cc68a136	98	#endif\r
	99	\r
	100	\r
70357ce5	101	#ifdef EMU_F68K\r
3aa1e148	102	static void SekIntAckF68K(unsigned level)\r
70357ce5	103	{\r
22814963	104	PicoCpuFM68k.interrupts[0] = do_ack(level);\r
70357ce5	105	}\r
	106	#endif\r
	107	\r
cc68a136	108	\r
2aa27095	109	PICO_INTERNAL void SekInit(void)\r
cc68a136	110	{\r
	111	#ifdef EMU_C68K\r
	112	CycloneInit();\r
3aa1e148	113	memset(&PicoCpuCM68k,0,sizeof(PicoCpuCM68k));\r
	114	PicoCpuCM68k.IrqCallback=SekIntAck;\r
	115	PicoCpuCM68k.ResetCallback=SekResetAck;\r
	116	PicoCpuCM68k.UnrecognizedCallback=SekUnrecognizedOpcode;\r
03e4f2a3	117	PicoCpuCM68k.flags=4; // Z set\r
cc68a136	118	#endif\r
cc68a136	119	#ifdef EMU_M68K\r
	120	{\r
	121	void *oldcontext = m68ki_cpu_p;\r
3aa1e148	122	m68k_set_context(&PicoCpuMM68k);\r
cc68a136	123	m68k_set_cpu_type(M68K_CPU_TYPE_68000);\r
	124	m68k_init();\r
	125	m68k_set_int_ack_callback(SekIntAckM68K);\r
0af33fe0	126	m68k_set_tas_instr_callback(SekTasCallback);\r
9037e45d	127	//m68k_pulse_reset();\r
cc68a136	128	m68k_set_context(oldcontext);\r
	129	}\r
	130	#endif\r
70357ce5	131	#ifdef EMU_F68K\r
7669591e	132	memset(&PicoCpuFM68k, 0, sizeof(PicoCpuFM68k));\r
	133	fm68k_init();\r
	134	PicoCpuFM68k.iack_handler = SekIntAckF68K;\r
	135	PicoCpuFM68k.sr = 0x2704; // Z flag\r
70357ce5	136	#endif\r
cc68a136	137	}\r
cc68a136	138	\r
70357ce5	139	\r
cc68a136	140	// Reset the 68000:\r
2aa27095	141	PICO_INTERNAL int SekReset(void)\r
cc68a136	142	{\r
	143	if (Pico.rom==NULL) return 1;\r
	144	\r
	145	#ifdef EMU_C68K\r
5e89f0f5	146	CycloneReset(&PicoCpuCM68k);\r
cc68a136	147	#endif\r
cc68a136	148	#ifdef EMU_M68K\r
3aa1e148	149	m68k_set_context(&PicoCpuMM68k); // if we ever reset m68k, we always need it's context to be set\r
2d0b15bb	150	m68ki_cpu.sp[0]=0;\r
2d0b15bb	151	m68k_set_irq(0);\r
b837b69b	152	m68k_pulse_reset();\r
99464b62	153	REG_USP = 0; // ?\r
cc68a136	154	#endif\r
70357ce5	155	#ifdef EMU_F68K\r
12f23dac	156	fm68k_reset(&PicoCpuFM68k);\r
70357ce5	157	#endif\r
cc68a136	158	\r
	159	return 0;\r
	160	}\r
	161	\r
5f9a0d16	162	void SekStepM68k(void)\r
5f9a0d16	163	{\r
88fd63ad	164	Pico.t.m68c_aim = Pico.t.m68c_cnt + 1;\r
5f9a0d16	165	#if defined(EMU_CORE_DEBUG)\r
88fd63ad	166	Pico.t.m68c_cnt += CM_compareRun(1, 0);\r
5f9a0d16	167	#elif defined(EMU_C68K)\r
	168	PicoCpuCM68k.cycles=1;\r
	169	CycloneRun(&PicoCpuCM68k);\r
88fd63ad	170	Pico.t.m68c_cnt += 1 - PicoCpuCM68k.cycles;\r
5f9a0d16	171	#elif defined(EMU_M68K)\r
88fd63ad	172	Pico.t.m68c_cnt += m68k_execute(1);\r
5f9a0d16	173	#elif defined(EMU_F68K)\r
12f23dac	174	Pico.t.m68c_cnt += fm68k_emulate(&PicoCpuFM68k, 1, 0);\r
5f9a0d16	175	#endif\r
5f9a0d16	176	}\r
cc68a136	177	\r
eff55556	178	PICO_INTERNAL void SekSetRealTAS(int use_real)\r
2433f409	179	{\r
	180	#ifdef EMU_C68K\r
	181	CycloneSetRealTAS(use_real);\r
	182	#endif\r
70357ce5	183	#ifdef EMU_F68K\r
	184	// TODO\r
	185	#endif\r
2433f409	186	}\r
2433f409	187	\r
b4db550e	188	// Pack the cpu into a common format:\r
	189	// XXX: rename\r
	190	PICO_INTERNAL void SekPackCpu(unsigned char *cpu, int is_sub)\r
	191	{\r
b4db550e	192	#if defined(EMU_C68K)\r
	193	struct Cyclone *context = is_sub ? &PicoCpuCS68k : &PicoCpuCM68k;\r
	194	memcpy(cpu,context->d,0x40);\r
dfda3442	195	(u32 )(cpu+0x40)=context->pc-context->membase;\r
91ea9406	196	(u32 )(cpu+0x44)=CycloneGetSr(context);\r
91ea9406	197	(u32 )(cpu+0x48)=context->osp;\r
b4db550e	198	cpu[0x4c] = context->irq;\r
	199	cpu[0x4d] = context->state_flags & 1;\r
	200	#elif defined(EMU_M68K)\r
	201	void *oldcontext = m68ki_cpu_p;\r
	202	m68k_set_context(is_sub ? &PicoCpuMS68k : &PicoCpuMM68k);\r
	203	memcpy(cpu,m68ki_cpu_p->dar,0x40);\r
dfda3442	204	(u32 )(cpu+0x40)=m68ki_cpu_p->pc;\r
91ea9406	205	(u32 )(cpu+0x44)=m68k_get_reg(NULL, M68K_REG_SR);\r
91ea9406	206	(u32 )(cpu+0x48)=m68ki_cpu_p->sp[m68ki_cpu_p->s_flag^SFLAG_SET];\r
b4db550e	207	cpu[0x4c] = CPU_INT_LEVEL>>8;\r
	208	cpu[0x4d] = CPU_STOPPED;\r
	209	m68k_set_context(oldcontext);\r
	210	#elif defined(EMU_F68K)\r
	211	M68K_CONTEXT *context = is_sub ? &PicoCpuFS68k : &PicoCpuFM68k;\r
	212	memcpy(cpu,context->dreg,0x40);\r
dfda3442	213	(u32 )(cpu+0x40)=context->pc;\r
91ea9406	214	(u32 )(cpu+0x44)=context->sr;\r
91ea9406	215	(u32 )(cpu+0x48)=context->asp;\r
b4db550e	216	cpu[0x4c] = context->interrupts[0];\r
	217	cpu[0x4d] = (context->execinfo & FM68K_HALTED) ? 1 : 0;\r
	218	#endif\r
	219	\r
dfda3442	220	if (is_sub) {\r
	221	(u32 )(cpu+0x50) = SekCycleCntS68k;\r
	222	(s16 )(cpu+0x4e) = SekCycleCntS68k - SekCycleAimS68k;\r
	223	} else {\r
c5ecd7a0	224	(u32 )(cpu+0x50) = Pico.t.m68c_cnt + Pico.t.z80_buscycles +\r
c5ecd7a0	225	((Pico.t.refresh_delay + (1<<14)/2) >> 14);\r
df765ed9	226	(s16 )(cpu+0x4e) = Pico.t.m68c_cnt - Pico.t.m68c_aim;\r
dfda3442	227	}\r
b4db550e	228	}\r
	229	\r
	230	PICO_INTERNAL void SekUnpackCpu(const unsigned char *cpu, int is_sub)\r
	231	{\r
	232	#if defined(EMU_C68K)\r
	233	struct Cyclone *context = is_sub ? &PicoCpuCS68k : &PicoCpuCM68k;\r
91ea9406	234	CycloneSetSr(context, (u32 )(cpu+0x44));\r
91ea9406	235	context->osp=(u32 )(cpu+0x48);\r
b4db550e	236	memcpy(context->d,cpu,0x40);\r
b4db550e	237	context->membase = 0;\r
91ea9406	238	context->pc = (u32 )(cpu+0x40);\r
b4db550e	239	CycloneUnpack(context, NULL); // rebase PC\r
	240	context->irq = cpu[0x4c];\r
	241	context->state_flags = 0;\r
	242	if (cpu[0x4d])\r
	243	context->state_flags \|= 1;\r
	244	#elif defined(EMU_M68K)\r
	245	void *oldcontext = m68ki_cpu_p;\r
	246	m68k_set_context(is_sub ? &PicoCpuMS68k : &PicoCpuMM68k);\r
91ea9406	247	m68k_set_reg(M68K_REG_SR, (u32 )(cpu+0x44));\r
b4db550e	248	memcpy(m68ki_cpu_p->dar,cpu,0x40);\r
91ea9406	249	m68ki_cpu_p->pc=(u32 )(cpu+0x40);\r
91ea9406	250	m68ki_cpu_p->sp[m68ki_cpu_p->s_flag^SFLAG_SET]=(u32 )(cpu+0x48);\r
b4db550e	251	CPU_INT_LEVEL = cpu[0x4c] << 8;\r
	252	CPU_STOPPED = cpu[0x4d];\r
	253	m68k_set_context(oldcontext);\r
	254	#elif defined(EMU_F68K)\r
	255	M68K_CONTEXT *context = is_sub ? &PicoCpuFS68k : &PicoCpuFM68k;\r
	256	memcpy(context->dreg,cpu,0x40);\r
91ea9406	257	context->pc =(u32 )(cpu+0x40);\r
	258	context->sr =(u32 )(cpu+0x44);\r
	259	context->asp=(u32 )(cpu+0x48);\r
b4db550e	260	context->interrupts[0] = cpu[0x4c];\r
	261	context->execinfo &= ~FM68K_HALTED;\r
	262	if (cpu[0x4d]&1) context->execinfo \|= FM68K_HALTED;\r
	263	#endif\r
dfda3442	264	if (is_sub) {\r
91ea9406	265	SekCycleCntS68k = (u32 )(cpu+0x50);\r
dfda3442	266	SekCycleAimS68k = SekCycleCntS68k - (s16 )(cpu+0x4e);\r
dfda3442	267	} else {\r
91ea9406	268	Pico.t.m68c_cnt = (u32 )(cpu+0x50);\r
dfda3442	269	Pico.t.m68c_aim = Pico.t.m68c_cnt - (s16 )(cpu+0x4e);\r
c5ecd7a0	270	Pico.t.z80_buscycles = 0;\r
c5ecd7a0	271	Pico.t.refresh_delay = 0;\r
dfda3442	272	}\r
b4db550e	273	}\r
b4db550e	274	\r
5f9a0d16	275	\r
053fd9b4	276	/* idle loop detection, not to be used in CD mode */\r
053fd9b4	277	#ifdef EMU_C68K\r
f821bb70	278	#include <cpu/cyclone/tools/idle.h>\r
053fd9b4	279	#endif\r
053fd9b4	280	\r
488c0bbf	281	static unsigned short **idledet_ptrs = NULL;\r
053fd9b4	282	static int idledet_count = 0, idledet_bads = 0;\r
0219d379	283	static int idledet_start_frame = 0;\r
053fd9b4	284	\r
5ed2a20e	285	#if 0\r
	286	#define IDLE_STATS 1\r
	287	unsigned int idlehit_addrs[128], idlehit_counts[128];\r
	288	\r
	289	void SekRegisterIdleHit(unsigned int pc)\r
	290	{\r
	291	int i;\r
	292	for (i = 0; i < 127 && idlehit_addrs[i]; i++) {\r
	293	if (idlehit_addrs[i] == pc) {\r
	294	idlehit_counts[i]++;\r
	295	return;\r
	296	}\r
	297	}\r
	298	idlehit_addrs[i] = pc;\r
	299	idlehit_counts[i] = 1;\r
	300	idlehit_addrs[i+1] = 0;\r
	301	}\r
	302	#endif\r
	303	\r
053fd9b4	304	void SekInitIdleDet(void)\r
053fd9b4	305	{\r
053fd9b4	306	idledet_count = idledet_bads = 0;\r
053fd9b4	307	idledet_start_frame = Pico.m.frame_count + 360;\r
5ed2a20e	308	#ifdef IDLE_STATS\r
	309	idlehit_addrs[0] = 0;\r
	310	#endif\r
053fd9b4	311	\r
053fd9b4	312	#ifdef EMU_C68K\r
	313	CycloneInitIdle();\r
	314	#endif\r
c060a9ab	315	#ifdef EMU_F68K\r
12f23dac	316	fm68k_idle_install();\r
c060a9ab	317	#endif\r
053fd9b4	318	}\r
053fd9b4	319	\r
0219d379	320	int SekIsIdleReady(void)\r
	321	{\r
	322	return (Pico.m.frame_count >= idledet_start_frame);\r
	323	}\r
	324	\r
053fd9b4	325	int SekIsIdleCode(unsigned short *dst, int bytes)\r
053fd9b4	326	{\r
8187ba84	327	// printf("SekIsIdleCode %04x %i\n", *dst, bytes);\r
3244eb63	328	if (idledet_count >= 0) switch (bytes)\r
053fd9b4	329	{\r
5ed2a20e	330	case 2:\r
	331	if ((*dst & 0xf000) != 0x6000) // not another branch\r
	332	return 1;\r
	333	break;\r
053fd9b4	334	case 4:\r
0219d379	335	if ( (*dst & 0xff3f) == 0x4a38 \|\| // tst.x ($xxxx.w); tas ($xxxx.w)\r
	336	(*dst & 0xc1ff) == 0x0038 \|\| // move.x ($xxxx.w), dX\r
	337	(*dst & 0xf13f) == 0xb038) // cmp.x ($xxxx.w), dX\r
	338	return 1;\r
93f9619e	339	if (PicoIn.AHW & (PAHW_MCD\|PAHW_32X))\r
0219d379	340	break;\r
	341	// with no addons, there should be no need to wait\r
	342	// for byte change anywhere\r
	343	if ( (*dst & 0xfff8) == 0x4a10 \|\| // tst.b ($aX)\r
	344	(*dst & 0xfff8) == 0x4a28) // tst.b ($xxxx,a0)\r
053fd9b4	345	return 1;\r
	346	break;\r
	347	case 6:\r
b0677887	348	if ( ((dst[1] & 0xe0) == 0xe0 && ( // RAM and\r
	349	*dst == 0x4a39 \|\| // tst.b ($xxxxxxxx)\r
	350	*dst == 0x4a79 \|\| // tst.w ($xxxxxxxx)\r
	351	*dst == 0x4ab9 \|\| // tst.l ($xxxxxxxx)\r
	352	(*dst & 0xc1ff) == 0x0039 \|\| // move.x ($xxxxxxxx), dX\r
	353	(*dst & 0xf13f) == 0xb039))\|\|// cmp.x ($xxxxxxxx), dX\r
	354	*dst == 0x0838 \|\| // btst $X, ($xxxx.w) [6 byte op]\r
	355	(*dst & 0xffbf) == 0x0c38) // cmpi.{b,w} $X, ($xxxx.w)\r
053fd9b4	356	return 1;\r
	357	break;\r
	358	case 8:\r
b0677887	359	if ( ((dst[2] & 0xe0) == 0xe0 && ( // RAM and\r
	360	*dst == 0x0839 \|\| // btst $X, ($xxxxxxxx.w) [8 byte op]\r
	361	(*dst & 0xffbf) == 0x0c39))\|\|// cmpi.{b,w} $X, ($xxxxxxxx)\r
	362	*dst == 0x0cb8) // cmpi.l $X, ($xxxx.w)\r
053fd9b4	363	return 1;\r
	364	break;\r
	365	case 12:\r
93f9619e	366	if (PicoIn.AHW & (PAHW_MCD\|PAHW_32X))\r
0219d379	367	break;\r
0219d379	368	if ( (*dst & 0xf1f8) == 0x3010 && // move.w (aX), dX\r
b0677887	369	(dst[1]&0xf100) == 0x0000 && // arithmetic\r
b0677887	370	(dst[3]&0xf100) == 0x0000) // arithmetic\r
053fd9b4	371	return 1;\r
	372	break;\r
	373	}\r
	374	\r
	375	return 0;\r
	376	}\r
	377	\r
5ed2a20e	378	int SekRegisterIdlePatch(unsigned int pc, int oldop, int newop, void *ctx)\r
053fd9b4	379	{\r
5ed2a20e	380	int is_main68k = 1;\r
488c0bbf	381	u16 *target;\r
	382	uptr v;\r
	383	\r
5ed2a20e	384	#if defined(EMU_C68K)\r
	385	struct Cyclone *cyc = ctx;\r
	386	is_main68k = cyc == &PicoCpuCM68k;\r
	387	pc -= cyc->membase;\r
	388	#elif defined(EMU_F68K)\r
	389	is_main68k = ctx == &PicoCpuFM68k;\r
053fd9b4	390	#endif\r
053fd9b4	391	pc &= ~0xff000000;\r
0219d379	392	if (!(newop&0x200))\r
5ed2a20e	393	elprintf(EL_IDLE, "idle: patch %06x %04x %04x %c %c #%i", pc, oldop, newop,\r
	394	(newop&0x200)?'n':'y', is_main68k?'m':'s', idledet_count);\r
	395	\r
488c0bbf	396	// XXX: probably shouldn't patch RAM too\r
14ebd378	397	if (is_main68k)\r
	398	v = m68k_read16_map[pc >> M68K_MEM_SHIFT];\r
	399	else\r
	400	v = s68k_read16_map[pc >> M68K_MEM_SHIFT];\r
4c2b81a0	401	if (~v & ~((uptr)-1LL >> 1)) // MSB clear?\r
488c0bbf	402	target = (u16 *)((v << 1) + pc);\r
	403	else {\r
	404	if (++idledet_bads > 128)\r
	405	return 2; // remove detector\r
053fd9b4	406	return 1; // don't patch\r
	407	}\r
	408	\r
3244eb63	409	if (!idledet_ptrs \|\| (idledet_count & 0x1ff) == 0) {\r
8f80007b	410	unsigned short **tmp;\r
8f80007b	411	tmp = realloc(idledet_ptrs, (idledet_count+0x200) * sizeof(tmp[0]));\r
488c0bbf	412	if (tmp == NULL)\r
	413	return 1;\r
	414	idledet_ptrs = tmp;\r
053fd9b4	415	}\r
053fd9b4	416	\r
488c0bbf	417	idledet_ptrs[idledet_count++] = target;\r
b0677887	418	\r
053fd9b4	419	return 0;\r
	420	}\r
	421	\r
	422	void SekFinishIdleDet(void)\r
	423	{\r
2b15cea8	424	if (idledet_count < 0)\r
2b15cea8	425	return;\r
053fd9b4	426	#ifdef EMU_C68K\r
053fd9b4	427	CycloneFinishIdle();\r
c060a9ab	428	#endif\r
c060a9ab	429	#ifdef EMU_F68K\r
12f23dac	430	fm68k_idle_remove();\r
053fd9b4	431	#endif\r
	432	while (idledet_count > 0)\r
	433	{\r
488c0bbf	434	unsigned short *op = idledet_ptrs[--idledet_count];\r
053fd9b4	435	if ((*op & 0xfd00) == 0x7100)\r
	436	op &= 0xff, op \|= 0x6600;\r
	437	else if ((*op & 0xfd00) == 0x7500)\r
	438	op &= 0xff, op \|= 0x6700;\r
	439	else if ((*op & 0xfd00) == 0x7d00)\r
	440	op &= 0xff, op \|= 0x6000;\r
	441	else\r
	442	elprintf(EL_STATUS\|EL_IDLE, "idle: don't know how to restore %04x", *op);\r
	443	}\r
3244eb63	444	\r
2b15cea8	445	idledet_count = -1;\r
3244eb63	446	if (idledet_ptrs)\r
	447	free(idledet_ptrs);\r
	448	idledet_ptrs = NULL;\r
053fd9b4	449	}\r
	450	\r
	451	\r
12da51c2	452	#if defined(CPU_CMP_R) \|\| defined(CPU_CMP_W)\r
	453	#include "debug.h"\r
	454	\r
	455	struct ref_68k {\r
	456	u32 dar[16];\r
	457	u32 pc;\r
	458	u32 sr;\r
	459	u32 cycles;\r
	460	u32 pc_prev;\r
	461	};\r
	462	struct ref_68k ref_68ks[2];\r
	463	static int current_68k;\r
	464	\r
	465	void SekTrace(int is_s68k)\r
	466	{\r
	467	struct ref_68k *x68k = &ref_68ks[is_s68k];\r
	468	u32 pc = is_s68k ? SekPcS68k : SekPc;\r
	469	u32 sr = is_s68k ? SekSrS68k : SekSr;\r
88fd63ad	470	u32 cycles = is_s68k ? SekCycleCntS68k : Pico.t.m68c_cnt;\r
12da51c2	471	u32 r;\r
	472	u8 cmd;\r
	473	#ifdef CPU_CMP_W\r
	474	int i;\r
	475	\r
	476	if (is_s68k != current_68k) {\r
	477	current_68k = is_s68k;\r
	478	cmd = CTL_68K_SLAVE \| current_68k;\r
	479	tl_write(&cmd, sizeof(cmd));\r
	480	}\r
	481	if (pc != x68k->pc) {\r
	482	x68k->pc = pc;\r
	483	tl_write_uint(CTL_68K_PC, x68k->pc);\r
	484	}\r
	485	if (sr != x68k->sr) {\r
	486	x68k->sr = sr;\r
	487	tl_write_uint(CTL_68K_SR, x68k->sr);\r
	488	}\r
	489	for (i = 0; i < 16; i++) {\r
	490	r = is_s68k ? SekDarS68k(i) : SekDar(i);\r
	491	if (r != x68k->dar[i]) {\r
	492	x68k->dar[i] = r;\r
	493	tl_write_uint(CTL_68K_R + i, r);\r
	494	}\r
	495	}\r
	496	tl_write_uint(CTL_68K_CYCLES, cycles);\r
	497	#else\r
	498	int i, bad = 0;\r
	499	\r
	500	while (1)\r
	501	{\r
	502	int ret = tl_read(&cmd, sizeof(cmd));\r
	503	if (ret == 0) {\r
	504	elprintf(EL_STATUS, "EOF");\r
	505	exit(1);\r
	506	}\r
	507	switch (cmd) {\r
	508	case CTL_68K_SLAVE:\r
	509	case CTL_68K_SLAVE + 1:\r
	510	current_68k = cmd & 1;\r
	511	break;\r
	512	case CTL_68K_PC:\r
	513	tl_read_uint(&x68k->pc);\r
	514	break;\r
	515	case CTL_68K_SR:\r
	516	tl_read_uint(&x68k->sr);\r
	517	break;\r
	518	case CTL_68K_CYCLES:\r
	519	tl_read_uint(&x68k->cycles);\r
	520	goto breakloop;\r
	521	default:\r
	522	if (CTL_68K_R <= cmd && cmd < CTL_68K_R + 0x10)\r
	523	tl_read_uint(&x68k->dar[cmd - CTL_68K_R]);\r
	524	else\r
	525	elprintf(EL_STATUS, "invalid cmd: %02x", cmd);\r
	526	}\r
	527	}\r
	528	\r
	529	breakloop:\r
	530	if (is_s68k != current_68k) {\r
	531	printf("bad 68k: %d %d\n", is_s68k, current_68k);\r
	532	bad = 1;\r
	533	}\r
	534	if (cycles != x68k->cycles) {\r
535	printf("bad cycles: %u %u\n", cycles, x68k->cycles);\r
536	bad = 1;\r
537	}\r
538	if ((pc ^ x68k->pc) & 0xffffff) {\r
539	printf("bad PC: %08x %08x\n", pc, x68k->pc);\r
540	bad = 1;\r
541	}\r
542	if (sr != x68k->sr) {\r
543	printf("bad SR: %03x %03x\n", sr, x68k->sr);\r
544	bad = 1;\r
545	}\r
546	for (i = 0; i < 16; i++) {\r
547	r = is_s68k ? SekDarS68k(i) : SekDar(i);\r
548	if (r != x68k->dar[i]) {\r
549	printf("bad %c%d: %08x %08x\n", i < 8 ? 'D' : 'A', i & 7,\r
550	r, x68k->dar[i]);\r
551	bad = 1;\r
552	}\r
553	}\r
554	if (bad) {\r
555	for (i = 0; i < 8; i++)\r
556	printf("D%d: %08x A%d: %08x\n", i, x68k->dar[i],\r
557	i, x68k->dar[i + 8]);\r
558	printf("PC: %08x, %08x\n", x68k->pc, x68k->pc_prev);\r
a39743e3	559	printf("SR: %04x\n", x68k->sr);\r
12da51c2	560	\r
	561	PDebugDumpMem();\r
	562	exit(1);\r
	563	}\r
	564	x68k->pc_prev = x68k->pc;\r
	565	#endif\r
	566	}\r
	567	#endif // CPU_CMP_*\r
	568	\r
6cab49fd	569	#if defined(EMU_M68K) && M68K_INSTRUCTION_HOOK == OPT_SPECIFY_HANDLER\r
	570	static unsigned char op_flags[0x400000/2] = { 0, };\r
	571	static int atexit_set = 0;\r
	572	\r
	573	static void make_idc(void)\r
	574	{\r
	575	FILE *f = fopen("idc.idc", "w");\r
	576	int i;\r
	577	if (!f) return;\r
	578	fprintf(f, "#include <idc.idc>\nstatic main() {\n");\r
	579	for (i = 0; i < 0x400000/2; i++)\r
	580	if (op_flags[i] != 0)\r
	581	fprintf(f, " MakeCode(0x%06x);\n", i*2);\r
	582	fprintf(f, "}\n");\r
	583	fclose(f);\r
	584	}\r
	585	\r
	586	void instruction_hook(void)\r
	587	{\r
	588	if (!atexit_set) {\r
	589	atexit(make_idc);\r
	590	atexit_set = 1;\r
	591	}\r
	592	if (REG_PC < 0x400000)\r
	593	op_flags[REG_PC/2] = 1;\r
	594	}\r
	595	#endif\r
12da51c2	596	\r
12da51c2	597	// vim:shiftwidth=2:ts=2:expandtab\r