eliminate event code duplication
[pcsx_rearmed.git] / libpcsxcore / r3000a.c
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1/***************************************************************************
2 * Copyright (C) 2007 Ryan Schultz, PCSX-df Team, PCSX team *
3 * *
4 * This program is free software; you can redistribute it and/or modify *
5 * it under the terms of the GNU General Public License as published by *
6 * the Free Software Foundation; either version 2 of the License, or *
7 * (at your option) any later version. *
8 * *
9 * This program is distributed in the hope that it will be useful, *
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
12 * GNU General Public License for more details. *
13 * *
14 * You should have received a copy of the GNU General Public License *
15 * along with this program; if not, write to the *
16 * Free Software Foundation, Inc., *
17 * 51 Franklin Street, Fifth Floor, Boston, MA 02111-1307 USA. *
18 ***************************************************************************/
19
20/*
21* R3000A CPU functions.
22*/
23
24#include "r3000a.h"
25#include "cdrom.h"
26#include "mdec.h"
27#include "gte.h"
61ad2a61 28#include "psxinterpreter.h"
de74f599 29#include "psxbios.h"
9a0a61d2 30#include "psxevents.h"
905b7c25 31#include "../include/compiler_features.h"
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32
33R3000Acpu *psxCpu = NULL;
41e82ad4 34#ifdef DRC_DISABLE
ef79bbde 35psxRegisters psxRegs;
41e82ad4 36#endif
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37
38int psxInit() {
7a8d521f 39 SysPrintf(_("Running PCSX Version %s (%s).\n"), PCSX_VERSION, __DATE__);
ef79bbde 40
41e82ad4 41#ifndef DRC_DISABLE
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42 if (Config.Cpu == CPU_INTERPRETER) {
43 psxCpu = &psxInt;
44 } else psxCpu = &psxRec;
45#else
61ad2a61 46 Config.Cpu = CPU_INTERPRETER;
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47 psxCpu = &psxInt;
48#endif
49
50 Log = 0;
51
52 if (psxMemInit() == -1) return -1;
53
54 return psxCpu->Init();
55}
56
57void psxReset() {
14b3bd95 58 boolean introBypassed = FALSE;
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59 psxMemReset();
60
61 memset(&psxRegs, 0, sizeof(psxRegs));
62
63 psxRegs.pc = 0xbfc00000; // Start in bootstrap
64
bc7c5acb 65 psxRegs.CP0.n.SR = 0x10600000; // COP0 enabled | BEV = 1 | TS = 1
66 psxRegs.CP0.n.PRid = 0x00000002; // PRevID = Revision ID, same as R3000A
7650b754 67 if (Config.HLE) {
68 psxRegs.CP0.n.SR |= 1u << 30; // COP2 enabled
69 psxRegs.CP0.n.SR &= ~(1u << 22); // RAM exception vector
70 }
ef79bbde 71
d5aeda23 72 psxCpu->ApplyConfig();
c24732c0 73 psxCpu->Reset();
74
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75 psxHwReset();
76 psxBiosInit();
77
7b75929b 78 if (!Config.HLE) {
ef79bbde 79 psxExecuteBios();
14b3bd95 80 if (psxRegs.pc == 0x80030000 && !Config.SlowBoot) {
7b75929b 81 BiosBootBypass();
14b3bd95 82 introBypassed = TRUE;
83 }
7b75929b 84 }
14b3bd95 85 if (Config.HLE || introBypassed)
86 psxBiosSetupBootState();
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87
88#ifdef EMU_LOG
89 EMU_LOG("*BIOS END*\n");
90#endif
91 Log = 0;
92}
93
94void psxShutdown() {
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95 psxBiosShutdown();
96
97 psxCpu->Shutdown();
7a8d521f 98
99 psxMemShutdown();
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100}
101
6d75addf 102// cp0 is passed separately for lightrec to be less messy
bc7c5acb 103void psxException(u32 cause, enum R3000Abdt bdt, psxCP0Regs *cp0) {
905b7c25 104 u32 opcode = intFakeFetch(psxRegs.pc);
943a507a 105
3d1c03e7 106 if (unlikely(!Config.HLE && (opcode >> 25) == 0x25)) {
665e364a 107 // "hokuto no ken" / "Crash Bandicot 2" ...
108 // BIOS does not allow to return to GTE instructions
109 // (just skips it, supposedly because it's scheduled already)
62656449 110 // so we execute it here
bc7c5acb 111 psxCP2Regs *cp2 = (psxCP2Regs *)(cp0 + 1);
905b7c25 112 psxRegs.code = opcode;
113 psxCP2[opcode & 0x3f](cp2);
665e364a 114 }
115
ef79bbde 116 // Set the Cause
0b1da491 117 cp0->n.Cause = (bdt << 30) | (cp0->n.Cause & 0x700) | cause;
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118
119 // Set the EPC & PC
bc7c5acb 120 cp0->n.EPC = bdt ? psxRegs.pc - 4 : psxRegs.pc;
ef79bbde 121
bc7c5acb 122 if (cp0->n.SR & 0x400000)
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123 psxRegs.pc = 0xbfc00180;
124 else
125 psxRegs.pc = 0x80000080;
126
bc7c5acb 127 // Set the SR
128 cp0->n.SR = (cp0->n.SR & ~0x3f) | ((cp0->n.SR & 0x0f) << 2);
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129}
130
131void psxBranchTest() {
132 if ((psxRegs.cycle - psxNextsCounter) >= psxNextCounter)
133 psxRcntUpdate();
134
9a0a61d2 135 irq_test(&psxRegs.CP0);
ef79bbde 136
9a0a61d2 137 if (unlikely(psxRegs.pc == psxRegs.biosBranchCheck))
de74f599 138 psxBiosCheckBranch();
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139}
140
141void psxJumpTest() {
142 if (!Config.HLE && Config.PsxOut) {
143 u32 call = psxRegs.GPR.n.t1 & 0xff;
144 switch (psxRegs.pc & 0x1fffff) {
145 case 0xa0:
146#ifdef PSXBIOS_LOG
147 if (call != 0x28 && call != 0xe) {
148 PSXBIOS_LOG("Bios call a0: %s (%x) %x,%x,%x,%x\n", biosA0n[call], call, psxRegs.GPR.n.a0, psxRegs.GPR.n.a1, psxRegs.GPR.n.a2, psxRegs.GPR.n.a3); }
149#endif
150 if (biosA0[call])
151 biosA0[call]();
152 break;
153 case 0xb0:
154#ifdef PSXBIOS_LOG
155 if (call != 0x17 && call != 0xb) {
156 PSXBIOS_LOG("Bios call b0: %s (%x) %x,%x,%x,%x\n", biosB0n[call], call, psxRegs.GPR.n.a0, psxRegs.GPR.n.a1, psxRegs.GPR.n.a2, psxRegs.GPR.n.a3); }
157#endif
158 if (biosB0[call])
159 biosB0[call]();
160 break;
161 case 0xc0:
162#ifdef PSXBIOS_LOG
163 PSXBIOS_LOG("Bios call c0: %s (%x) %x,%x,%x,%x\n", biosC0n[call], call, psxRegs.GPR.n.a0, psxRegs.GPR.n.a1, psxRegs.GPR.n.a2, psxRegs.GPR.n.a3);
164#endif
165 if (biosC0[call])
166 biosC0[call]();
167 break;
168 }
169 }
170}
171
172void psxExecuteBios() {
7b75929b 173 int i;
da65071f 174 for (i = 0; i < 5000000; i++) {
175 psxCpu->ExecuteBlock(EXEC_CALLER_BOOT);
176 if ((psxRegs.pc & 0xff800000) == 0x80000000)
177 break;
178 }
179 if (psxRegs.pc != 0x80030000)
180 SysPrintf("non-standard BIOS detected (%d, %08x)\n", i, psxRegs.pc);
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181}
182
11d23573 183// irq10 stuff, very preliminary
184static int irq10count;
185
186static void psxScheduleIrq10One(u32 cycles_abs) {
187 // schedule relative to frame start
188 u32 c = cycles_abs - rcnts[3].cycleStart;
189 assert((s32)c >= 0);
190 psxRegs.interrupt |= 1 << PSXINT_IRQ10;
191 psxRegs.intCycle[PSXINT_IRQ10].cycle = c;
192 psxRegs.intCycle[PSXINT_IRQ10].sCycle = rcnts[3].cycleStart;
9a0a61d2 193 set_event_raw_abs(PSXINT_IRQ10, cycles_abs);
11d23573 194}
195
196void irq10Interrupt() {
197 u32 prevc = psxRegs.intCycle[PSXINT_IRQ10].sCycle
198 + psxRegs.intCycle[PSXINT_IRQ10].cycle;
199
200 psxHu32ref(0x1070) |= SWAPu32(0x400);
201
202#if 0
203 s32 framec = psxRegs.cycle - rcnts[3].cycleStart;
204 printf("%d:%03d irq10 #%d %3d m=%d,%d\n", frame_counter,
205 (s32)((float)framec / (PSXCLK / 60 / 263.0f)),
206 irq10count, psxRegs.cycle - prevc,
207 (psxRegs.CP0.n.SR & 0x401) != 0x401, !(psxHu32(0x1074) & 0x400));
208#endif
1351a8fb 209 if (--irq10count > 0) {
210 u32 cycles_per_line = Config.PsxType
211 ? PSXCLK / 50 / 314 : PSXCLK / 60 / 263;
212 psxScheduleIrq10One(prevc + cycles_per_line);
213 }
11d23573 214}
215
216void psxScheduleIrq10(int irq_count, int x_cycles, int y) {
217 //printf("%s %d, %d, %d\n", __func__, irq_count, x_cycles, y);
218 u32 cycles_per_frame = Config.PsxType ? PSXCLK / 50 : PSXCLK / 60;
219 u32 cycles = rcnts[3].cycleStart + cycles_per_frame;
220 cycles += y * cycles_per_frame / (Config.PsxType ? 314 : 263);
221 cycles += x_cycles;
222 psxScheduleIrq10One(cycles);
223 irq10count = irq_count;
224}