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bugfixes in cd/Memory.s, poll loop detection
[picodrive.git] / Pico / PicoInt.h
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cc68a136 1// Pico Library - Header File\r
2\r
3// (c) Copyright 2004 Dave, All rights reserved.\r
4// (c) Copyright 2006 notaz, All rights reserved.\r
5// Free for non-commercial use.\r
6\r
7// For commercial use, separate licencing terms must be obtained.\r
8\r
9\r
10#include <stdio.h>\r
11#include <stdlib.h>\r
12#include <string.h>\r
13#include "Pico.h"\r
14\r
15\r
ab0607f7 16// to select core, define EMU_C68K, EMU_M68K or EMU_A68K in your makefile or project\r
cc68a136 17\r
18#ifdef __cplusplus\r
19extern "C" {\r
20#endif\r
21\r
22\r
23// ----------------------- 68000 CPU -----------------------\r
24#ifdef EMU_C68K\r
25#include "../cpu/Cyclone/Cyclone.h"\r
b837b69b 26extern struct Cyclone PicoCpu, PicoCpuS68k;\r
7336a99a 27#define SekCyclesLeftNoMCD PicoCpu.cycles // cycles left for this run\r
28#define SekCyclesLeft \\r
29 (((PicoMCD&1) && (PicoOpt & 0x2000)) ? (SekCycleAim-SekCycleCnt) : SekCyclesLeftNoMCD)\r
7a1f6e45 30#define SekCyclesLeftS68k \\r
31 ((PicoOpt & 0x2000) ? (SekCycleAimS68k-SekCycleCntS68k) : PicoCpuS68k.cycles)\r
7336a99a 32#define SekSetCyclesLeftNoMCD(c) PicoCpu.cycles=c\r
33#define SekSetCyclesLeft(c) { \\r
34 if ((PicoMCD&1) && (PicoOpt & 0x2000)) SekCycleCnt=SekCycleAim-(c); else SekSetCyclesLeftNoMCD(c); \\r
35}\r
cc68a136 36#define SekPc (PicoCpu.pc-PicoCpu.membase)\r
b837b69b 37#define SekPcS68k (PicoCpuS68k.pc-PicoCpuS68k.membase)\r
7a1f6e45 38#define SekSetStop(x) { PicoCpu.stopped=x; if (x) PicoCpu.cycles=0; }\r
39#define SekSetStopS68k(x) { PicoCpuS68k.stopped=x; if (x) PicoCpuS68k.cycles=0; }\r
cc68a136 40#endif\r
41\r
42#ifdef EMU_A68K\r
43void __cdecl M68000_RUN();\r
44// The format of the data in a68k.asm (at the _M68000_regs location)\r
45struct A68KContext\r
46{\r
47 unsigned int d[8],a[8];\r
48 unsigned int isp,srh,ccr,xc,pc,irq,sr;\r
49 int (*IrqCallback) (int nIrq);\r
50 unsigned int ppc;\r
51 void *pResetCallback;\r
52 unsigned int sfc,dfc,usp,vbr;\r
53 unsigned int AsmBank,CpuVersion;\r
54};\r
55struct A68KContext M68000_regs;\r
56extern int m68k_ICount;\r
57#define SekCyclesLeft m68k_ICount\r
58#define SekSetCyclesLeft(c) m68k_ICount=c\r
59#define SekPc M68000_regs.pc\r
60#endif\r
61\r
62#ifdef EMU_M68K\r
63#include "../cpu/musashi/m68kcpu.h"\r
64extern m68ki_cpu_core PicoM68kCPU; // MD's CPU\r
65extern m68ki_cpu_core PicoS68kCPU; // Mega CD's CPU\r
66#ifndef SekCyclesLeft\r
7a1f6e45 67#define SekCyclesLeftNoMCD PicoM68kCPU.cyc_remaining_cycles\r
7336a99a 68#define SekCyclesLeft \\r
69 (((PicoMCD&1) && (PicoOpt & 0x2000)) ? (SekCycleAim-SekCycleCnt) : SekCyclesLeftNoMCD)\r
7a1f6e45 70#define SekCyclesLeftS68k \\r
71 ((PicoOpt & 0x2000) ? (SekCycleAimS68k-SekCycleCntS68k) : PicoS68kCPU.cyc_remaining_cycles)\r
7336a99a 72#define SekSetCyclesLeftNoMCD(c) SET_CYCLES(c)\r
73#define SekSetCyclesLeft(c) { \\r
74 if ((PicoMCD&1) && (PicoOpt & 0x2000)) SekCycleCnt=SekCycleAim-(c); else SET_CYCLES(c); \\r
75}\r
cc68a136 76#define SekPc m68k_get_reg(&PicoM68kCPU, M68K_REG_PC)\r
77#define SekPcS68k m68k_get_reg(&PicoS68kCPU, M68K_REG_PC)\r
7a1f6e45 78#define SekSetStop(x) { \\r
79 if(x) { SET_CYCLES(0); PicoM68kCPU.stopped=STOP_LEVEL_STOP; } \\r
80 else PicoM68kCPU.stopped=0; \\r
81}\r
82#define SekSetStopS68k(x) { \\r
83 if(x) { SET_CYCLES(0); PicoS68kCPU.stopped=STOP_LEVEL_STOP; } \\r
84 else PicoS68kCPU.stopped=0; \\r
85}\r
cc68a136 86#endif\r
87#endif\r
88\r
89extern int SekCycleCnt; // cycles done in this frame\r
90extern int SekCycleAim; // cycle aim\r
91extern unsigned int SekCycleCntT; // total cycle counter, updated once per frame\r
92\r
93#define SekCyclesReset() {SekCycleCntT+=SekCycleCnt;SekCycleCnt=SekCycleAim=0;}\r
94#define SekCyclesBurn(c) SekCycleCnt+=c\r
95#define SekCyclesDone() (SekCycleAim-SekCyclesLeft) // nuber of cycles done in this frame (can be checked anywhere)\r
96#define SekCyclesDoneT() (SekCycleCntT+SekCyclesDone()) // total nuber of cycles done for this rom\r
97\r
98#define SekEndRun(after) { \\r
99 SekCycleCnt -= SekCyclesLeft - after; \\r
100 if(SekCycleCnt < 0) SekCycleCnt = 0; \\r
101 SekSetCyclesLeft(after); \\r
102}\r
103\r
104extern int SekCycleCntS68k;\r
105extern int SekCycleAimS68k;\r
106\r
107#define SekCyclesResetS68k() {SekCycleCntS68k=SekCycleAimS68k=0;}\r
7a1f6e45 108#define SekCyclesDoneS68k() (SekCycleAimS68k-SekCyclesLeftS68k)\r
cc68a136 109\r
110// does not work as expected\r
111//extern int z80ExtraCycles; // extra z80 cycles, used when z80 is [en|dis]abled\r
112\r
113extern int PicoMCD;\r
114\r
115// ---------------------------------------------------------\r
116\r
117// main oscillator clock which controls timing\r
118#define OSC_NTSC 53693100\r
119#define OSC_PAL 53203424 // not accurate\r
120\r
121struct PicoVideo\r
122{\r
123 unsigned char reg[0x20];\r
124 unsigned int command; // 32-bit Command\r
125 unsigned char pending; // 1 if waiting for second half of 32-bit command\r
126 unsigned char type; // Command type (v/c/vsram read/write)\r
127 unsigned short addr; // Read/Write address\r
128 int status; // Status bits\r
129 unsigned char pending_ints; // pending interrupts: ??VH????\r
130 unsigned char pad[0x13];\r
131};\r
132\r
133struct PicoMisc\r
134{\r
135 unsigned char rotate;\r
136 unsigned char z80Run;\r
137 unsigned char padTHPhase[2]; // phase of gamepad TH switches\r
138 short scanline; // 0 to 261||311; -1 in fast mode\r
139 char dirtyPal; // Is the palette dirty (1 - change @ this frame, 2 - some time before)\r
140 unsigned char hardware; // Hardware value for country\r
141 unsigned char pal; // 1=PAL 0=NTSC\r
142 unsigned char sram_reg; // SRAM mode register. bit0: allow read? bit1: deny write? bit2: EEPROM?\r
143 unsigned short z80_bank68k;\r
144 unsigned short z80_lastaddr; // this is for Z80 faking\r
145 unsigned char z80_fakeval;\r
146 unsigned char pad0;\r
147 unsigned char padDelay[2]; // gamepad phase time outs, so we count a delay\r
148 unsigned short sram_addr; // EEPROM address register\r
149 unsigned char sram_cycle; // EEPROM SRAM cycle number\r
150 unsigned char sram_slave; // EEPROM slave word for X24C02 and better SRAMs\r
151 unsigned char prot_bytes[2]; // simple protection fakeing\r
4f672280 152 unsigned short dma_bytes; //\r
312e9ce1 153 unsigned char pad[2];\r
154 unsigned int frame_count; // mainly for movies\r
cc68a136 155};\r
156\r
157// some assembly stuff depend on these, do not touch!\r
158struct Pico\r
159{\r
160 unsigned char ram[0x10000]; // 0x00000 scratch ram\r
161 unsigned short vram[0x8000]; // 0x10000\r
162 unsigned char zram[0x2000]; // 0x20000 Z80 ram\r
163 unsigned char ioports[0x10];\r
164 unsigned int pad[0x3c]; // unused\r
165 unsigned short cram[0x40]; // 0x22100\r
166 unsigned short vsram[0x40]; // 0x22180\r
167\r
168 unsigned char *rom; // 0x22200\r
169 unsigned int romsize; // 0x22204\r
170\r
171 struct PicoMisc m;\r
172 struct PicoVideo video;\r
173};\r
174\r
175// sram\r
176struct PicoSRAM\r
177{\r
4ff2d527 178 unsigned char *data; // actual data\r
179 unsigned int start; // start address in 68k address space\r
cc68a136 180 unsigned int end;\r
4ff2d527 181 unsigned char resize; // 0c: 1=SRAM size changed and needs to be reallocated on PicoReset\r
182 unsigned char reg_back; // copy of Pico.m.sram_reg to set after reset\r
cc68a136 183 unsigned char changed;\r
184 unsigned char pad;\r
185};\r
186\r
187// MCD\r
188#include "cd/cd_sys.h"\r
189#include "cd/LC89510.h"\r
d1df8786 190#include "cd/gfx_cd.h"\r
cc68a136 191\r
4f265db7 192struct mcd_pcm\r
193{\r
194 unsigned char control; // reg7\r
195 unsigned char enabled; // reg8\r
196 unsigned char cur_ch;\r
197 unsigned char bank;\r
198 int pad1;\r
199\r
4ff2d527 200 struct pcm_chan // 08, size 0x10\r
4f265db7 201 {\r
202 unsigned char regs[8];\r
4ff2d527 203 unsigned int addr; // .08: played sample address\r
4f265db7 204 int pad;\r
205 } ch[8];\r
206};\r
207\r
c459aefd 208struct mcd_misc\r
209{\r
210 unsigned short hint_vector;\r
211 unsigned char busreq;\r
51a902ae 212 unsigned char s68k_pend_ints;\r
4ff2d527 213 unsigned int state_flags; // 04: emu state: reset_pending,\r
51a902ae 214 unsigned int counter75hz;\r
4ff2d527 215 unsigned short audio_offset; // 0c: for savestates: play pointer offset (0-1023)\r
75736070 216 unsigned char audio_track; // playing audio track # (zero based)\r
217 char pad1;\r
4ff2d527 218 int timer_int3; // 10\r
4f265db7 219 unsigned int timer_stopwatch;\r
220 int pad[10];\r
c459aefd 221};\r
222\r
cc68a136 223typedef struct\r
224{\r
4ff2d527 225 unsigned char bios[0x20000]; // 000000: 128K\r
226 union { // 020000: 512K\r
fa1e5e29 227 unsigned char prg_ram[0x80000];\r
cc68a136 228 unsigned char prg_ram_b[4][0x20000];\r
229 };\r
4ff2d527 230 union { // 0a0000: 256K\r
fa1e5e29 231 struct {\r
232 unsigned char word_ram2M[0x40000];\r
233 unsigned char unused[0x20000];\r
234 };\r
235 struct {\r
236 unsigned char unused[0x20000];\r
237 unsigned char word_ram1M[2][0x20000];\r
238 };\r
239 };\r
4ff2d527 240 union { // 100000: 64K\r
fa1e5e29 241 unsigned char pcm_ram[0x10000];\r
4f265db7 242 unsigned char pcm_ram_b[0x10][0x1000];\r
243 };\r
4ff2d527 244 unsigned char s68k_regs[0x200]; // 110000: GA, not CPU regs\r
245 unsigned char bram[0x2000]; // 110200: 8K\r
246 struct mcd_misc m; // 112200: misc\r
247 struct mcd_pcm pcm; // 112240:\r
75736070 248 _scd_toc TOC; // not to be saved\r
cc68a136 249 CDD cdd;\r
250 CDC cdc;\r
251 _scd scd;\r
d1df8786 252 Rot_Comp rot_comp;\r
cc68a136 253} mcd_state;\r
254\r
255#define Pico_mcd ((mcd_state *)Pico.rom)\r
256\r
51a902ae 257// Area.c\r
258int PicoAreaPackCpu(unsigned char *cpu, int is_sub);\r
259int PicoAreaUnpackCpu(unsigned char *cpu, int is_sub);\r
260\r
261// cd/Area.c\r
262int PicoCdSaveState(void *file);\r
263int PicoCdLoadState(void *file);\r
860c6322 264int PicoCdLoadStateGfx(void *file);\r
cc68a136 265\r
266// Draw.c\r
267int PicoLine(int scan);\r
268void PicoFrameStart();\r
269\r
270// Draw2.c\r
271void PicoFrameFull();\r
272\r
273// Memory.c\r
274int PicoInitPc(unsigned int pc);\r
275unsigned int CPU_CALL PicoRead32(unsigned int a);\r
b837b69b 276void PicoMemSetup();\r
cc68a136 277void PicoMemReset();\r
b837b69b 278//void PicoDasm(int start,int len);\r
cc68a136 279unsigned char z80_read(unsigned short a);\r
280unsigned short z80_read16(unsigned short a);\r
281void z80_write(unsigned char data, unsigned short a);\r
282void z80_write16(unsigned short data, unsigned short a);\r
283\r
284// cd/Memory.c\r
83bd0b76 285void PicoMemSetupCD(void);\r
4ff2d527 286void PicoMemResetCD(int r3);\r
48e8482f 287void PicoMemResetCDdecode(int r3);\r
cc68a136 288unsigned char PicoReadCD8 (unsigned int a);\r
289unsigned short PicoReadCD16(unsigned int a);\r
290unsigned int PicoReadCD32(unsigned int a);\r
291void PicoWriteCD8 (unsigned int a, unsigned char d);\r
292void PicoWriteCD16(unsigned int a, unsigned short d);\r
293void PicoWriteCD32(unsigned int a, unsigned int d);\r
294\r
295// Pico.c\r
296extern struct Pico Pico;\r
297extern struct PicoSRAM SRam;\r
298extern int emustatus;\r
312e9ce1 299int CheckDMA(void);\r
cc68a136 300\r
301// cd/Pico.c\r
302int PicoInitMCD(void);\r
303void PicoExitMCD(void);\r
304int PicoResetMCD(int hard);\r
305\r
306// Sek.c\r
307int SekInit(void);\r
308int SekReset(void);\r
309int SekInterrupt(int irq);\r
310void SekState(unsigned char *data);\r
311\r
312// cd/Sek.c\r
313int SekInitS68k(void);\r
314int SekResetS68k(void);\r
315int SekInterruptS68k(int irq);\r
316\r
7a93adeb 317// sound/sound.c\r
318extern int PsndLen_exc_cnt;\r
319extern int PsndLen_exc_add;\r
320\r
cc68a136 321// VideoPort.c\r
322void PicoVideoWrite(unsigned int a,unsigned short d);\r
323unsigned int PicoVideoRead(unsigned int a);\r
324\r
325// Misc.c\r
326void SRAMWriteEEPROM(unsigned int d);\r
327unsigned int SRAMReadEEPROM();\r
328void SRAMUpdPending(unsigned int a, unsigned int d);\r
cea65903 329void memcpy16(unsigned short *dest, unsigned short *src, int count);\r
0a051f55 330void memcpy16bswap(unsigned short *dest, void *src, int count);\r
cea65903 331void memcpy32(int *dest, int *src, int count);\r
332void memset32(int *dest, int c, int count);\r
cc68a136 333\r
fa1e5e29 334// cd/Misc.c\r
335void wram_2M_to_1M(unsigned char *m);\r
336void wram_1M_to_2M(unsigned char *m);\r
337\r
cc68a136 338\r
339#ifdef __cplusplus\r
340} // End of extern "C"\r
341#endif\r
fast MegaDrive/MegaCD/32X emulator