remove unused/unmaintained code
[picodrive.git] / pico / cd / pico.c
CommitLineData
672ad671 1// (c) Copyright 2007 notaz, All rights reserved.
cc68a136 2
3
efcba75f 4#include "../pico_int.h"
43e6eaad 5#include "../sound/ym2612.h"
cc68a136 6
76276b0b 7extern unsigned char formatted_bram[4*0x10];
89fa852d 8extern unsigned int s68k_poll_adclk;
9
721cd396 10void (*PicoMCDopenTray)(void) = NULL;
d687ef50 11void (*PicoMCDcloseTray)(void) = NULL;
89fa852d 12
cc68a136 13
2aa27095 14PICO_INTERNAL void PicoInitMCD(void)
cc68a136 15{
16 SekInitS68k();
17 Init_CD_Driver();
cc68a136 18}
19
eff55556 20PICO_INTERNAL void PicoExitMCD(void)
cc68a136 21{
22 End_CD_Driver();
23}
24
1cb1584b 25PICO_INTERNAL void PicoPowerMCD(void)
26{
27 int fmt_size = sizeof(formatted_bram);
28 memset(Pico_mcd->prg_ram, 0, sizeof(Pico_mcd->prg_ram));
29 memset(Pico_mcd->word_ram2M, 0, sizeof(Pico_mcd->word_ram2M));
30 memset(Pico_mcd->pcm_ram, 0, sizeof(Pico_mcd->pcm_ram));
31 memset(Pico_mcd->bram, 0, sizeof(Pico_mcd->bram));
32 memcpy(Pico_mcd->bram + sizeof(Pico_mcd->bram) - fmt_size, formatted_bram, fmt_size);
33}
34
35PICO_INTERNAL int PicoResetMCD(void)
cc68a136 36{
51a902ae 37 memset(Pico_mcd->s68k_regs, 0, sizeof(Pico_mcd->s68k_regs));
4f265db7 38 memset(&Pico_mcd->pcm, 0, sizeof(Pico_mcd->pcm));
5c69a605 39 memset(&Pico_mcd->m, 0, sizeof(Pico_mcd->m));
51a902ae 40
d1df8786 41 *(unsigned int *)(Pico_mcd->bios + 0x70) = 0xffffffff; // reset hint vector (simplest way to implement reg6)
c008977e 42 Pico_mcd->m.state_flags |= 1; // s68k reset pending
672ad671 43 Pico_mcd->s68k_regs[3] = 1; // 2M word RAM mode with m68k access after reset
cc68a136 44
cc68a136 45 Reset_CD();
5c69a605 46 LC89510_Reset();
51a902ae 47 gfx_cd_reset();
3aa1e148 48#ifdef _ASM_CD_MEMORY_C
00bd648e 49 //PicoMemResetCDdecode(1); // don't have to call this in 2M mode
4ff2d527 50#endif
cc68a136 51
6cadc2da 52 // use SRam.data for RAM cart
af37bca8 53 if (PicoOpt & POPT_EN_MCD_RAMCART) {
d6114368 54 if (SRam.data == NULL)
55 SRam.data = calloc(1, 0x12000);
56 }
57 else if (SRam.data != NULL) {
58 free(SRam.data);
59 SRam.data = NULL;
60 }
b542be46 61 SRam.start = SRam.end = 0; // unused
6cadc2da 62
cc68a136 63 return 0;
64}
65
eff55556 66static __inline void SekRunM68k(int cyc)
cc68a136 67{
68 int cyc_do;
f6c49d38 69
70 pprof_start(m68k);
71
cc68a136 72 SekCycleAim+=cyc;
3ec29f01 73 if ((cyc_do=SekCycleAim-SekCycleCnt) <= 0) return;
b5e5172d 74#if defined(EMU_CORE_DEBUG)
75 SekCycleCnt+=CM_compareRun(cyc_do, 0);
76#elif defined(EMU_C68K)
3aa1e148 77 PicoCpuCM68k.cycles=cyc_do;
78 CycloneRun(&PicoCpuCM68k);
79 SekCycleCnt+=cyc_do-PicoCpuCM68k.cycles;
b837b69b 80#elif defined(EMU_M68K)
3aa1e148 81 m68k_set_context(&PicoCpuMM68k);
cc68a136 82 SekCycleCnt+=m68k_execute(cyc_do);
3aa1e148 83#elif defined(EMU_F68K)
84 g_m68kcontext=&PicoCpuFM68k;
c060a9ab 85 SekCycleCnt+=fm68k_emulate(cyc_do, 0, 0);
cc68a136 86#endif
f6c49d38 87 pprof_end(m68k);
cc68a136 88}
89
90static __inline void SekRunS68k(int cyc)
91{
92 int cyc_do;
93 SekCycleAimS68k+=cyc;
3ec29f01 94 if ((cyc_do=SekCycleAimS68k-SekCycleCntS68k) <= 0) return;
b5e5172d 95#if defined(EMU_CORE_DEBUG)
96 SekCycleCntS68k+=CM_compareRun(cyc_do, 1);
97#elif defined(EMU_C68K)
3aa1e148 98 PicoCpuCS68k.cycles=cyc_do;
99 CycloneRun(&PicoCpuCS68k);
100 SekCycleCntS68k+=cyc_do-PicoCpuCS68k.cycles;
b837b69b 101#elif defined(EMU_M68K)
3aa1e148 102 m68k_set_context(&PicoCpuMS68k);
cc68a136 103 SekCycleCntS68k+=m68k_execute(cyc_do);
3aa1e148 104#elif defined(EMU_F68K)
105 g_m68kcontext=&PicoCpuFS68k;
c060a9ab 106 SekCycleCntS68k+=fm68k_emulate(cyc_do, 0, 0);
cc68a136 107#endif
108}
109
7336a99a 110#define PS_STEP_M68K ((488<<16)/20) // ~24
111//#define PS_STEP_S68K 13
68cba51e 112
8022f53d 113#if defined(_ASM_CD_PICO_C)
114extern void SekRunPS(int cyc_m68k, int cyc_s68k);
115#elif defined(EMU_F68K)
116static __inline void SekRunPS(int cyc_m68k, int cyc_s68k)
117{
118 SekCycleAim+=cyc_m68k;
119 SekCycleAimS68k+=cyc_s68k;
c060a9ab 120 fm68k_emulate(0, 1, 0);
8022f53d 121}
a4030801 122#else
68cba51e 123static __inline void SekRunPS(int cyc_m68k, int cyc_s68k)
124{
7336a99a 125 int cycn, cycn_s68k, cyc_do;
68cba51e 126 SekCycleAim+=cyc_m68k;
127 SekCycleAimS68k+=cyc_s68k;
7336a99a 128
129// fprintf(stderr, "=== start %3i/%3i [%3i/%3i] {%05i.%i} ===\n", cyc_m68k, cyc_s68k,
130// SekCycleAim-SekCycleCnt, SekCycleAimS68k-SekCycleCntS68k, Pico.m.frame_count, Pico.m.scanline);
131
132 /* loop 488 downto 0 in steps of PS_STEP */
133 for (cycn = (488<<16)-PS_STEP_M68K; cycn >= 0; cycn -= PS_STEP_M68K)
134 {
7336a99a 135 cycn_s68k = (cycn + cycn/2 + cycn/8) >> 16;
7336a99a 136 if ((cyc_do = SekCycleAim-SekCycleCnt-(cycn>>16)) > 0) {
68cba51e 137#if defined(EMU_C68K)
3aa1e148 138 PicoCpuCM68k.cycles = cyc_do;
139 CycloneRun(&PicoCpuCM68k);
140 SekCycleCnt += cyc_do - PicoCpuCM68k.cycles;
68cba51e 141#elif defined(EMU_M68K)
3aa1e148 142 m68k_set_context(&PicoCpuMM68k);
143 SekCycleCnt += m68k_execute(cyc_do);
144#elif defined(EMU_F68K)
145 g_m68kcontext = &PicoCpuFM68k;
c060a9ab 146 SekCycleCnt += fm68k_emulate(cyc_do, 0, 0);
68cba51e 147#endif
7336a99a 148 }
7336a99a 149 if ((cyc_do = SekCycleAimS68k-SekCycleCntS68k-cycn_s68k) > 0) {
68cba51e 150#if defined(EMU_C68K)
3aa1e148 151 PicoCpuCS68k.cycles = cyc_do;
152 CycloneRun(&PicoCpuCS68k);
153 SekCycleCntS68k += cyc_do - PicoCpuCS68k.cycles;
68cba51e 154#elif defined(EMU_M68K)
3aa1e148 155 m68k_set_context(&PicoCpuMS68k);
156 SekCycleCntS68k += m68k_execute(cyc_do);
157#elif defined(EMU_F68K)
158 g_m68kcontext = &PicoCpuFS68k;
c060a9ab 159 SekCycleCntS68k += fm68k_emulate(cyc_do, 0, 0);
68cba51e 160#endif
7336a99a 161 }
68cba51e 162 }
68cba51e 163}
7336a99a 164#endif
68cba51e 165
166
bf098bc5 167static __inline void check_cd_dma(void)
168{
169 int ddx;
170
c459aefd 171 if (!(Pico_mcd->scd.Status_CDC & 0x08)) return;
bf098bc5 172
173 ddx = Pico_mcd->s68k_regs[4] & 7;
174 if (ddx < 2) return; // invalid
c459aefd 175 if (ddx < 4) {
176 Pico_mcd->s68k_regs[4] |= 0x40; // Data set ready in host port
177 return;
178 }
bf098bc5 179 if (ddx == 6) return; // invalid
180
181 Update_CDC_TRansfer(ddx); // now go and do the actual transfer
182}
183
4f265db7 184static __inline void update_chips(void)
185{
186 int counter_timer, int3_set;
187 int counter75hz_lim = Pico.m.pal ? 2080 : 2096;
188
189 // 75Hz CDC update
190 if ((Pico_mcd->m.counter75hz+=10) >= counter75hz_lim) {
191 Pico_mcd->m.counter75hz -= counter75hz_lim;
192 Check_CD_Command();
193 }
194
195 // update timers
196 counter_timer = Pico.m.pal ? 0x21630 : 0x2121c; // 136752 : 135708;
197 Pico_mcd->m.timer_stopwatch += counter_timer;
198 if ((int3_set = Pico_mcd->s68k_regs[0x31])) {
199 Pico_mcd->m.timer_int3 -= counter_timer;
200 if (Pico_mcd->m.timer_int3 < 0) {
201 if (Pico_mcd->s68k_regs[0x33] & (1<<3)) {
69996cb7 202 elprintf(EL_INTS, "s68k: timer irq 3");
4f265db7 203 SekInterruptS68k(3);
204 Pico_mcd->m.timer_int3 += int3_set << 16;
205 }
206 // is this really what happens if irq3 is masked out?
207 Pico_mcd->m.timer_int3 &= 0xffffff;
208 }
209 }
210
211 // update gfx chip
212 if (Pico_mcd->rot_comp.Reg_58 & 0x8000)
213 gfx_cd_update();
214}
215
b837b69b 216
bf5fbbb4 217#define PICO_CD
c987bb5c 218#define CPUS_RUN(m68k_cycles,s68k_cycles) \
219{ \
220 if ((PicoOpt&POPT_EN_MCD_PSYNC) && (Pico_mcd->m.busreq&3) == 1) { \
221 SekRunPS(m68k_cycles, s68k_cycles); /* "better/perfect sync" */ \
222 } else { \
223 SekRunM68k(m68k_cycles); \
224 if ((Pico_mcd->m.busreq&3) == 1) /* no busreq/no reset */ \
225 SekRunS68k(s68k_cycles); \
226 } \
227}
efcba75f 228#include "../pico_cmn.c"
cc68a136 229
230
2aa27095 231PICO_INTERNAL void PicoFrameMCD(void)
cc68a136 232{
602133e1 233 if (!(PicoOpt&POPT_ALT_RENDERER))
cc68a136 234 PicoFrameStart();
235
bf5fbbb4 236 PicoFrameHints();
cc68a136 237}
238
239