32x: initial code (security code passes)
[picodrive.git] / pico / pico.c
CommitLineData
d9fc2fe1 1// PicoDrive\r
cc68a136 2\r
3// (c) Copyright 2004 Dave, All rights reserved.\r
d9fc2fe1 4// (c) Copyright 2006-2008 notaz, All rights reserved.\r
cc68a136 5// Free for non-commercial use.\r
6\r
7// For commercial use, separate licencing terms must be obtained.\r
8\r
9\r
efcba75f 10#include "pico_int.h"\r
cc68a136 11#include "sound/ym2612.h"\r
12\r
69996cb7 13int PicoVer=0x0133;\r
cc68a136 14struct Pico Pico;\r
602133e1 15int PicoOpt = 0;\r
16int PicoSkipFrame = 0; // skip rendering frame?\r
17int emustatus = 0; // rapid_ym2612, multi_ym_updates\r
2b02d6e5 18int PicoPad[2]; // Joypads, format is MXYZ SACB RLDU\r
5f9a0d16 19int PicoPadInt[2]; // internal copy\r
9037e45d 20int PicoAHW = 0; // active addon hardware: scd_active, 32x_active, svp_active, pico_active\r
cc68a136 21int PicoRegionOverride = 0; // override the region detection 0: Auto, 1: Japan NTSC, 2: Japan PAL, 4: US, 8: Europe\r
51a902ae 22int PicoAutoRgnOrder = 0;\r
602133e1 23struct PicoSRAM SRam = {0,};\r
24\r
f8ef8ff7 25void (*PicoWriteSound)(int len) = NULL; // called at the best time to send sound buffer (PsndOut) to hardware\r
26void (*PicoResetHook)(void) = NULL;\r
b0677887 27void (*PicoLineHook)(void) = NULL;\r
cc68a136 28\r
cc68a136 29// to be called once on emu init\r
2aa27095 30void PicoInit(void)\r
cc68a136 31{\r
32 // Blank space for state:\r
33 memset(&Pico,0,sizeof(Pico));\r
34 memset(&PicoPad,0,sizeof(PicoPad));\r
5f9a0d16 35 memset(&PicoPadInt,0,sizeof(PicoPadInt));\r
cc68a136 36\r
37 // Init CPUs:\r
38 SekInit();\r
39 z80_init(); // init even if we aren't going to use it\r
40\r
cc68a136 41 PicoInitMCD();\r
e807ac75 42 PicoSVPInit();\r
be2c4208 43 Pico32xInit();\r
cc68a136 44}\r
45\r
46// to be called once on emu exit\r
47void PicoExit(void)\r
48{\r
602133e1 49 if (PicoAHW & PAHW_MCD)\r
4f265db7 50 PicoExitMCD();\r
ca482e5d 51 PicoCartUnload();\r
cc68a136 52 z80_exit();\r
53\r
45f2f245 54 if (SRam.data)\r
55 free(SRam.data);\r
cc68a136 56}\r
57\r
1cb1584b 58void PicoPower(void)\r
59{\r
053fd9b4 60 Pico.m.frame_count = 0;\r
61\r
1cb1584b 62 // clear all memory of the emulated machine\r
63 memset(&Pico.ram,0,(unsigned int)&Pico.rom-(unsigned int)&Pico.ram);\r
64\r
65 memset(&Pico.video,0,sizeof(Pico.video));\r
66 memset(&Pico.m,0,sizeof(Pico.m));\r
67\r
68 Pico.video.pending_ints=0;\r
69 z80_reset();\r
70\r
71 // default VDP register values (based on Fusion)\r
72 Pico.video.reg[0] = Pico.video.reg[1] = 0x04;\r
73 Pico.video.reg[0xc] = 0x81;\r
74 Pico.video.reg[0xf] = 0x02;\r
75\r
602133e1 76 if (PicoAHW & PAHW_MCD)\r
1cb1584b 77 PicoPowerMCD();\r
78\r
79 PicoReset();\r
80}\r
81\r
1e6b5e39 82PICO_INTERNAL void PicoDetectRegion(void)\r
cc68a136 83{\r
1e6b5e39 84 int support=0, hw=0, i;\r
cc68a136 85 unsigned char pal=0;\r
cc68a136 86\r
1e6b5e39 87 if (PicoRegionOverride)\r
cc68a136 88 {\r
89 support = PicoRegionOverride;\r
90 }\r
91 else\r
92 {\r
93 // Read cartridge region data:\r
af37bca8 94 unsigned short *rd = (unsigned short *)(Pico.rom + 0x1f0);\r
95 int region = (rd[0] << 16) | rd[1];\r
cc68a136 96\r
af37bca8 97 for (i = 0; i < 4; i++)\r
cc68a136 98 {\r
af37bca8 99 int c;\r
cc68a136 100\r
af37bca8 101 c = region >> (i<<3);\r
102 c &= 0xff;\r
103 if (c <= ' ') continue;\r
cc68a136 104\r
51a902ae 105 if (c=='J') support|=1;\r
106 else if (c=='U') support|=4;\r
107 else if (c=='E') support|=8;\r
108 else if (c=='j') {support|=1; break; }\r
109 else if (c=='u') {support|=4; break; }\r
110 else if (c=='e') {support|=8; break; }\r
cc68a136 111 else\r
112 {\r
113 // New style code:\r
114 char s[2]={0,0};\r
115 s[0]=(char)c;\r
116 support|=strtol(s,NULL,16);\r
117 }\r
118 }\r
119 }\r
120\r
51a902ae 121 // auto detection order override\r
122 if (PicoAutoRgnOrder) {\r
123 if (((PicoAutoRgnOrder>>0)&0xf) & support) support = (PicoAutoRgnOrder>>0)&0xf;\r
124 else if (((PicoAutoRgnOrder>>4)&0xf) & support) support = (PicoAutoRgnOrder>>4)&0xf;\r
125 else if (((PicoAutoRgnOrder>>8)&0xf) & support) support = (PicoAutoRgnOrder>>8)&0xf;\r
126 }\r
127\r
cc68a136 128 // Try to pick the best hardware value for English/50hz:\r
129 if (support&8) { hw=0xc0; pal=1; } // Europe\r
130 else if (support&4) hw=0x80; // USA\r
131 else if (support&2) { hw=0x40; pal=1; } // Japan PAL\r
132 else if (support&1) hw=0x00; // Japan NTSC\r
133 else hw=0x80; // USA\r
134\r
135 Pico.m.hardware=(unsigned char)(hw|0x20); // No disk attached\r
136 Pico.m.pal=pal;\r
1e6b5e39 137}\r
138\r
139int PicoReset(void)\r
140{\r
2ec9bec5 141 if (Pico.romsize <= 0)\r
142 return 1;\r
1e6b5e39 143\r
144 /* must call now, so that banking is reset, and correct vectors get fetched */\r
2ec9bec5 145 if (PicoResetHook)\r
146 PicoResetHook();\r
1e6b5e39 147\r
5f9a0d16 148 memset(&PicoPadInt,0,sizeof(PicoPadInt));\r
2ec9bec5 149 emustatus = 0;\r
150\r
151 if (PicoAHW & PAHW_SMS) {\r
152 PicoResetMS();\r
153 return 0;\r
154 }\r
155\r
156 SekReset();\r
1e6b5e39 157 // s68k doesn't have the TAS quirk, so we just globally set normal TAS handler in MCD mode (used by Batman games).\r
158 SekSetRealTAS(PicoAHW & PAHW_MCD);\r
159 SekCycleCntT=0;\r
160\r
161 if (PicoAHW & PAHW_MCD)\r
162 // needed for MCD to reset properly, probably some bug hides behind this..\r
163 memset(Pico.ioports,0,sizeof(Pico.ioports));\r
1e6b5e39 164\r
165 Pico.m.dirtyPal = 1;\r
166\r
1832075e 167 Pico.m.z80_bank68k = 0;\r
af37bca8 168 Pico.m.z80_reset = 1;\r
1832075e 169 memset(Pico.zram, 0, sizeof(Pico.zram)); // ??\r
170\r
1e6b5e39 171 PicoDetectRegion();\r
e5fa9817 172 Pico.video.status = 0x3428 | Pico.m.pal; // 'always set' bits | vblank | collision | pal\r
cc68a136 173\r
9d917eea 174 PsndReset(); // pal must be known here\r
cc68a136 175\r
1cb1584b 176 // create an empty "dma" to cause 68k exec start at random frame location\r
2ec9bec5 177 if (Pico.m.dma_xfers == 0 && !(PicoOpt & POPT_DIS_VDP_FIFO))\r
1cb1584b 178 Pico.m.dma_xfers = rand() & 0x1fff;\r
179\r
5ed2a20e 180 SekFinishIdleDet();\r
181\r
602133e1 182 if (PicoAHW & PAHW_MCD) {\r
1cb1584b 183 PicoResetMCD();\r
cc68a136 184 return 0;\r
185 }\r
5ed2a20e 186\r
187 // reinit, so that checksum checks pass\r
188 if (!(PicoOpt & POPT_DIS_IDLE_DET))\r
189 SekInitIdleDet();\r
cc68a136 190\r
be2c4208 191 if (!(PicoOpt & POPT_DIS_32X)) {\r
192 PicoReset32x();\r
193 return 0;\r
194 }\r
195\r
1dceadae 196 // reset sram state; enable sram access by default if it doesn't overlap with ROM\r
45f2f245 197 Pico.m.sram_reg = 0;\r
198 if ((SRam.flags & SRF_EEPROM) || Pico.romsize <= SRam.start)\r
199 Pico.m.sram_reg |= SRR_MAPPED;\r
cc68a136 200\r
45f2f245 201 if (SRam.flags & SRF_ENABLED)\r
202 elprintf(EL_STATUS, "sram: %06x - %06x; eeprom: %i", SRam.start, SRam.end,\r
203 !!(SRam.flags & SRF_EEPROM));\r
cc68a136 204\r
205 return 0;\r
206}\r
207\r
1dceadae 208\r
69996cb7 209// dma2vram settings are just hacks to unglitch Legend of Galahad (needs <= 104 to work)\r
210// same for Outrunners (92-121, when active is set to 24)\r
48df6e9e 211// 96 is VR hack\r
69996cb7 212static const int dma_timings[] = {\r
053fd9b4 213 96, 167, 166, 83, // vblank: 32cell: dma2vram dma2[vs|c]ram vram_fill vram_copy\r
214 102, 205, 204, 102, // vblank: 40cell:\r
215 16, 16, 15, 8, // active: 32cell:\r
216 24, 18, 17, 9 // ...\r
4f672280 217};\r
218\r
69996cb7 219static const int dma_bsycles[] = {\r
053fd9b4 220 (488<<8)/96, (488<<8)/167, (488<<8)/166, (488<<8)/83,\r
221 (488<<8)/102, (488<<8)/205, (488<<8)/204, (488<<8)/102,\r
222 (488<<8)/16, (488<<8)/16, (488<<8)/15, (488<<8)/8,\r
223 (488<<8)/24, (488<<8)/18, (488<<8)/17, (488<<8)/9\r
312e9ce1 224};\r
225\r
eff55556 226PICO_INTERNAL int CheckDMA(void)\r
4f672280 227{\r
69996cb7 228 int burn = 0, xfers_can, dma_op = Pico.video.reg[0x17]>>6; // see gens for 00 and 01 modes\r
229 int xfers = Pico.m.dma_xfers;\r
312e9ce1 230 int dma_op1;\r
4f672280 231\r
312e9ce1 232 if(!(dma_op&2)) dma_op = (Pico.video.type==1) ? 0 : 1; // setting dma_timings offset here according to Gens\r
233 dma_op1 = dma_op;\r
234 if(Pico.video.reg[12] & 1) dma_op |= 4; // 40 cell mode?\r
235 if(!(Pico.video.status&8)&&(Pico.video.reg[1]&0x40)) dma_op|=8; // active display?\r
69996cb7 236 xfers_can = dma_timings[dma_op];\r
9761a7d0 237 if(xfers <= xfers_can)\r
238 {\r
4f672280 239 if(dma_op&2) Pico.video.status&=~2; // dma no longer busy\r
240 else {\r
69996cb7 241 burn = xfers * dma_bsycles[dma_op] >> 8; // have to be approximate because can't afford division..\r
4f672280 242 }\r
69996cb7 243 Pico.m.dma_xfers = 0;\r
4f672280 244 } else {\r
245 if(!(dma_op&2)) burn = 488;\r
69996cb7 246 Pico.m.dma_xfers -= xfers_can;\r
4f672280 247 }\r
248\r
69996cb7 249 elprintf(EL_VDPDMA, "~Dma %i op=%i can=%i burn=%i [%i]", Pico.m.dma_xfers, dma_op1, xfers_can, burn, SekCyclesDone());\r
312e9ce1 250 //dprintf("~aim: %i, cnt: %i", SekCycleAim, SekCycleCnt);\r
251 return burn;\r
4f672280 252}\r
253\r
bf5fbbb4 254static __inline void SekRunM68k(int cyc)\r
cc68a136 255{\r
256 int cyc_do;\r
257 SekCycleAim+=cyc;\r
053fd9b4 258 if ((cyc_do=SekCycleAim-SekCycleCnt) <= 0) return;\r
03e4f2a3 259#if defined(EMU_CORE_DEBUG)\r
260 // this means we do run-compare\r
b5e5172d 261 SekCycleCnt+=CM_compareRun(cyc_do, 0);\r
cc68a136 262#elif defined(EMU_C68K)\r
3aa1e148 263 PicoCpuCM68k.cycles=cyc_do;\r
264 CycloneRun(&PicoCpuCM68k);\r
265 SekCycleCnt+=cyc_do-PicoCpuCM68k.cycles;\r
cc68a136 266#elif defined(EMU_M68K)\r
267 SekCycleCnt+=m68k_execute(cyc_do);\r
70357ce5 268#elif defined(EMU_F68K)\r
c060a9ab 269 SekCycleCnt+=fm68k_emulate(cyc_do+1, 0, 0);\r
cc68a136 270#endif\r
271}\r
272\r
efcba75f 273#include "pico_cmn.c"\r
4b9c5888 274\r
275int z80stopCycle;\r
276int z80_cycle_cnt; /* 'done' z80 cycles before z80_run() */\r
277int z80_cycle_aim;\r
278int z80_scanline;\r
279int z80_scanline_cycles; /* cycles done until z80_scanline */\r
280\r
281/* sync z80 to 68k */\r
282PICO_INTERNAL void PicoSyncZ80(int m68k_cycles_done)\r
cc68a136 283{\r
4b9c5888 284 int cnt;\r
285 z80_cycle_aim = cycles_68k_to_z80(m68k_cycles_done);\r
286 cnt = z80_cycle_aim - z80_cycle_cnt;\r
cc68a136 287\r
e5fa9817 288 elprintf(EL_BUSREQ, "z80 sync %i (%i|%i -> %i|%i)", cnt, z80_cycle_cnt, z80_cycle_cnt / 228,\r
4b9c5888 289 z80_cycle_aim, z80_cycle_aim / 228);\r
290\r
291 if (cnt > 0)\r
292 z80_cycle_cnt += z80_run(cnt);\r
cc68a136 293}\r
294\r
4b9c5888 295\r
2aa27095 296void PicoFrame(void)\r
cc68a136 297{\r
8c1952f0 298 Pico.m.frame_count++;\r
299\r
19954be1 300 if (PicoAHW & PAHW_SMS) {\r
301 PicoFrameMS();\r
2aa27095 302 return;\r
cc68a136 303 }\r
19954be1 304\r
305 if (PicoAHW & PAHW_MCD) {\r
306 PicoFrameMCD();\r
3e49ffd0 307 return;\r
308 }\r
cc68a136 309\r
cc68a136 310 //if(Pico.video.reg[12]&0x2) Pico.video.status ^= 0x10; // change odd bit in interlace mode\r
311\r
19954be1 312 PicoFrameStart();\r
2aa27095 313 PicoFrameHints();\r
cc68a136 314}\r
315\r
a12e0116 316void PicoFrameDrawOnly(void)\r
317{\r
87b0845f 318 if (!(PicoAHW & PAHW_SMS)) {\r
319 PicoFrameStart();\r
320 PicoDrawSync(223, 0);\r
321 } else {\r
322 PicoFrameDrawOnlyMS();\r
323 }\r
a12e0116 324}\r
325\r
4609d0cd 326void PicoGetInternal(pint_t which, pint_ret_t *r)\r
8e5427a0 327{\r
328 switch (which)\r
329 {\r
4609d0cd 330 case PI_ROM: r->vptr = Pico.rom; break;\r
331 case PI_ISPAL: r->vint = Pico.m.pal; break;\r
332 case PI_IS40_CELL: r->vint = Pico.video.reg[12]&1; break;\r
333 case PI_IS240_LINES: r->vint = Pico.m.pal && (Pico.video.reg[1]&8); break;\r
8e5427a0 334 }\r
8e5427a0 335}\r
336\r
66fdc0f0 337// callback to output message from emu\r
338void (*PicoMessage)(const char *msg)=NULL;\r
cc68a136 339\r