1 #include "../pico_int.h"
2 #include "../sound/ym2612.h"
5 struct Pico32x Pico32x;
7 static void sh2_irq_cb(int id, int level)
10 elprintf(EL_32X, "%csh2 ack %d @ %08x", id ? 's' : 'm', level, sh2_pc(id));
13 void p32x_update_irls(void)
15 int irqs, mlvl = 0, slvl = 0;
18 irqs = (Pico32x.sh2irqs | Pico32x.sh2irqi[0]) & ((Pico32x.sh2irq_mask[0] << 3) | P32XI_VRES);
24 irqs = (Pico32x.sh2irqs | Pico32x.sh2irqi[1]) & ((Pico32x.sh2irq_mask[1] << 3) | P32XI_VRES);
29 elprintf(EL_32X, "update_irls: m %d, s %d", mlvl, slvl);
30 sh2_irl_irq(&msh2, mlvl);
31 sh2_irl_irq(&ssh2, slvl);
34 p32x_poll_event(mlvl | (slvl << 1), 0);
37 void Pico32xStartup(void)
39 elprintf(EL_STATUS|EL_32X, "32X startup");
45 msh2.irq_callback = sh2_irq_cb;
49 ssh2.irq_callback = sh2_irq_cb;
53 Pico32x.vdp_regs[0] |= P32XV_nPAL;
55 PREG8(Pico32xMem->sh2_peri_regs[0], 4) =
56 PREG8(Pico32xMem->sh2_peri_regs[1], 4) = 0x84; // SCI SSR
61 void Pico32xInit(void)
65 void PicoPower32x(void)
67 memset(&Pico32x, 0, sizeof(Pico32x));
69 Pico32x.regs[0] = 0x0082; // SH2 reset?
70 Pico32x.vdp_regs[0x0a/2] = P32XV_VBLK|P32XV_HBLK|P32XV_PEN;
71 Pico32x.sh2_regs[0] = P32XS2_ADEN;
74 void PicoUnload32x(void)
76 if (Pico32xMem != NULL)
83 void PicoReset32x(void)
85 extern int p32x_csum_faked;
86 p32x_csum_faked = 0; // tmp
89 static void p32x_start_blank(void)
92 Pico32x.vdp_regs[0x0a/2] |= P32XV_VBLK|P32XV_PEN;
94 // FB swap waits until vblank
95 if ((Pico32x.vdp_regs[0x0a/2] ^ Pico32x.pending_fb) & P32XV_FS) {
96 Pico32x.vdp_regs[0x0a/2] &= ~P32XV_FS;
97 Pico32x.vdp_regs[0x0a/2] |= Pico32x.pending_fb;
98 Pico32xSwapDRAM(Pico32x.pending_fb ^ 1);
101 Pico32x.sh2irqs |= P32XI_VINT;
103 p32x_poll_event(3, 1);
106 static __inline void run_m68k(int cyc)
108 if (Pico32x.emu_flags & P32XF_68KPOLL) {
112 #if defined(EMU_C68K)
113 PicoCpuCM68k.cycles = cyc;
114 CycloneRun(&PicoCpuCM68k);
115 SekCycleCnt += cyc - PicoCpuCM68k.cycles;
116 #elif defined(EMU_M68K)
117 SekCycleCnt += m68k_execute(cyc);
118 #elif defined(EMU_F68K)
119 SekCycleCnt += fm68k_emulate(cyc+1, 0, 0);
123 // ~1463.8, but due to cache misses and slow mem
124 // it's much lower than that
125 //#define SH2_LINE_CYCLES 735
126 #define CYCLES_M68K2SH2(x) ((x) * 6 / 4)
129 #define CPUS_RUN_SIMPLE(m68k_cycles,s68k_cycles) \
132 SekCycleAim += m68k_cycles; \
133 while (SekCycleCnt < SekCycleAim) { \
134 slice = SekCycleCnt; \
135 run_m68k(SekCycleAim - SekCycleCnt); \
136 slice = SekCycleCnt - slice; /* real count from 68k */ \
137 if (SekCycleCnt < SekCycleAim) \
138 elprintf(EL_32X, "slice %d", slice); \
139 if (!(Pico32x.emu_flags & (P32XF_SSH2POLL|P32XF_SSH2VPOLL))) \
140 sh2_execute(&ssh2, CYCLES_M68K2SH2(slice)); \
141 if (!(Pico32x.emu_flags & (P32XF_MSH2POLL|P32XF_MSH2VPOLL))) \
142 sh2_execute(&msh2, CYCLES_M68K2SH2(slice)); \
147 #define CPUS_RUN_LOCKSTEP(m68k_cycles,s68k_cycles) \
150 for (i = 0; i <= (m68k_cycles) - STEP_68K; i += STEP_68K) { \
151 run_m68k(STEP_68K); \
152 if (!(Pico32x.emu_flags & (P32XF_MSH2POLL|P32XF_MSH2VPOLL))) \
153 sh2_execute(&msh2, CYCLES_M68K2SH2(STEP_68K)); \
154 if (!(Pico32x.emu_flags & (P32XF_SSH2POLL|P32XF_SSH2VPOLL))) \
155 sh2_execute(&ssh2, CYCLES_M68K2SH2(STEP_68K)); \
158 i = (m68k_cycles) - i; \
160 if (!(Pico32x.emu_flags & (P32XF_MSH2POLL|P32XF_MSH2VPOLL))) \
161 sh2_execute(&msh2, CYCLES_M68K2SH2(i)); \
162 if (!(Pico32x.emu_flags & (P32XF_SSH2POLL|P32XF_SSH2VPOLL))) \
163 sh2_execute(&ssh2, CYCLES_M68K2SH2(i)); \
166 #define CPUS_RUN CPUS_RUN_SIMPLE
167 //#define CPUS_RUN CPUS_RUN_LOCKSTEP
169 #include "../pico_cmn.c"
171 void PicoFrame32x(void)
173 pwm_frame_smp_cnt = 0;
175 Pico32x.vdp_regs[0x0a/2] &= ~P32XV_VBLK; // get out of vblank
176 if ((Pico32x.vdp_regs[0] & P32XV_Mx) != 0) // no forced blanking
177 Pico32x.vdp_regs[0x0a/2] &= ~P32XV_PEN; // no palette access
179 p32x_poll_event(3, 1);
183 elprintf(EL_32X, "poll: %02x", Pico32x.emu_flags);