32x and sms savestates. Core-independent z80 state. SS bugfixing/refactoring.
[picodrive.git] / pico / 32x / memory.c
2010-01-27 notaz32x and sms savestates. Core-independent z80 state...
2010-01-23 notaz32x: improve irq handling + few bugfixes
2010-01-15 notaz32x: drc: some constant propagation
2010-01-10 notaz32x: various gfx related bugfixes
2010-01-02 notaz32x: drc: mmap dram+rom for direct dereference
2009-12-29 notaz32x: drc: inline dispatcher and irq handling; do write...
2009-12-06 notazport to 64bit. Some gcc 4.4 warning fixes
2009-11-12 notaz32x: don't log purge area access
2009-10-26 notaz32x: drc: handlers wip
2009-10-22 notaz32x drc functional on ARM, random adjustments
2009-10-18 notaz32x: drc: new smc handling, write handlers adjusted.
2009-10-15 notaz32x: new SH2 memory handling, hopefully faster
2009-10-06 notaz32x: overflow handling for X-Men
2009-10-05 notaz32x: famec support
2009-10-03 notaz32x: built-in BIOS; reset handling; 68k memhandler...
2009-10-02 notaz32x: poll_detect tweaks, debug unification
2009-10-01 notaz32x: watchdog for Star Wars, SCI IRQs for X-men (also...
2009-10-01 notaz32x: improve 'simple' scheduling, works for 'interestin...
2009-09-30 notaz32x: improved lockstep mode, allows compatibility over 50%
2009-09-29 notaz32x: RLE mode + tweaks, VR runs but unstable as everyth...
2009-09-29 notaz32x: implement VDP fill, improve PWM, division unit...
2009-09-25 notaz32x: add more regs, ignore purge space
2009-09-23 notaz32x: vints, dram read, hw divider. Doom runs, but fragi...
2009-09-22 notaz32x: preliminary PWM implementation. 32x opts in menu
2009-09-20 notaz32x: hook slave sh2, BIOS passes (not much else):
2009-09-20 notaz32x: sh2 irqs (irls), preliminary DMAC implementation
2009-09-18 notaz32x: some missed code from MAME, minor tweaks
2009-09-18 notaz32x: mode2 draw, debug, poll detection
2009-09-17 notaz32x: sh2 wip, main SH2 BIOS passes
2009-09-14 notaz32x: more wip
2009-09-12 notaz32x: packed pixel mode (works over 68k)
2009-09-11 notaz32x: initial code (security code passes)