cff531af |
1 | /*\r |
2 | * Memory I/O handlers for Sega/Mega CD.\r |
3 | * (C) notaz, 2007-2009\r |
4 | *\r |
5 | * This work is licensed under the terms of MAME license.\r |
6 | * See COPYING file in the top-level directory.\r |
7 | */\r |
cc68a136 |
8 | \r |
efcba75f |
9 | #include "../pico_int.h"\r |
af37bca8 |
10 | #include "../memory.h"\r |
cc68a136 |
11 | \r |
cb4a513a |
12 | #include "gfx_cd.h"\r |
4f265db7 |
13 | #include "pcm.h"\r |
cb4a513a |
14 | \r |
bcf65fd6 |
15 | uptr s68k_read8_map [0x1000000 >> M68K_MEM_SHIFT];\r |
16 | uptr s68k_read16_map [0x1000000 >> M68K_MEM_SHIFT];\r |
17 | uptr s68k_write8_map [0x1000000 >> M68K_MEM_SHIFT];\r |
18 | uptr s68k_write16_map[0x1000000 >> M68K_MEM_SHIFT];\r |
cc68a136 |
19 | \r |
af37bca8 |
20 | MAKE_68K_READ8(s68k_read8, s68k_read8_map)\r |
21 | MAKE_68K_READ16(s68k_read16, s68k_read16_map)\r |
22 | MAKE_68K_READ32(s68k_read32, s68k_read16_map)\r |
23 | MAKE_68K_WRITE8(s68k_write8, s68k_write8_map)\r |
24 | MAKE_68K_WRITE16(s68k_write16, s68k_write16_map)\r |
25 | MAKE_68K_WRITE32(s68k_write32, s68k_write16_map)\r |
b5e5172d |
26 | \r |
cc68a136 |
27 | // -----------------------------------------------------------------\r |
28 | \r |
0ace9b9a |
29 | // provided by ASM code:\r |
30 | #ifdef _ASM_CD_MEMORY_C\r |
0ace9b9a |
31 | u32 PicoReadS68k8_pr(u32 a);\r |
32 | u32 PicoReadS68k16_pr(u32 a);\r |
33 | void PicoWriteS68k8_pr(u32 a, u32 d);\r |
34 | void PicoWriteS68k16_pr(u32 a, u32 d);\r |
35 | \r |
36 | u32 PicoReadM68k8_cell0(u32 a);\r |
37 | u32 PicoReadM68k8_cell1(u32 a);\r |
38 | u32 PicoReadM68k16_cell0(u32 a);\r |
39 | u32 PicoReadM68k16_cell1(u32 a);\r |
40 | void PicoWriteM68k8_cell0(u32 a, u32 d);\r |
41 | void PicoWriteM68k8_cell1(u32 a, u32 d);\r |
42 | void PicoWriteM68k16_cell0(u32 a, u32 d);\r |
43 | void PicoWriteM68k16_cell1(u32 a, u32 d);\r |
44 | \r |
45 | u32 PicoReadS68k8_dec0(u32 a);\r |
46 | u32 PicoReadS68k8_dec1(u32 a);\r |
47 | u32 PicoReadS68k16_dec0(u32 a);\r |
48 | u32 PicoReadS68k16_dec1(u32 a);\r |
49 | void PicoWriteS68k8_dec_m0b0(u32 a, u32 d);\r |
50 | void PicoWriteS68k8_dec_m1b0(u32 a, u32 d);\r |
51 | void PicoWriteS68k8_dec_m2b0(u32 a, u32 d);\r |
52 | void PicoWriteS68k8_dec_m0b1(u32 a, u32 d);\r |
53 | void PicoWriteS68k8_dec_m1b1(u32 a, u32 d);\r |
54 | void PicoWriteS68k8_dec_m2b1(u32 a, u32 d);\r |
55 | void PicoWriteS68k16_dec_m0b0(u32 a, u32 d);\r |
56 | void PicoWriteS68k16_dec_m1b0(u32 a, u32 d);\r |
57 | void PicoWriteS68k16_dec_m2b0(u32 a, u32 d);\r |
58 | void PicoWriteS68k16_dec_m0b1(u32 a, u32 d);\r |
59 | void PicoWriteS68k16_dec_m1b1(u32 a, u32 d);\r |
60 | void PicoWriteS68k16_dec_m2b1(u32 a, u32 d);\r |
61 | #endif\r |
62 | \r |
4fb43555 |
63 | static void remap_prg_window(u32 r1, u32 r3);\r |
64 | static void remap_word_ram(u32 r3);\r |
0ace9b9a |
65 | \r |
7a1f6e45 |
66 | // poller detection\r |
7a1f6e45 |
67 | #define POLL_LIMIT 16\r |
30e8aac4 |
68 | #define POLL_CYCLES 64\r |
cc68a136 |
69 | \r |
cc5ffc3c |
70 | void m68k_comm_check(u32 a)\r |
bc3c13d3 |
71 | {\r |
08769494 |
72 | pcd_sync_s68k(SekCyclesDone(), 0);\r |
ecc8036e |
73 | if (SekNotPolling || a != Pico_mcd->m.m68k_poll_a) {\r |
bc3c13d3 |
74 | Pico_mcd->m.m68k_poll_a = a;\r |
75 | Pico_mcd->m.m68k_poll_cnt = 0;\r |
ecc8036e |
76 | SekNotPolling = 0;\r |
cc5ffc3c |
77 | return;\r |
bc3c13d3 |
78 | }\r |
08769494 |
79 | Pico_mcd->m.m68k_poll_cnt++;\r |
bc3c13d3 |
80 | }\r |
81 | \r |
4ff2d527 |
82 | #ifndef _ASM_CD_MEMORY_C\r |
cb4a513a |
83 | static u32 m68k_reg_read16(u32 a)\r |
cc68a136 |
84 | {\r |
4fb43555 |
85 | u32 d = 0;\r |
cc68a136 |
86 | a &= 0x3e;\r |
cc68a136 |
87 | \r |
88 | switch (a) {\r |
672ad671 |
89 | case 0:\r |
4fb43555 |
90 | // here IFL2 is always 0, just like in Gens\r |
91 | d = ((Pico_mcd->s68k_regs[0x33] << 13) & 0x8000)\r |
92 | | Pico_mcd->m.busreq;\r |
672ad671 |
93 | goto end;\r |
cc68a136 |
94 | case 2:\r |
cc5ffc3c |
95 | m68k_comm_check(a);\r |
672ad671 |
96 | d = (Pico_mcd->s68k_regs[a]<<8) | (Pico_mcd->s68k_regs[a+1]&0xc7);\r |
af37bca8 |
97 | elprintf(EL_CDREG3, "m68k_regs r3: %02x @%06x", (u8)d, SekPc);\r |
cc5ffc3c |
98 | goto end;\r |
c459aefd |
99 | case 4:\r |
100 | d = Pico_mcd->s68k_regs[4]<<8;\r |
101 | goto end;\r |
102 | case 6:\r |
913ef4b7 |
103 | d = *(u16 *)(Pico_mcd->bios + 0x72);\r |
c459aefd |
104 | goto end;\r |
cc68a136 |
105 | case 8:\r |
cc68a136 |
106 | d = Read_CDC_Host(0);\r |
107 | goto end;\r |
c459aefd |
108 | case 0xA:\r |
ca61ee42 |
109 | elprintf(EL_UIO, "m68k FIXME: reserved read");\r |
c459aefd |
110 | goto end;\r |
ae214f1c |
111 | case 0xC: // 384 cycle stopwatch timer\r |
112 | // ugh..\r |
113 | d = pcd_cycles_m68k_to_s68k(SekCyclesDone());\r |
114 | d = (d - Pico_mcd->m.stopwatch_base_c) / 384;\r |
115 | d &= 0x0fff;\r |
af37bca8 |
116 | elprintf(EL_CDREGS, "m68k stopwatch timer read (%04x)", d);\r |
1cd356a3 |
117 | goto end;\r |
cc68a136 |
118 | }\r |
119 | \r |
cc68a136 |
120 | if (a < 0x30) {\r |
121 | // comm flag/cmd/status (0xE-0x2F)\r |
cc5ffc3c |
122 | m68k_comm_check(a);\r |
cc68a136 |
123 | d = (Pico_mcd->s68k_regs[a]<<8) | Pico_mcd->s68k_regs[a+1];\r |
cc5ffc3c |
124 | goto end;\r |
cc68a136 |
125 | }\r |
126 | \r |
ca61ee42 |
127 | elprintf(EL_UIO, "m68k_regs FIXME invalid read @ %02x", a);\r |
cc68a136 |
128 | \r |
129 | end:\r |
cc68a136 |
130 | return d;\r |
131 | }\r |
4ff2d527 |
132 | #endif\r |
cc68a136 |
133 | \r |
4ff2d527 |
134 | #ifndef _ASM_CD_MEMORY_C\r |
135 | static\r |
136 | #endif\r |
137 | void m68k_reg_write8(u32 a, u32 d)\r |
cc68a136 |
138 | {\r |
af37bca8 |
139 | u32 dold;\r |
cc68a136 |
140 | a &= 0x3f;\r |
cc68a136 |
141 | \r |
142 | switch (a) {\r |
143 | case 0:\r |
672ad671 |
144 | d &= 1;\r |
08769494 |
145 | if (d && (Pico_mcd->s68k_regs[0x33] & PCDS_IEN2)) {\r |
146 | elprintf(EL_INTS, "m68k: s68k irq 2");\r |
147 | pcd_sync_s68k(SekCyclesDone(), 0);\r |
148 | SekInterruptS68k(2);\r |
149 | }\r |
c459aefd |
150 | return;\r |
cc68a136 |
151 | case 1:\r |
672ad671 |
152 | d &= 3;\r |
4fb43555 |
153 | dold = Pico_mcd->m.busreq;\r |
154 | if (!(d & 1))\r |
155 | d |= 2; // verified: can't release bus on reset\r |
156 | if (dold == d)\r |
bc3c13d3 |
157 | return;\r |
4fb43555 |
158 | \r |
08769494 |
159 | pcd_sync_s68k(SekCyclesDone(), 0);\r |
bc3c13d3 |
160 | \r |
4fb43555 |
161 | if ((dold ^ d) & 1)\r |
bc3c13d3 |
162 | elprintf(EL_INTSW, "m68k: s68k reset %i", !(d&1));\r |
4fb43555 |
163 | if (!(d & 1))\r |
164 | Pico_mcd->m.state_flags |= PCD_ST_S68K_RST;\r |
165 | else if (d == 1 && (Pico_mcd->m.state_flags & PCD_ST_S68K_RST)) {\r |
166 | Pico_mcd->m.state_flags &= ~PCD_ST_S68K_RST;\r |
167 | elprintf(EL_CDREGS, "m68k: resetting s68k");\r |
168 | SekResetS68k();\r |
cc68a136 |
169 | }\r |
4fb43555 |
170 | if ((dold ^ d) & 2) {\r |
bc3c13d3 |
171 | elprintf(EL_INTSW, "m68k: s68k brq %i", d >> 1);\r |
4fb43555 |
172 | remap_prg_window(d, Pico_mcd->s68k_regs[3]);\r |
bc3c13d3 |
173 | }\r |
c459aefd |
174 | Pico_mcd->m.busreq = d;\r |
175 | return;\r |
672ad671 |
176 | case 2:\r |
af37bca8 |
177 | elprintf(EL_CDREGS, "m68k: prg wp=%02x", d);\r |
672ad671 |
178 | Pico_mcd->s68k_regs[2] = d; // really use s68k side register\r |
179 | return;\r |
af37bca8 |
180 | case 3:\r |
181 | dold = Pico_mcd->s68k_regs[3];\r |
182 | elprintf(EL_CDREG3, "m68k_regs w3: %02x @%06x", (u8)d, SekPc);\r |
af37bca8 |
183 | if ((d ^ dold) & 0xc0) {\r |
08769494 |
184 | elprintf(EL_CDREGS, "m68k: prg bank: %i -> %i",\r |
185 | (Pico_mcd->s68k_regs[a]>>6), ((d>>6)&3));\r |
4fb43555 |
186 | remap_prg_window(Pico_mcd->m.busreq, d);\r |
7a1f6e45 |
187 | }\r |
ba6e8bfd |
188 | \r |
189 | // 2M mode state is tracked regardless of current mode\r |
190 | if (d & 2) {\r |
191 | Pico_mcd->m.dmna_ret_2m |= 2;\r |
192 | Pico_mcd->m.dmna_ret_2m &= ~1;\r |
193 | }\r |
194 | if (dold & 4) { // 1M mode\r |
195 | d ^= 2; // 0 sets DMNA, 1 does nothing\r |
196 | d = (d & 0xc2) | (dold & 0x1f);\r |
197 | }\r |
198 | else\r |
199 | d = (d & 0xc0) | (dold & 0x1c) | Pico_mcd->m.dmna_ret_2m;\r |
200 | \r |
08769494 |
201 | goto write_comm;\r |
c459aefd |
202 | case 6:\r |
d1df8786 |
203 | Pico_mcd->bios[0x72 + 1] = d; // simple hint vector changer\r |
c459aefd |
204 | return;\r |
205 | case 7:\r |
d1df8786 |
206 | Pico_mcd->bios[0x72] = d;\r |
af37bca8 |
207 | elprintf(EL_CDREGS, "hint vector set to %04x%04x",\r |
208 | ((u16 *)Pico_mcd->bios)[0x70/2], ((u16 *)Pico_mcd->bios)[0x72/2]);\r |
c459aefd |
209 | return;\r |
08769494 |
210 | case 0x0f:\r |
08769494 |
211 | a = 0x0e;\r |
212 | case 0x0e:\r |
213 | goto write_comm;\r |
672ad671 |
214 | }\r |
215 | \r |
08769494 |
216 | if ((a&0xf0) == 0x10)\r |
217 | goto write_comm;\r |
cc68a136 |
218 | \r |
ca61ee42 |
219 | elprintf(EL_UIO, "m68k FIXME: invalid write? [%02x] %02x", a, d);\r |
08769494 |
220 | return;\r |
221 | \r |
222 | write_comm:\r |
223 | if (d == Pico_mcd->s68k_regs[a])\r |
224 | return;\r |
225 | \r |
08769494 |
226 | pcd_sync_s68k(SekCyclesDone(), 0);\r |
30e8aac4 |
227 | Pico_mcd->s68k_regs[a] = d;\r |
228 | if (Pico_mcd->m.s68k_poll_a == (a & ~1)\r |
229 | && Pico_mcd->m.s68k_poll_cnt > POLL_LIMIT)\r |
230 | {\r |
08769494 |
231 | SekSetStopS68k(0);\r |
232 | Pico_mcd->m.s68k_poll_a = 0;\r |
233 | elprintf(EL_CDPOLL, "s68k poll release, a=%02x", a);\r |
234 | }\r |
cc68a136 |
235 | }\r |
236 | \r |
2433f409 |
237 | u32 s68k_poll_detect(u32 a, u32 d)\r |
238 | {\r |
239 | #ifdef USE_POLL_DETECT\r |
08769494 |
240 | u32 cycles, cnt = 0;\r |
241 | if (SekIsStoppedS68k())\r |
242 | return d;\r |
243 | \r |
244 | cycles = SekCyclesDoneS68k();\r |
ecc8036e |
245 | if (!SekNotPolling && a == Pico_mcd->m.s68k_poll_a) {\r |
08769494 |
246 | u32 clkdiff = cycles - Pico_mcd->m.s68k_poll_clk;\r |
2433f409 |
247 | if (clkdiff <= POLL_CYCLES) {\r |
08769494 |
248 | cnt = Pico_mcd->m.s68k_poll_cnt + 1;\r |
249 | //printf("-- diff: %u, cnt = %i\n", clkdiff, cnt);\r |
250 | if (Pico_mcd->m.s68k_poll_cnt > POLL_LIMIT) {\r |
2433f409 |
251 | SekSetStopS68k(1);\r |
cc5ffc3c |
252 | elprintf(EL_CDPOLL, "s68k poll detected @%06x, a=%02x",\r |
08769494 |
253 | SekPcS68k, a);\r |
2433f409 |
254 | }\r |
2433f409 |
255 | }\r |
256 | }\r |
08769494 |
257 | Pico_mcd->m.s68k_poll_a = a;\r |
258 | Pico_mcd->m.s68k_poll_clk = cycles;\r |
259 | Pico_mcd->m.s68k_poll_cnt = cnt;\r |
ecc8036e |
260 | SekNotPollingS68k = 0;\r |
2433f409 |
261 | #endif\r |
262 | return d;\r |
263 | }\r |
cc68a136 |
264 | \r |
913ef4b7 |
265 | #define READ_FONT_DATA(basemask) \\r |
266 | { \\r |
267 | unsigned int fnt = *(unsigned int *)(Pico_mcd->s68k_regs + 0x4c); \\r |
268 | unsigned int col0 = (fnt >> 8) & 0x0f, col1 = (fnt >> 12) & 0x0f; \\r |
269 | if (fnt & (basemask << 0)) d = col1 ; else d = col0; \\r |
270 | if (fnt & (basemask << 1)) d |= col1 << 4; else d |= col0 << 4; \\r |
271 | if (fnt & (basemask << 2)) d |= col1 << 8; else d |= col0 << 8; \\r |
272 | if (fnt & (basemask << 3)) d |= col1 << 12; else d |= col0 << 12; \\r |
273 | }\r |
274 | \r |
cc68a136 |
275 | \r |
4ff2d527 |
276 | #ifndef _ASM_CD_MEMORY_C\r |
277 | static\r |
278 | #endif\r |
279 | u32 s68k_reg_read16(u32 a)\r |
cc68a136 |
280 | {\r |
281 | u32 d=0;\r |
cc68a136 |
282 | \r |
cc68a136 |
283 | switch (a) {\r |
284 | case 0:\r |
7a1f6e45 |
285 | return ((Pico_mcd->s68k_regs[0]&3)<<8) | 1; // ver = 0, not in reset state\r |
672ad671 |
286 | case 2:\r |
2433f409 |
287 | d = (Pico_mcd->s68k_regs[2]<<8) | (Pico_mcd->s68k_regs[3]&0x1f);\r |
af37bca8 |
288 | elprintf(EL_CDREG3, "s68k_regs r3: %02x @%06x", (u8)d, SekPcS68k);\r |
2433f409 |
289 | return s68k_poll_detect(a, d);\r |
cc68a136 |
290 | case 6:\r |
7a1f6e45 |
291 | return CDC_Read_Reg();\r |
cc68a136 |
292 | case 8:\r |
7a1f6e45 |
293 | return Read_CDC_Host(1); // Gens returns 0 here on byte reads\r |
cc68a136 |
294 | case 0xC:\r |
ae214f1c |
295 | d = SekCyclesDoneS68k() - Pico_mcd->m.stopwatch_base_c;\r |
296 | d /= 384;\r |
297 | d &= 0x0fff;\r |
af37bca8 |
298 | elprintf(EL_CDREGS, "s68k stopwatch timer read (%04x)", d);\r |
7a1f6e45 |
299 | return d;\r |
d1df8786 |
300 | case 0x30:\r |
af37bca8 |
301 | elprintf(EL_CDREGS, "s68k int3 timer read (%02x)", Pico_mcd->s68k_regs[31]);\r |
7a1f6e45 |
302 | return Pico_mcd->s68k_regs[31];\r |
cc68a136 |
303 | case 0x34: // fader\r |
7a1f6e45 |
304 | return 0; // no busy bit\r |
913ef4b7 |
305 | case 0x50: // font data (check: Lunar 2, Silpheed)\r |
306 | READ_FONT_DATA(0x00100000);\r |
7a1f6e45 |
307 | return d;\r |
913ef4b7 |
308 | case 0x52:\r |
309 | READ_FONT_DATA(0x00010000);\r |
7a1f6e45 |
310 | return d;\r |
913ef4b7 |
311 | case 0x54:\r |
312 | READ_FONT_DATA(0x10000000);\r |
7a1f6e45 |
313 | return d;\r |
913ef4b7 |
314 | case 0x56:\r |
315 | READ_FONT_DATA(0x01000000);\r |
7a1f6e45 |
316 | return d;\r |
cc68a136 |
317 | }\r |
318 | \r |
319 | d = (Pico_mcd->s68k_regs[a]<<8) | Pico_mcd->s68k_regs[a+1];\r |
320 | \r |
2433f409 |
321 | if (a >= 0x0e && a < 0x30)\r |
322 | return s68k_poll_detect(a, d);\r |
7a1f6e45 |
323 | \r |
cc68a136 |
324 | return d;\r |
325 | }\r |
326 | \r |
4ff2d527 |
327 | #ifndef _ASM_CD_MEMORY_C\r |
328 | static\r |
329 | #endif\r |
330 | void s68k_reg_write8(u32 a, u32 d)\r |
cc68a136 |
331 | {\r |
48e8482f |
332 | // Warning: d might have upper bits set\r |
cc68a136 |
333 | switch (a) {\r |
d0132772 |
334 | case 1:\r |
335 | if (!(d & 1))\r |
336 | pcd_soft_reset();\r |
337 | return;\r |
672ad671 |
338 | case 2:\r |
339 | return; // only m68k can change WP\r |
fa1e5e29 |
340 | case 3: {\r |
341 | int dold = Pico_mcd->s68k_regs[3];\r |
af37bca8 |
342 | elprintf(EL_CDREG3, "s68k_regs w3: %02x @%06x", (u8)d, SekPcS68k);\r |
672ad671 |
343 | d &= 0x1d;\r |
af37bca8 |
344 | d |= dold & 0xc2;\r |
ba6e8bfd |
345 | \r |
346 | // 2M mode state\r |
347 | if (d & 1) {\r |
348 | Pico_mcd->m.dmna_ret_2m |= 1;\r |
349 | Pico_mcd->m.dmna_ret_2m &= ~2; // DMNA clears\r |
350 | }\r |
351 | \r |
af37bca8 |
352 | if (d & 4)\r |
39230401 |
353 | {\r |
fa1e5e29 |
354 | if (!(dold & 4)) {\r |
af37bca8 |
355 | elprintf(EL_CDREG3, "wram mode 2M->1M");\r |
fa1e5e29 |
356 | wram_2M_to_1M(Pico_mcd->word_ram2M);\r |
4ff2d527 |
357 | }\r |
ba6e8bfd |
358 | \r |
359 | if ((d ^ dold) & 0x1d)\r |
360 | remap_word_ram(d);\r |
361 | \r |
362 | if ((d ^ dold) & 0x05)\r |
363 | d &= ~2; // clear DMNA - swap complete\r |
39230401 |
364 | }\r |
365 | else\r |
366 | {\r |
fa1e5e29 |
367 | if (dold & 4) {\r |
af37bca8 |
368 | elprintf(EL_CDREG3, "wram mode 1M->2M");\r |
fa1e5e29 |
369 | wram_1M_to_2M(Pico_mcd->word_ram2M);\r |
0ace9b9a |
370 | remap_word_ram(d);\r |
4ff2d527 |
371 | }\r |
ba6e8bfd |
372 | d = (d & ~3) | Pico_mcd->m.dmna_ret_2m;\r |
d0d47c5b |
373 | }\r |
08769494 |
374 | goto write_comm;\r |
fa1e5e29 |
375 | }\r |
cc68a136 |
376 | case 4:\r |
af37bca8 |
377 | elprintf(EL_CDREGS, "s68k CDC dest: %x", d&7);\r |
cc68a136 |
378 | Pico_mcd->s68k_regs[4] = (Pico_mcd->s68k_regs[4]&0xC0) | (d&7); // CDC mode\r |
379 | return;\r |
380 | case 5:\r |
c459aefd |
381 | //dprintf("s68k CDC reg addr: %x", d&0xf);\r |
cc68a136 |
382 | break;\r |
383 | case 7:\r |
384 | CDC_Write_Reg(d);\r |
385 | return;\r |
386 | case 0xa:\r |
af37bca8 |
387 | elprintf(EL_CDREGS, "s68k set CDC dma addr");\r |
cc68a136 |
388 | break;\r |
d1df8786 |
389 | case 0xc:\r |
ae214f1c |
390 | case 0xd: // 384 cycle stopwatch timer\r |
391 | elprintf(EL_CDREGS|EL_CD, "s68k clear stopwatch (%x)", d);\r |
392 | // does this also reset internal 384 cycle counter?\r |
393 | Pico_mcd->m.stopwatch_base_c = SekCyclesDoneS68k();\r |
4f265db7 |
394 | return;\r |
08769494 |
395 | case 0x0e:\r |
08769494 |
396 | a = 0x0f;\r |
397 | case 0x0f:\r |
398 | goto write_comm;\r |
ae214f1c |
399 | case 0x31: // 384 cycle int3 timer\r |
400 | d &= 0xff;\r |
401 | elprintf(EL_CDREGS|EL_CD, "s68k set int3 timer: %02x", d);\r |
402 | Pico_mcd->s68k_regs[a] = (u8) d;\r |
403 | if (d) // d or d+1??\r |
404 | pcd_event_schedule_s68k(PCD_EVENT_TIMER3, d * 384);\r |
405 | else\r |
406 | pcd_event_schedule(0, PCD_EVENT_TIMER3, 0);\r |
d1df8786 |
407 | break;\r |
cc68a136 |
408 | case 0x33: // IRQ mask\r |
ae214f1c |
409 | elprintf(EL_CDREGS|EL_CD, "s68k irq mask: %02x", d);\r |
410 | d &= 0x7e;\r |
411 | if ((d ^ Pico_mcd->s68k_regs[0x33]) & d & PCDS_IEN4) {\r |
412 | if (Pico_mcd->s68k_regs[0x37] & 4)\r |
413 | CDD_Export_Status();\r |
cc68a136 |
414 | }\r |
415 | break;\r |
416 | case 0x34: // fader\r |
417 | Pico_mcd->s68k_regs[a] = (u8) d & 0x7f;\r |
418 | return;\r |
672ad671 |
419 | case 0x36:\r |
420 | return; // d/m bit is unsetable\r |
421 | case 0x37: {\r |
422 | u32 d_old = Pico_mcd->s68k_regs[0x37];\r |
423 | Pico_mcd->s68k_regs[0x37] = d&7;\r |
424 | if ((d&4) && !(d_old&4)) {\r |
cc68a136 |
425 | CDD_Export_Status();\r |
cc68a136 |
426 | }\r |
672ad671 |
427 | return;\r |
428 | }\r |
cc68a136 |
429 | case 0x4b:\r |
430 | Pico_mcd->s68k_regs[a] = (u8) d;\r |
431 | CDD_Import_Command();\r |
432 | return;\r |
433 | }\r |
434 | \r |
08769494 |
435 | if ((a&0x1f0) == 0x20)\r |
436 | goto write_comm;\r |
437 | \r |
1cd356a3 |
438 | if ((a&0x1f0) == 0x10 || (a >= 0x38 && a < 0x42))\r |
cc68a136 |
439 | {\r |
ca61ee42 |
440 | elprintf(EL_UIO, "s68k FIXME: invalid write @ %02x?", a);\r |
cc68a136 |
441 | return;\r |
442 | }\r |
443 | \r |
08769494 |
444 | Pico_mcd->s68k_regs[a] = (u8) d;\r |
445 | return;\r |
bc3c13d3 |
446 | \r |
08769494 |
447 | write_comm:\r |
cc68a136 |
448 | Pico_mcd->s68k_regs[a] = (u8) d;\r |
08769494 |
449 | if (Pico_mcd->m.m68k_poll_cnt)\r |
450 | SekEndRunS68k(0);\r |
451 | Pico_mcd->m.m68k_poll_cnt = 0;\r |
cc68a136 |
452 | }\r |
453 | \r |
af37bca8 |
454 | // -----------------------------------------------------------------\r |
455 | // Main 68k\r |
456 | // -----------------------------------------------------------------\r |
cc68a136 |
457 | \r |
af37bca8 |
458 | #ifndef _ASM_CD_MEMORY_C\r |
459 | #include "cell_map.c"\r |
af37bca8 |
460 | \r |
461 | // WORD RAM, cell aranged area (220000 - 23ffff)\r |
0ace9b9a |
462 | static u32 PicoReadM68k8_cell0(u32 a)\r |
cc68a136 |
463 | {\r |
af37bca8 |
464 | a = (a&3) | (cell_map(a >> 2) << 2); // cell arranged\r |
0ace9b9a |
465 | return Pico_mcd->word_ram1M[0][a ^ 1];\r |
466 | }\r |
467 | \r |
468 | static u32 PicoReadM68k8_cell1(u32 a)\r |
469 | {\r |
470 | a = (a&3) | (cell_map(a >> 2) << 2);\r |
471 | return Pico_mcd->word_ram1M[1][a ^ 1];\r |
472 | }\r |
473 | \r |
474 | static u32 PicoReadM68k16_cell0(u32 a)\r |
475 | {\r |
476 | a = (a&2) | (cell_map(a >> 2) << 2);\r |
477 | return *(u16 *)(Pico_mcd->word_ram1M[0] + a);\r |
af37bca8 |
478 | }\r |
cc68a136 |
479 | \r |
0ace9b9a |
480 | static u32 PicoReadM68k16_cell1(u32 a)\r |
af37bca8 |
481 | {\r |
af37bca8 |
482 | a = (a&2) | (cell_map(a >> 2) << 2);\r |
0ace9b9a |
483 | return *(u16 *)(Pico_mcd->word_ram1M[1] + a);\r |
af37bca8 |
484 | }\r |
cc68a136 |
485 | \r |
0ace9b9a |
486 | static void PicoWriteM68k8_cell0(u32 a, u32 d)\r |
af37bca8 |
487 | {\r |
af37bca8 |
488 | a = (a&3) | (cell_map(a >> 2) << 2);\r |
0ace9b9a |
489 | Pico_mcd->word_ram1M[0][a ^ 1] = d;\r |
af37bca8 |
490 | }\r |
8022f53d |
491 | \r |
0ace9b9a |
492 | static void PicoWriteM68k8_cell1(u32 a, u32 d)\r |
af37bca8 |
493 | {\r |
af37bca8 |
494 | a = (a&3) | (cell_map(a >> 2) << 2);\r |
0ace9b9a |
495 | Pico_mcd->word_ram1M[1][a ^ 1] = d;\r |
af37bca8 |
496 | }\r |
497 | \r |
0ace9b9a |
498 | static void PicoWriteM68k16_cell0(u32 a, u32 d)\r |
499 | {\r |
500 | a = (a&3) | (cell_map(a >> 2) << 2);\r |
501 | *(u16 *)(Pico_mcd->word_ram1M[0] + a) = d;\r |
502 | }\r |
503 | \r |
504 | static void PicoWriteM68k16_cell1(u32 a, u32 d)\r |
505 | {\r |
506 | a = (a&3) | (cell_map(a >> 2) << 2);\r |
507 | *(u16 *)(Pico_mcd->word_ram1M[1] + a) = d;\r |
508 | }\r |
509 | #endif\r |
510 | \r |
af37bca8 |
511 | // RAM cart (40000 - 7fffff, optional)\r |
512 | static u32 PicoReadM68k8_ramc(u32 a)\r |
513 | {\r |
514 | u32 d = 0;\r |
515 | if (a == 0x400001) {\r |
516 | if (SRam.data != NULL)\r |
517 | d = 3; // 64k cart\r |
518 | return d;\r |
8022f53d |
519 | }\r |
520 | \r |
af37bca8 |
521 | if ((a & 0xfe0000) == 0x600000) {\r |
522 | if (SRam.data != NULL)\r |
523 | d = SRam.data[((a >> 1) & 0xffff) + 0x2000];\r |
524 | return d;\r |
8022f53d |
525 | }\r |
526 | \r |
af37bca8 |
527 | if (a == 0x7fffff)\r |
528 | return Pico_mcd->m.bcram_reg;\r |
cc68a136 |
529 | \r |
af37bca8 |
530 | elprintf(EL_UIO, "m68k unmapped r8 [%06x] @%06x", a, SekPc);\r |
cc68a136 |
531 | return d;\r |
532 | }\r |
533 | \r |
af37bca8 |
534 | static u32 PicoReadM68k16_ramc(u32 a)\r |
cc68a136 |
535 | {\r |
af37bca8 |
536 | elprintf(EL_ANOMALY, "ramcart r16: [%06x] @%06x", a, SekPcS68k);\r |
537 | return PicoReadM68k8_ramc(a + 1);\r |
538 | }\r |
cc68a136 |
539 | \r |
af37bca8 |
540 | static void PicoWriteM68k8_ramc(u32 a, u32 d)\r |
541 | {\r |
542 | if ((a & 0xfe0000) == 0x600000) {\r |
543 | if (SRam.data != NULL && (Pico_mcd->m.bcram_reg & 1)) {\r |
544 | SRam.data[((a>>1) & 0xffff) + 0x2000] = d;\r |
8022f53d |
545 | SRam.changed = 1;\r |
546 | }\r |
547 | return;\r |
548 | }\r |
549 | \r |
af37bca8 |
550 | if (a == 0x7fffff) {\r |
551 | Pico_mcd->m.bcram_reg = d;\r |
8022f53d |
552 | return;\r |
553 | }\r |
554 | \r |
c7fd7bb8 |
555 | elprintf(EL_UIO, "m68k unmapped w8 [%06x] %02x @%06x",\r |
556 | a, d & 0xff, SekPc);\r |
cc68a136 |
557 | }\r |
558 | \r |
af37bca8 |
559 | static void PicoWriteM68k16_ramc(u32 a, u32 d)\r |
cc68a136 |
560 | {\r |
c7fd7bb8 |
561 | elprintf(EL_ANOMALY, "ramcart w16: [%06x] %04x @%06x",\r |
562 | a, d, SekPcS68k);\r |
af37bca8 |
563 | PicoWriteM68k8_ramc(a + 1, d);\r |
cc68a136 |
564 | }\r |
565 | \r |
af37bca8 |
566 | // IO/control/cd registers (a10000 - ...)\r |
0ace9b9a |
567 | #ifndef _ASM_CD_MEMORY_C\r |
fa8fb754 |
568 | u32 PicoRead8_mcd_io(u32 a)\r |
cc68a136 |
569 | {\r |
af37bca8 |
570 | u32 d;\r |
571 | if ((a & 0xff00) == 0x2000) { // a12000 - a120ff\r |
572 | d = m68k_reg_read16(a); // TODO: m68k_reg_read8\r |
573 | if (!(a & 1))\r |
574 | d >>= 8;\r |
575 | d &= 0xff;\r |
c7fd7bb8 |
576 | elprintf(EL_CDREGS, "m68k_regs r8: [%02x] %02x @%06x",\r |
577 | a & 0x3f, d, SekPc);\r |
af37bca8 |
578 | return d;\r |
579 | }\r |
580 | \r |
581 | // fallback to default MD handler\r |
582 | return PicoRead8_io(a);\r |
cc68a136 |
583 | }\r |
584 | \r |
fa8fb754 |
585 | u32 PicoRead16_mcd_io(u32 a)\r |
cc68a136 |
586 | {\r |
af37bca8 |
587 | u32 d;\r |
588 | if ((a & 0xff00) == 0x2000) {\r |
589 | d = m68k_reg_read16(a);\r |
c7fd7bb8 |
590 | elprintf(EL_CDREGS, "m68k_regs r16: [%02x] %04x @%06x",\r |
591 | a & 0x3f, d, SekPc);\r |
af37bca8 |
592 | return d;\r |
b542be46 |
593 | }\r |
cc68a136 |
594 | \r |
af37bca8 |
595 | return PicoRead16_io(a);\r |
cc68a136 |
596 | }\r |
597 | \r |
fa8fb754 |
598 | void PicoWrite8_mcd_io(u32 a, u32 d)\r |
cc68a136 |
599 | {\r |
af37bca8 |
600 | if ((a & 0xff00) == 0x2000) { // a12000 - a120ff\r |
c7fd7bb8 |
601 | elprintf(EL_CDREGS, "m68k_regs w8: [%02x] %02x @%06x",\r |
602 | a & 0x3f, d, SekPc);\r |
2433f409 |
603 | m68k_reg_write8(a, d);\r |
604 | return;\r |
605 | }\r |
672ad671 |
606 | \r |
af37bca8 |
607 | PicoWrite16_io(a, d);\r |
cc68a136 |
608 | }\r |
ab0607f7 |
609 | \r |
fa8fb754 |
610 | void PicoWrite16_mcd_io(u32 a, u32 d)\r |
cc68a136 |
611 | {\r |
af37bca8 |
612 | if ((a & 0xff00) == 0x2000) { // a12000 - a120ff\r |
c7fd7bb8 |
613 | elprintf(EL_CDREGS, "m68k_regs w16: [%02x] %04x @%06x",\r |
614 | a & 0x3f, d, SekPc);\r |
08769494 |
615 | \r |
af37bca8 |
616 | m68k_reg_write8(a, d >> 8);\r |
08769494 |
617 | if ((a & 0x3e) != 0x0e) // special case\r |
618 | m68k_reg_write8(a + 1, d & 0xff);\r |
b542be46 |
619 | return;\r |
620 | }\r |
621 | \r |
af37bca8 |
622 | PicoWrite16_io(a, d);\r |
cc68a136 |
623 | }\r |
0ace9b9a |
624 | #endif\r |
cc68a136 |
625 | \r |
721cd396 |
626 | // -----------------------------------------------------------------\r |
af37bca8 |
627 | // Sub 68k\r |
cc68a136 |
628 | // -----------------------------------------------------------------\r |
629 | \r |
af37bca8 |
630 | static u32 s68k_unmapped_read8(u32 a)\r |
cc68a136 |
631 | {\r |
af37bca8 |
632 | elprintf(EL_UIO, "s68k unmapped r8 [%06x] @%06x", a, SekPc);\r |
633 | return 0;\r |
cc68a136 |
634 | }\r |
635 | \r |
af37bca8 |
636 | static u32 s68k_unmapped_read16(u32 a)\r |
cc68a136 |
637 | {\r |
af37bca8 |
638 | elprintf(EL_UIO, "s68k unmapped r16 [%06x] @%06x", a, SekPc);\r |
639 | return 0;\r |
640 | }\r |
4f265db7 |
641 | \r |
af37bca8 |
642 | static void s68k_unmapped_write8(u32 a, u32 d)\r |
643 | {\r |
c7fd7bb8 |
644 | elprintf(EL_UIO, "s68k unmapped w8 [%06x] %02x @%06x",\r |
645 | a, d & 0xff, SekPc);\r |
af37bca8 |
646 | }\r |
cc68a136 |
647 | \r |
af37bca8 |
648 | static void s68k_unmapped_write16(u32 a, u32 d)\r |
649 | {\r |
c7fd7bb8 |
650 | elprintf(EL_UIO, "s68k unmapped w16 [%06x] %04x @%06x",\r |
651 | a, d & 0xffff, SekPc);\r |
af37bca8 |
652 | }\r |
cc68a136 |
653 | \r |
59991f11 |
654 | // PRG RAM protected range (000000 - 01fdff)?\r |
0ace9b9a |
655 | // XXX verify: ff00 or 1fe00 max?\r |
656 | static void PicoWriteS68k8_prgwp(u32 a, u32 d)\r |
657 | {\r |
59991f11 |
658 | if (a >= (Pico_mcd->s68k_regs[2] << 9))\r |
0ace9b9a |
659 | Pico_mcd->prg_ram[a ^ 1] = d;\r |
660 | }\r |
661 | \r |
662 | static void PicoWriteS68k16_prgwp(u32 a, u32 d)\r |
663 | {\r |
59991f11 |
664 | if (a >= (Pico_mcd->s68k_regs[2] << 9))\r |
0ace9b9a |
665 | *(u16 *)(Pico_mcd->prg_ram + a) = d;\r |
666 | }\r |
667 | \r |
668 | #ifndef _ASM_CD_MEMORY_C\r |
669 | \r |
af37bca8 |
670 | // decode (080000 - 0bffff, in 1M mode)\r |
0ace9b9a |
671 | static u32 PicoReadS68k8_dec0(u32 a)\r |
672 | {\r |
673 | u32 d = Pico_mcd->word_ram1M[0][((a >> 1) ^ 1) & 0x1ffff];\r |
674 | if (a & 1)\r |
675 | d &= 0x0f;\r |
676 | else\r |
677 | d >>= 4;\r |
678 | return d;\r |
679 | }\r |
680 | \r |
681 | static u32 PicoReadS68k8_dec1(u32 a)\r |
af37bca8 |
682 | {\r |
0ace9b9a |
683 | u32 d = Pico_mcd->word_ram1M[1][((a >> 1) ^ 1) & 0x1ffff];\r |
af37bca8 |
684 | if (a & 1)\r |
685 | d &= 0x0f;\r |
686 | else\r |
687 | d >>= 4;\r |
cc68a136 |
688 | return d;\r |
689 | }\r |
690 | \r |
0ace9b9a |
691 | static u32 PicoReadS68k16_dec0(u32 a)\r |
cc68a136 |
692 | {\r |
0ace9b9a |
693 | u32 d = Pico_mcd->word_ram1M[0][((a >> 1) ^ 1) & 0x1ffff];\r |
af37bca8 |
694 | d |= d << 4;\r |
695 | d &= ~0xf0;\r |
cc68a136 |
696 | return d;\r |
697 | }\r |
ab0607f7 |
698 | \r |
0ace9b9a |
699 | static u32 PicoReadS68k16_dec1(u32 a)\r |
0a051f55 |
700 | {\r |
0ace9b9a |
701 | u32 d = Pico_mcd->word_ram1M[1][((a >> 1) ^ 1) & 0x1ffff];\r |
702 | d |= d << 4;\r |
703 | d &= ~0xf0;\r |
704 | return d;\r |
0a051f55 |
705 | }\r |
706 | \r |
0ace9b9a |
707 | /* check: jaguar xj 220 (draws entire world using decode) */\r |
708 | #define mk_decode_w8(bank) \\r |
709 | static void PicoWriteS68k8_dec_m0b##bank(u32 a, u32 d) \\r |
710 | { \\r |
711 | u8 *pd = &Pico_mcd->word_ram1M[bank][((a >> 1) ^ 1) & 0x1ffff]; \\r |
712 | \\r |
713 | if (!(a & 1)) \\r |
714 | *pd = (*pd & 0x0f) | (d << 4); \\r |
715 | else \\r |
716 | *pd = (*pd & 0xf0) | (d & 0x0f); \\r |
717 | } \\r |
718 | \\r |
719 | static void PicoWriteS68k8_dec_m1b##bank(u32 a, u32 d) \\r |
720 | { \\r |
721 | u8 *pd = &Pico_mcd->word_ram1M[bank][((a >> 1) ^ 1) & 0x1ffff]; \\r |
722 | u8 mask = (a & 1) ? 0x0f : 0xf0; \\r |
723 | \\r |
724 | if (!(*pd & mask) && (d & 0x0f)) /* underwrite */ \\r |
725 | PicoWriteS68k8_dec_m0b##bank(a, d); \\r |
726 | } \\r |
727 | \\r |
728 | static void PicoWriteS68k8_dec_m2b##bank(u32 a, u32 d) /* ...and m3? */ \\r |
729 | { \\r |
730 | if (d & 0x0f) /* overwrite */ \\r |
731 | PicoWriteS68k8_dec_m0b##bank(a, d); \\r |
732 | }\r |
0a051f55 |
733 | \r |
0ace9b9a |
734 | mk_decode_w8(0)\r |
735 | mk_decode_w8(1)\r |
736 | \r |
737 | #define mk_decode_w16(bank) \\r |
738 | static void PicoWriteS68k16_dec_m0b##bank(u32 a, u32 d) \\r |
739 | { \\r |
740 | u8 *pd = &Pico_mcd->word_ram1M[bank][((a >> 1) ^ 1) & 0x1ffff]; \\r |
741 | \\r |
742 | d &= 0x0f0f; \\r |
743 | *pd = d | (d >> 4); \\r |
744 | } \\r |
745 | \\r |
746 | static void PicoWriteS68k16_dec_m1b##bank(u32 a, u32 d) \\r |
747 | { \\r |
748 | u8 *pd = &Pico_mcd->word_ram1M[bank][((a >> 1) ^ 1) & 0x1ffff]; \\r |
749 | \\r |
750 | d &= 0x0f0f; /* underwrite */ \\r |
751 | if (!(*pd & 0xf0)) *pd |= d >> 4; \\r |
752 | if (!(*pd & 0x0f)) *pd |= d; \\r |
753 | } \\r |
754 | \\r |
755 | static void PicoWriteS68k16_dec_m2b##bank(u32 a, u32 d) \\r |
756 | { \\r |
757 | u8 *pd = &Pico_mcd->word_ram1M[bank][((a >> 1) ^ 1) & 0x1ffff]; \\r |
758 | \\r |
759 | d &= 0x0f0f; /* overwrite */ \\r |
760 | d |= d >> 4; \\r |
761 | \\r |
762 | if (!(d & 0xf0)) d |= *pd & 0xf0; \\r |
763 | if (!(d & 0x0f)) d |= *pd & 0x0f; \\r |
764 | *pd = d; \\r |
765 | }\r |
0a051f55 |
766 | \r |
0ace9b9a |
767 | mk_decode_w16(0)\r |
768 | mk_decode_w16(1)\r |
0a051f55 |
769 | \r |
0ace9b9a |
770 | #endif\r |
0a051f55 |
771 | \r |
af37bca8 |
772 | // backup RAM (fe0000 - feffff)\r |
773 | static u32 PicoReadS68k8_bram(u32 a)\r |
774 | {\r |
775 | return Pico_mcd->bram[(a>>1)&0x1fff];\r |
776 | }\r |
cc68a136 |
777 | \r |
af37bca8 |
778 | static u32 PicoReadS68k16_bram(u32 a)\r |
cc68a136 |
779 | {\r |
af37bca8 |
780 | u32 d;\r |
781 | elprintf(EL_ANOMALY, "FIXME: s68k_bram r16: [%06x] @%06x", a, SekPcS68k);\r |
782 | a = (a >> 1) & 0x1fff;\r |
783 | d = Pico_mcd->bram[a++];\r |
784 | d|= Pico_mcd->bram[a++] << 8; // probably wrong, TODO: verify\r |
785 | return d;\r |
786 | }\r |
cc68a136 |
787 | \r |
af37bca8 |
788 | static void PicoWriteS68k8_bram(u32 a, u32 d)\r |
789 | {\r |
790 | Pico_mcd->bram[(a >> 1) & 0x1fff] = d;\r |
791 | SRam.changed = 1;\r |
792 | }\r |
cc68a136 |
793 | \r |
af37bca8 |
794 | static void PicoWriteS68k16_bram(u32 a, u32 d)\r |
795 | {\r |
796 | elprintf(EL_ANOMALY, "s68k_bram w16: [%06x] %04x @%06x", a, d, SekPcS68k);\r |
797 | a = (a >> 1) & 0x1fff;\r |
798 | Pico_mcd->bram[a++] = d;\r |
799 | Pico_mcd->bram[a++] = d >> 8; // TODO: verify..\r |
800 | SRam.changed = 1;\r |
801 | }\r |
b5e5172d |
802 | \r |
0ace9b9a |
803 | #ifndef _ASM_CD_MEMORY_C\r |
804 | \r |
af37bca8 |
805 | // PCM and registers (ff0000 - ffffff)\r |
806 | static u32 PicoReadS68k8_pr(u32 a)\r |
807 | {\r |
808 | u32 d = 0;\r |
cc68a136 |
809 | \r |
810 | // regs\r |
af37bca8 |
811 | if ((a & 0xfe00) == 0x8000) {\r |
cb4a513a |
812 | a &= 0x1ff;\r |
af37bca8 |
813 | if (a >= 0x0e && a < 0x30) {\r |
814 | d = Pico_mcd->s68k_regs[a];\r |
30e8aac4 |
815 | s68k_poll_detect(a & ~1, d);\r |
ba6e8bfd |
816 | goto regs_done;\r |
d0d47c5b |
817 | }\r |
af37bca8 |
818 | else if (a >= 0x58 && a < 0x68)\r |
819 | d = gfx_cd_read(a & ~1);\r |
820 | else d = s68k_reg_read16(a & ~1);\r |
821 | if (!(a & 1))\r |
822 | d >>= 8;\r |
ba6e8bfd |
823 | \r |
824 | regs_done:\r |
825 | d &= 0xff;\r |
cc5ffc3c |
826 | elprintf(EL_CDREGS, "s68k_regs r8: [%02x] %02x @%06x",\r |
ba6e8bfd |
827 | a, d, SekPcS68k);\r |
828 | return d;\r |
d0d47c5b |
829 | }\r |
830 | \r |
4f265db7 |
831 | // PCM\r |
0ace9b9a |
832 | // XXX: verify: probably odd addrs only?\r |
af37bca8 |
833 | if ((a & 0x8000) == 0x0000) {\r |
4f265db7 |
834 | a &= 0x7fff;\r |
835 | if (a >= 0x2000)\r |
af37bca8 |
836 | d = Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a >> 1) & 0xfff];\r |
837 | else if (a >= 0x20) {\r |
838 | a &= 0x1e;\r |
839 | d = Pico_mcd->pcm.ch[a>>2].addr >> PCM_STEP_SHIFT;\r |
840 | if (a & 2)\r |
841 | d >>= 8;\r |
842 | }\r |
843 | return d & 0xff;\r |
ab0607f7 |
844 | }\r |
845 | \r |
af37bca8 |
846 | return s68k_unmapped_read8(a);\r |
cc68a136 |
847 | }\r |
848 | \r |
af37bca8 |
849 | static u32 PicoReadS68k16_pr(u32 a)\r |
cc68a136 |
850 | {\r |
af37bca8 |
851 | u32 d = 0;\r |
cc68a136 |
852 | \r |
853 | // regs\r |
af37bca8 |
854 | if ((a & 0xfe00) == 0x8000) {\r |
cb4a513a |
855 | a &= 0x1fe;\r |
af37bca8 |
856 | if (0x58 <= a && a < 0x68)\r |
857 | d = gfx_cd_read(a);\r |
858 | else d = s68k_reg_read16(a);\r |
ba6e8bfd |
859 | \r |
cc5ffc3c |
860 | elprintf(EL_CDREGS, "s68k_regs r16: [%02x] %04x @%06x",\r |
ba6e8bfd |
861 | a, d, SekPcS68k);\r |
af37bca8 |
862 | return d;\r |
cc68a136 |
863 | }\r |
864 | \r |
af37bca8 |
865 | // PCM\r |
866 | if ((a & 0x8000) == 0x0000) {\r |
867 | //elprintf(EL_ANOMALY, "FIXME: s68k_pcm r16: [%06x] @%06x", a, SekPcS68k);\r |
868 | a &= 0x7fff;\r |
869 | if (a >= 0x2000)\r |
870 | d = Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff];\r |
871 | else if (a >= 0x20) {\r |
872 | a &= 0x1e;\r |
873 | d = Pico_mcd->pcm.ch[a>>2].addr >> PCM_STEP_SHIFT;\r |
874 | if (a & 2) d >>= 8;\r |
d0d47c5b |
875 | }\r |
af37bca8 |
876 | elprintf(EL_CDREGS, "ret = %04x", d);\r |
877 | return d;\r |
d0d47c5b |
878 | }\r |
879 | \r |
af37bca8 |
880 | return s68k_unmapped_read16(a);\r |
881 | }\r |
882 | \r |
883 | static void PicoWriteS68k8_pr(u32 a, u32 d)\r |
884 | {\r |
885 | // regs\r |
886 | if ((a & 0xfe00) == 0x8000) {\r |
887 | a &= 0x1ff;\r |
cc5ffc3c |
888 | elprintf(EL_CDREGS, "s68k_regs w8: [%02x] %02x @%06x", a, d, SekPcS68k);\r |
af37bca8 |
889 | if (0x58 <= a && a < 0x68)\r |
890 | gfx_cd_write16(a&~1, (d<<8)|d);\r |
891 | else s68k_reg_write8(a,d);\r |
d0d47c5b |
892 | return;\r |
893 | }\r |
894 | \r |
4f265db7 |
895 | // PCM\r |
af37bca8 |
896 | if ((a & 0x8000) == 0x0000) {\r |
4f265db7 |
897 | a &= 0x7fff;\r |
898 | if (a >= 0x2000)\r |
899 | Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff] = d;\r |
900 | else if (a < 0x12)\r |
af37bca8 |
901 | pcm_write(a>>1, d);\r |
ab0607f7 |
902 | return;\r |
903 | }\r |
904 | \r |
af37bca8 |
905 | s68k_unmapped_write8(a, d);\r |
cc68a136 |
906 | }\r |
ab0607f7 |
907 | \r |
af37bca8 |
908 | static void PicoWriteS68k16_pr(u32 a, u32 d)\r |
cc68a136 |
909 | {\r |
cc68a136 |
910 | // regs\r |
af37bca8 |
911 | if ((a & 0xfe00) == 0x8000) {\r |
cb4a513a |
912 | a &= 0x1fe;\r |
cc5ffc3c |
913 | elprintf(EL_CDREGS, "s68k_regs w16: [%02x] %04x @%06x", a, d, SekPcS68k);\r |
af37bca8 |
914 | if (a >= 0x58 && a < 0x68)\r |
915 | gfx_cd_write16(a, d);\r |
916 | else {\r |
917 | if (a == 0xe) {\r |
918 | // special case, 2 byte writes would be handled differently\r |
919 | // TODO: verify\r |
920 | Pico_mcd->s68k_regs[0xf] = d;\r |
921 | return;\r |
922 | }\r |
923 | s68k_reg_write8(a, d >> 8);\r |
924 | s68k_reg_write8(a + 1, d & 0xff);\r |
d0d47c5b |
925 | }\r |
926 | return;\r |
927 | }\r |
928 | \r |
4f265db7 |
929 | // PCM\r |
af37bca8 |
930 | if ((a & 0x8000) == 0x0000) {\r |
4f265db7 |
931 | a &= 0x7fff;\r |
af37bca8 |
932 | if (a >= 0x2000)\r |
933 | Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff] = d;\r |
934 | else if (a < 0x12)\r |
935 | pcm_write(a>>1, d & 0xff);\r |
ab0607f7 |
936 | return;\r |
937 | }\r |
938 | \r |
af37bca8 |
939 | s68k_unmapped_write16(a, d);\r |
cc68a136 |
940 | }\r |
cc68a136 |
941 | \r |
0ace9b9a |
942 | #endif\r |
943 | \r |
944 | static const void *m68k_cell_read8[] = { PicoReadM68k8_cell0, PicoReadM68k8_cell1 };\r |
945 | static const void *m68k_cell_read16[] = { PicoReadM68k16_cell0, PicoReadM68k16_cell1 };\r |
946 | static const void *m68k_cell_write8[] = { PicoWriteM68k8_cell0, PicoWriteM68k8_cell1 };\r |
947 | static const void *m68k_cell_write16[] = { PicoWriteM68k16_cell0, PicoWriteM68k16_cell1 };\r |
948 | \r |
949 | static const void *s68k_dec_read8[] = { PicoReadS68k8_dec0, PicoReadS68k8_dec1 };\r |
950 | static const void *s68k_dec_read16[] = { PicoReadS68k16_dec0, PicoReadS68k16_dec1 };\r |
951 | \r |
952 | static const void *s68k_dec_write8[2][4] = {\r |
953 | { PicoWriteS68k8_dec_m0b0, PicoWriteS68k8_dec_m1b0, PicoWriteS68k8_dec_m2b0, PicoWriteS68k8_dec_m2b0 },\r |
954 | { PicoWriteS68k8_dec_m0b1, PicoWriteS68k8_dec_m1b1, PicoWriteS68k8_dec_m2b1, PicoWriteS68k8_dec_m2b1 },\r |
955 | };\r |
956 | \r |
957 | static const void *s68k_dec_write16[2][4] = {\r |
958 | { PicoWriteS68k16_dec_m0b0, PicoWriteS68k16_dec_m1b0, PicoWriteS68k16_dec_m2b0, PicoWriteS68k16_dec_m2b0 },\r |
959 | { PicoWriteS68k16_dec_m0b1, PicoWriteS68k16_dec_m1b1, PicoWriteS68k16_dec_m2b1, PicoWriteS68k16_dec_m2b1 },\r |
960 | };\r |
961 | \r |
cc68a136 |
962 | // -----------------------------------------------------------------\r |
963 | \r |
4fb43555 |
964 | static void remap_prg_window(u32 r1, u32 r3)\r |
3aa1e148 |
965 | {\r |
af37bca8 |
966 | // PRG RAM\r |
4fb43555 |
967 | if (r1 & 2) {\r |
968 | void *bank = Pico_mcd->prg_ram_b[(r3 >> 6) & 3];\r |
af37bca8 |
969 | cpu68k_map_all_ram(0x020000, 0x03ffff, bank, 0);\r |
970 | }\r |
971 | else {\r |
972 | m68k_map_unmap(0x020000, 0x03ffff);\r |
973 | }\r |
0ace9b9a |
974 | }\r |
975 | \r |
4fb43555 |
976 | static void remap_word_ram(u32 r3)\r |
0ace9b9a |
977 | {\r |
978 | void *bank;\r |
af37bca8 |
979 | \r |
980 | // WORD RAM\r |
981 | if (!(r3 & 4)) {\r |
982 | // 2M mode. XXX: allowing access in all cases for simplicity\r |
983 | bank = Pico_mcd->word_ram2M;\r |
984 | cpu68k_map_all_ram(0x200000, 0x23ffff, bank, 0);\r |
985 | cpu68k_map_all_ram(0x080000, 0x0bffff, bank, 1);\r |
986 | // TODO: handle 0x0c0000\r |
987 | }\r |
988 | else {\r |
0ace9b9a |
989 | int b0 = r3 & 1;\r |
990 | int m = (r3 & 0x18) >> 3;\r |
991 | bank = Pico_mcd->word_ram1M[b0];\r |
af37bca8 |
992 | cpu68k_map_all_ram(0x200000, 0x21ffff, bank, 0);\r |
0ace9b9a |
993 | bank = Pico_mcd->word_ram1M[b0 ^ 1];\r |
af37bca8 |
994 | cpu68k_map_all_ram(0x0c0000, 0x0effff, bank, 1);\r |
995 | // "cell arrange" on m68k\r |
0ace9b9a |
996 | cpu68k_map_set(m68k_read8_map, 0x220000, 0x23ffff, m68k_cell_read8[b0], 1);\r |
997 | cpu68k_map_set(m68k_read16_map, 0x220000, 0x23ffff, m68k_cell_read16[b0], 1);\r |
998 | cpu68k_map_set(m68k_write8_map, 0x220000, 0x23ffff, m68k_cell_write8[b0], 1);\r |
999 | cpu68k_map_set(m68k_write16_map, 0x220000, 0x23ffff, m68k_cell_write16[b0], 1);\r |
af37bca8 |
1000 | // "decode format" on s68k\r |
0ace9b9a |
1001 | cpu68k_map_set(s68k_read8_map, 0x080000, 0x0bffff, s68k_dec_read8[b0 ^ 1], 1);\r |
1002 | cpu68k_map_set(s68k_read16_map, 0x080000, 0x0bffff, s68k_dec_read16[b0 ^ 1], 1);\r |
1003 | cpu68k_map_set(s68k_write8_map, 0x080000, 0x0bffff, s68k_dec_write8[b0 ^ 1][m], 1);\r |
1004 | cpu68k_map_set(s68k_write16_map, 0x080000, 0x0bffff, s68k_dec_write16[b0 ^ 1][m], 1);\r |
af37bca8 |
1005 | }\r |
1006 | \r |
3aa1e148 |
1007 | #ifdef EMU_F68K\r |
1008 | // update fetchmap..\r |
1009 | int i;\r |
1010 | if (!(r3 & 4))\r |
1011 | {\r |
1012 | for (i = M68K_FETCHBANK1*2/16; (i<<(24-FAMEC_FETCHBITS)) < 0x240000; i++)\r |
be26eb23 |
1013 | PicoCpuFM68k.Fetch[i] = (unsigned long)Pico_mcd->word_ram2M - 0x200000;\r |
3aa1e148 |
1014 | }\r |
1015 | else\r |
1016 | {\r |
1017 | for (i = M68K_FETCHBANK1*2/16; (i<<(24-FAMEC_FETCHBITS)) < 0x220000; i++)\r |
be26eb23 |
1018 | PicoCpuFM68k.Fetch[i] = (unsigned long)Pico_mcd->word_ram1M[r3 & 1] - 0x200000;\r |
3aa1e148 |
1019 | for (i = M68K_FETCHBANK1*0x0c/0x100; (i<<(24-FAMEC_FETCHBITS)) < 0x0e0000; i++)\r |
be26eb23 |
1020 | PicoCpuFS68k.Fetch[i] = (unsigned long)Pico_mcd->word_ram1M[(r3&1)^1] - 0x0c0000;\r |
3aa1e148 |
1021 | }\r |
1022 | #endif\r |
1023 | }\r |
b837b69b |
1024 | \r |
ae214f1c |
1025 | void pcd_state_loaded_mem(void)\r |
0ace9b9a |
1026 | {\r |
4fb43555 |
1027 | u32 r3 = Pico_mcd->s68k_regs[3];\r |
0ace9b9a |
1028 | \r |
1029 | /* after load events */\r |
1030 | if (r3 & 4) // 1M mode?\r |
1031 | wram_2M_to_1M(Pico_mcd->word_ram2M);\r |
1032 | remap_word_ram(r3);\r |
4fb43555 |
1033 | remap_prg_window(Pico_mcd->m.busreq, r3);\r |
ba6e8bfd |
1034 | Pico_mcd->m.dmna_ret_2m &= 3;\r |
0ace9b9a |
1035 | \r |
1036 | // restore hint vector\r |
1037 | *(unsigned short *)(Pico_mcd->bios + 0x72) = Pico_mcd->m.hint_vector;\r |
1038 | }\r |
1039 | \r |
9037e45d |
1040 | #ifdef EMU_M68K\r |
1041 | static void m68k_mem_setup_cd(void);\r |
1042 | #endif\r |
1043 | \r |
eff55556 |
1044 | PICO_INTERNAL void PicoMemSetupCD(void)\r |
b837b69b |
1045 | {\r |
af37bca8 |
1046 | // setup default main68k map\r |
1047 | PicoMemSetup();\r |
1048 | \r |
af37bca8 |
1049 | // main68k map (BIOS mapped by PicoMemSetup()):\r |
1050 | // RAM cart\r |
1051 | if (PicoOpt & POPT_EN_MCD_RAMCART) {\r |
1052 | cpu68k_map_set(m68k_read8_map, 0x400000, 0x7fffff, PicoReadM68k8_ramc, 1);\r |
1053 | cpu68k_map_set(m68k_read16_map, 0x400000, 0x7fffff, PicoReadM68k16_ramc, 1);\r |
1054 | cpu68k_map_set(m68k_write8_map, 0x400000, 0x7fffff, PicoWriteM68k8_ramc, 1);\r |
1055 | cpu68k_map_set(m68k_write16_map, 0x400000, 0x7fffff, PicoWriteM68k16_ramc, 1);\r |
1056 | }\r |
1057 | \r |
1058 | // registers/IO:\r |
fa8fb754 |
1059 | cpu68k_map_set(m68k_read8_map, 0xa10000, 0xa1ffff, PicoRead8_mcd_io, 1);\r |
1060 | cpu68k_map_set(m68k_read16_map, 0xa10000, 0xa1ffff, PicoRead16_mcd_io, 1);\r |
1061 | cpu68k_map_set(m68k_write8_map, 0xa10000, 0xa1ffff, PicoWrite8_mcd_io, 1);\r |
1062 | cpu68k_map_set(m68k_write16_map, 0xa10000, 0xa1ffff, PicoWrite16_mcd_io, 1);\r |
af37bca8 |
1063 | \r |
1064 | // sub68k map\r |
1065 | cpu68k_map_set(s68k_read8_map, 0x000000, 0xffffff, s68k_unmapped_read8, 1);\r |
1066 | cpu68k_map_set(s68k_read16_map, 0x000000, 0xffffff, s68k_unmapped_read16, 1);\r |
1067 | cpu68k_map_set(s68k_write8_map, 0x000000, 0xffffff, s68k_unmapped_write8, 1);\r |
1068 | cpu68k_map_set(s68k_write16_map, 0x000000, 0xffffff, s68k_unmapped_write16, 1);\r |
1069 | \r |
1070 | // PRG RAM\r |
1071 | cpu68k_map_set(s68k_read8_map, 0x000000, 0x07ffff, Pico_mcd->prg_ram, 0);\r |
1072 | cpu68k_map_set(s68k_read16_map, 0x000000, 0x07ffff, Pico_mcd->prg_ram, 0);\r |
1073 | cpu68k_map_set(s68k_write8_map, 0x000000, 0x07ffff, Pico_mcd->prg_ram, 0);\r |
1074 | cpu68k_map_set(s68k_write16_map, 0x000000, 0x07ffff, Pico_mcd->prg_ram, 0);\r |
59991f11 |
1075 | cpu68k_map_set(s68k_write8_map, 0x000000, 0x01ffff, PicoWriteS68k8_prgwp, 1);\r |
1076 | cpu68k_map_set(s68k_write16_map, 0x000000, 0x01ffff, PicoWriteS68k16_prgwp, 1);\r |
af37bca8 |
1077 | \r |
1078 | // BRAM\r |
1079 | cpu68k_map_set(s68k_read8_map, 0xfe0000, 0xfeffff, PicoReadS68k8_bram, 1);\r |
1080 | cpu68k_map_set(s68k_read16_map, 0xfe0000, 0xfeffff, PicoReadS68k16_bram, 1);\r |
1081 | cpu68k_map_set(s68k_write8_map, 0xfe0000, 0xfeffff, PicoWriteS68k8_bram, 1);\r |
1082 | cpu68k_map_set(s68k_write16_map, 0xfe0000, 0xfeffff, PicoWriteS68k16_bram, 1);\r |
1083 | \r |
1084 | // PCM, regs\r |
1085 | cpu68k_map_set(s68k_read8_map, 0xff0000, 0xffffff, PicoReadS68k8_pr, 1);\r |
1086 | cpu68k_map_set(s68k_read16_map, 0xff0000, 0xffffff, PicoReadS68k16_pr, 1);\r |
1087 | cpu68k_map_set(s68k_write8_map, 0xff0000, 0xffffff, PicoWriteS68k8_pr, 1);\r |
1088 | cpu68k_map_set(s68k_write16_map, 0xff0000, 0xffffff, PicoWriteS68k16_pr, 1);\r |
f53f286a |
1089 | \r |
0ace9b9a |
1090 | // RAMs\r |
1091 | remap_word_ram(1);\r |
1092 | \r |
b837b69b |
1093 | #ifdef EMU_C68K\r |
b837b69b |
1094 | // s68k\r |
5e89f0f5 |
1095 | PicoCpuCS68k.read8 = (void *)s68k_read8_map;\r |
1096 | PicoCpuCS68k.read16 = (void *)s68k_read16_map;\r |
1097 | PicoCpuCS68k.read32 = (void *)s68k_read16_map;\r |
1098 | PicoCpuCS68k.write8 = (void *)s68k_write8_map;\r |
1099 | PicoCpuCS68k.write16 = (void *)s68k_write16_map;\r |
1100 | PicoCpuCS68k.write32 = (void *)s68k_write16_map;\r |
1101 | PicoCpuCS68k.checkpc = NULL; /* unused */\r |
1102 | PicoCpuCS68k.fetch8 = NULL;\r |
1103 | PicoCpuCS68k.fetch16 = NULL;\r |
1104 | PicoCpuCS68k.fetch32 = NULL;\r |
b837b69b |
1105 | #endif\r |
3aa1e148 |
1106 | #ifdef EMU_F68K\r |
3aa1e148 |
1107 | // s68k\r |
af37bca8 |
1108 | PicoCpuFS68k.read_byte = s68k_read8;\r |
1109 | PicoCpuFS68k.read_word = s68k_read16;\r |
1110 | PicoCpuFS68k.read_long = s68k_read32;\r |
1111 | PicoCpuFS68k.write_byte = s68k_write8;\r |
1112 | PicoCpuFS68k.write_word = s68k_write16;\r |
1113 | PicoCpuFS68k.write_long = s68k_write32;\r |
3aa1e148 |
1114 | \r |
1115 | // setup FAME fetchmap\r |
1116 | {\r |
1117 | int i;\r |
1118 | // M68k\r |
1119 | // by default, point everything to fitst 64k of ROM (BIOS)\r |
1120 | for (i = 0; i < M68K_FETCHBANK1; i++)\r |
be26eb23 |
1121 | PicoCpuFM68k.Fetch[i] = (unsigned long)Pico.rom - (i<<(24-FAMEC_FETCHBITS));\r |
3aa1e148 |
1122 | // now real ROM (BIOS)\r |
1123 | for (i = 0; i < M68K_FETCHBANK1 && (i<<(24-FAMEC_FETCHBITS)) < Pico.romsize; i++)\r |
be26eb23 |
1124 | PicoCpuFM68k.Fetch[i] = (unsigned long)Pico.rom;\r |
3aa1e148 |
1125 | // .. and RAM\r |
1126 | for (i = M68K_FETCHBANK1*14/16; i < M68K_FETCHBANK1; i++)\r |
be26eb23 |
1127 | PicoCpuFM68k.Fetch[i] = (unsigned long)Pico.ram - (i<<(24-FAMEC_FETCHBITS));\r |
3aa1e148 |
1128 | // S68k\r |
1129 | // PRG RAM is default\r |
1130 | for (i = 0; i < M68K_FETCHBANK1; i++)\r |
be26eb23 |
1131 | PicoCpuFS68k.Fetch[i] = (unsigned long)Pico_mcd->prg_ram - (i<<(24-FAMEC_FETCHBITS));\r |
3aa1e148 |
1132 | // real PRG RAM\r |
1133 | for (i = 0; i < M68K_FETCHBANK1 && (i<<(24-FAMEC_FETCHBITS)) < 0x80000; i++)\r |
be26eb23 |
1134 | PicoCpuFS68k.Fetch[i] = (unsigned long)Pico_mcd->prg_ram;\r |
3aa1e148 |
1135 | // WORD RAM 2M area\r |
1136 | for (i = M68K_FETCHBANK1*0x08/0x100; i < M68K_FETCHBANK1 && (i<<(24-FAMEC_FETCHBITS)) < 0xc0000; i++)\r |
be26eb23 |
1137 | PicoCpuFS68k.Fetch[i] = (unsigned long)Pico_mcd->word_ram2M - 0x80000;\r |
0ace9b9a |
1138 | // remap_word_ram() will setup word ram for both\r |
3aa1e148 |
1139 | }\r |
1140 | #endif\r |
9037e45d |
1141 | #ifdef EMU_M68K\r |
1142 | m68k_mem_setup_cd();\r |
1143 | #endif\r |
b837b69b |
1144 | }\r |
1145 | \r |
1146 | \r |
cc68a136 |
1147 | #ifdef EMU_M68K\r |
af37bca8 |
1148 | u32 m68k_read8(u32 a);\r |
1149 | u32 m68k_read16(u32 a);\r |
1150 | u32 m68k_read32(u32 a);\r |
1151 | void m68k_write8(u32 a, u8 d);\r |
1152 | void m68k_write16(u32 a, u16 d);\r |
1153 | void m68k_write32(u32 a, u32 d);\r |
1154 | \r |
9037e45d |
1155 | static unsigned int PicoReadCD8w (unsigned int a) {\r |
af37bca8 |
1156 | return m68ki_cpu_p == &PicoCpuMS68k ? s68k_read8(a) : m68k_read8(a);\r |
cc68a136 |
1157 | }\r |
9037e45d |
1158 | static unsigned int PicoReadCD16w(unsigned int a) {\r |
af37bca8 |
1159 | return m68ki_cpu_p == &PicoCpuMS68k ? s68k_read16(a) : m68k_read16(a);\r |
cc68a136 |
1160 | }\r |
9037e45d |
1161 | static unsigned int PicoReadCD32w(unsigned int a) {\r |
af37bca8 |
1162 | return m68ki_cpu_p == &PicoCpuMS68k ? s68k_read32(a) : m68k_read32(a);\r |
cc68a136 |
1163 | }\r |
9037e45d |
1164 | static void PicoWriteCD8w (unsigned int a, unsigned char d) {\r |
af37bca8 |
1165 | if (m68ki_cpu_p == &PicoCpuMS68k) s68k_write8(a, d); else m68k_write8(a, d);\r |
cc68a136 |
1166 | }\r |
9037e45d |
1167 | static void PicoWriteCD16w(unsigned int a, unsigned short d) {\r |
af37bca8 |
1168 | if (m68ki_cpu_p == &PicoCpuMS68k) s68k_write16(a, d); else m68k_write16(a, d);\r |
cc68a136 |
1169 | }\r |
9037e45d |
1170 | static void PicoWriteCD32w(unsigned int a, unsigned int d) {\r |
af37bca8 |
1171 | if (m68ki_cpu_p == &PicoCpuMS68k) s68k_write32(a, d); else m68k_write32(a, d);\r |
cc68a136 |
1172 | }\r |
1173 | \r |
9037e45d |
1174 | extern unsigned int (*pm68k_read_memory_8) (unsigned int address);\r |
1175 | extern unsigned int (*pm68k_read_memory_16)(unsigned int address);\r |
1176 | extern unsigned int (*pm68k_read_memory_32)(unsigned int address);\r |
1177 | extern void (*pm68k_write_memory_8) (unsigned int address, unsigned char value);\r |
1178 | extern void (*pm68k_write_memory_16)(unsigned int address, unsigned short value);\r |
1179 | extern void (*pm68k_write_memory_32)(unsigned int address, unsigned int value);\r |
9037e45d |
1180 | \r |
1181 | static void m68k_mem_setup_cd(void)\r |
1182 | {\r |
1183 | pm68k_read_memory_8 = PicoReadCD8w;\r |
1184 | pm68k_read_memory_16 = PicoReadCD16w;\r |
1185 | pm68k_read_memory_32 = PicoReadCD32w;\r |
1186 | pm68k_write_memory_8 = PicoWriteCD8w;\r |
1187 | pm68k_write_memory_16 = PicoWriteCD16w;\r |
1188 | pm68k_write_memory_32 = PicoWriteCD32w;\r |
9037e45d |
1189 | }\r |
cc68a136 |
1190 | #endif // EMU_M68K\r |
1191 | \r |
ae214f1c |
1192 | // vim:shiftwidth=2:ts=2:expandtab\r |