cff531af |
1 | /*\r |
2 | * PicoDrive\r |
3 | * (c) Copyright Dave, 2004\r |
4 | * (C) notaz, 2006-2009\r |
5 | *\r |
6 | * This work is licensed under the terms of MAME license.\r |
7 | * See COPYING file in the top-level directory.\r |
8 | */\r |
cc68a136 |
9 | \r |
efcba75f |
10 | #include "pico_int.h"\r |
488c0bbf |
11 | #include "memory.h"\r |
cc68a136 |
12 | \r |
13 | \r |
ae214f1c |
14 | unsigned int SekCycleCnt;\r |
15 | unsigned int SekCycleAim;\r |
cc68a136 |
16 | \r |
70357ce5 |
17 | \r |
18 | /* context */\r |
19 | // Cyclone 68000\r |
cc68a136 |
20 | #ifdef EMU_C68K\r |
3aa1e148 |
21 | struct Cyclone PicoCpuCM68k;\r |
cc68a136 |
22 | #endif\r |
70357ce5 |
23 | // MUSASHI 68000\r |
cc68a136 |
24 | #ifdef EMU_M68K\r |
3aa1e148 |
25 | m68ki_cpu_core PicoCpuMM68k;\r |
cc68a136 |
26 | #endif\r |
70357ce5 |
27 | // FAME 68000\r |
28 | #ifdef EMU_F68K\r |
3aa1e148 |
29 | M68K_CONTEXT PicoCpuFM68k;\r |
cc68a136 |
30 | #endif\r |
31 | \r |
32 | \r |
70357ce5 |
33 | /* callbacks */\r |
cc68a136 |
34 | #ifdef EMU_C68K\r |
b837b69b |
35 | // interrupt acknowledgment\r |
0af33fe0 |
36 | static int SekIntAck(int level)\r |
cc68a136 |
37 | {\r |
38 | // try to emulate VDP's reaction to 68000 int ack\r |
69996cb7 |
39 | if (level == 4) { Pico.video.pending_ints = 0; elprintf(EL_INTS, "hack: @ %06x [%i]", SekPc, SekCycleCnt); }\r |
40 | else if(level == 6) { Pico.video.pending_ints &= ~0x20; elprintf(EL_INTS, "vack: @ %06x [%i]", SekPc, SekCycleCnt); }\r |
3aa1e148 |
41 | PicoCpuCM68k.irq = 0;\r |
0af33fe0 |
42 | return CYCLONE_INT_ACK_AUTOVECTOR;\r |
cc68a136 |
43 | }\r |
44 | \r |
69996cb7 |
45 | static void SekResetAck(void)\r |
cc68a136 |
46 | {\r |
69996cb7 |
47 | elprintf(EL_ANOMALY, "Reset encountered @ %06x", SekPc);\r |
cc68a136 |
48 | }\r |
49 | \r |
50 | static int SekUnrecognizedOpcode()\r |
51 | {\r |
b4db550e |
52 | unsigned int pc;\r |
cc68a136 |
53 | pc = SekPc;\r |
b4db550e |
54 | elprintf(EL_ANOMALY, "Unrecognized Opcode @ %06x", pc);\r |
55 | // see if we are still in a mapped region\r |
56 | pc &= 0x00ffffff;\r |
57 | if (map_flag_set(m68k_read16_map[pc >> M68K_MEM_SHIFT])) {\r |
58 | elprintf(EL_STATUS|EL_ANOMALY, "m68k crash @%06x", pc);\r |
3aa1e148 |
59 | PicoCpuCM68k.cycles = 0;\r |
60 | PicoCpuCM68k.state_flags |= 1;\r |
cc68a136 |
61 | return 1;\r |
62 | }\r |
2b15cea8 |
63 | // happened once - may happen again\r |
64 | SekFinishIdleDet();\r |
2d0b15bb |
65 | #ifdef EMU_M68K // debugging cyclone\r |
66 | {\r |
67 | extern int have_illegal;\r |
68 | have_illegal = 1;\r |
69 | }\r |
70 | #endif\r |
cc68a136 |
71 | return 0;\r |
72 | }\r |
73 | #endif\r |
74 | \r |
75 | \r |
76 | #ifdef EMU_M68K\r |
77 | static int SekIntAckM68K(int level)\r |
78 | {\r |
69996cb7 |
79 | if (level == 4) { Pico.video.pending_ints = 0; elprintf(EL_INTS, "hack: @ %06x [%i]", SekPc, SekCycleCnt); }\r |
80 | else if(level == 6) { Pico.video.pending_ints &= ~0x20; elprintf(EL_INTS, "vack: @ %06x [%i]", SekPc, SekCycleCnt); }\r |
cc68a136 |
81 | CPU_INT_LEVEL = 0;\r |
82 | return M68K_INT_ACK_AUTOVECTOR;\r |
83 | }\r |
0af33fe0 |
84 | \r |
85 | static int SekTasCallback(void)\r |
86 | {\r |
87 | return 0; // no writeback\r |
88 | }\r |
cc68a136 |
89 | #endif\r |
90 | \r |
91 | \r |
70357ce5 |
92 | #ifdef EMU_F68K\r |
3aa1e148 |
93 | static void SekIntAckF68K(unsigned level)\r |
70357ce5 |
94 | {\r |
c7fd7bb8 |
95 | if (level == 4) {\r |
96 | Pico.video.pending_ints = 0;\r |
97 | elprintf(EL_INTS, "hack: @ %06x [%i]", SekPc, SekCyclesDone());\r |
98 | }\r |
99 | else if(level == 6) {\r |
100 | Pico.video.pending_ints &= ~0x20;\r |
101 | elprintf(EL_INTS, "vack: @ %06x [%i]", SekPc, SekCyclesDone());\r |
102 | }\r |
3aa1e148 |
103 | PicoCpuFM68k.interrupts[0] = 0;\r |
70357ce5 |
104 | }\r |
105 | #endif\r |
106 | \r |
cc68a136 |
107 | \r |
2aa27095 |
108 | PICO_INTERNAL void SekInit(void)\r |
cc68a136 |
109 | {\r |
110 | #ifdef EMU_C68K\r |
111 | CycloneInit();\r |
3aa1e148 |
112 | memset(&PicoCpuCM68k,0,sizeof(PicoCpuCM68k));\r |
113 | PicoCpuCM68k.IrqCallback=SekIntAck;\r |
114 | PicoCpuCM68k.ResetCallback=SekResetAck;\r |
115 | PicoCpuCM68k.UnrecognizedCallback=SekUnrecognizedOpcode;\r |
03e4f2a3 |
116 | PicoCpuCM68k.flags=4; // Z set\r |
cc68a136 |
117 | #endif\r |
cc68a136 |
118 | #ifdef EMU_M68K\r |
119 | {\r |
120 | void *oldcontext = m68ki_cpu_p;\r |
3aa1e148 |
121 | m68k_set_context(&PicoCpuMM68k);\r |
cc68a136 |
122 | m68k_set_cpu_type(M68K_CPU_TYPE_68000);\r |
123 | m68k_init();\r |
124 | m68k_set_int_ack_callback(SekIntAckM68K);\r |
0af33fe0 |
125 | m68k_set_tas_instr_callback(SekTasCallback);\r |
9037e45d |
126 | //m68k_pulse_reset();\r |
cc68a136 |
127 | m68k_set_context(oldcontext);\r |
128 | }\r |
129 | #endif\r |
70357ce5 |
130 | #ifdef EMU_F68K\r |
131 | {\r |
132 | void *oldcontext = g_m68kcontext;\r |
3aa1e148 |
133 | g_m68kcontext = &PicoCpuFM68k;\r |
134 | memset(&PicoCpuFM68k, 0, sizeof(PicoCpuFM68k));\r |
03e4f2a3 |
135 | fm68k_init();\r |
3aa1e148 |
136 | PicoCpuFM68k.iack_handler = SekIntAckF68K;\r |
b5e5172d |
137 | PicoCpuFM68k.sr = 0x2704; // Z flag\r |
70357ce5 |
138 | g_m68kcontext = oldcontext;\r |
139 | }\r |
140 | #endif\r |
cc68a136 |
141 | }\r |
142 | \r |
70357ce5 |
143 | \r |
cc68a136 |
144 | // Reset the 68000:\r |
2aa27095 |
145 | PICO_INTERNAL int SekReset(void)\r |
cc68a136 |
146 | {\r |
147 | if (Pico.rom==NULL) return 1;\r |
148 | \r |
149 | #ifdef EMU_C68K\r |
5e89f0f5 |
150 | CycloneReset(&PicoCpuCM68k);\r |
cc68a136 |
151 | #endif\r |
cc68a136 |
152 | #ifdef EMU_M68K\r |
3aa1e148 |
153 | m68k_set_context(&PicoCpuMM68k); // if we ever reset m68k, we always need it's context to be set\r |
2d0b15bb |
154 | m68ki_cpu.sp[0]=0;\r |
155 | m68k_set_irq(0);\r |
b837b69b |
156 | m68k_pulse_reset();\r |
99464b62 |
157 | REG_USP = 0; // ?\r |
cc68a136 |
158 | #endif\r |
70357ce5 |
159 | #ifdef EMU_F68K\r |
160 | {\r |
3aa1e148 |
161 | g_m68kcontext = &PicoCpuFM68k;\r |
03e4f2a3 |
162 | fm68k_reset();\r |
70357ce5 |
163 | }\r |
164 | #endif\r |
cc68a136 |
165 | \r |
166 | return 0;\r |
167 | }\r |
168 | \r |
5f9a0d16 |
169 | void SekStepM68k(void)\r |
170 | {\r |
171 | SekCycleAim=SekCycleCnt+1;\r |
172 | #if defined(EMU_CORE_DEBUG)\r |
173 | SekCycleCnt+=CM_compareRun(1, 0);\r |
174 | #elif defined(EMU_C68K)\r |
175 | PicoCpuCM68k.cycles=1;\r |
176 | CycloneRun(&PicoCpuCM68k);\r |
177 | SekCycleCnt+=1-PicoCpuCM68k.cycles;\r |
178 | #elif defined(EMU_M68K)\r |
179 | SekCycleCnt+=m68k_execute(1);\r |
180 | #elif defined(EMU_F68K)\r |
99ade2ee |
181 | SekCycleCnt+=fm68k_emulate(1, 0);\r |
5f9a0d16 |
182 | #endif\r |
183 | }\r |
cc68a136 |
184 | \r |
eff55556 |
185 | PICO_INTERNAL void SekSetRealTAS(int use_real)\r |
2433f409 |
186 | {\r |
187 | #ifdef EMU_C68K\r |
188 | CycloneSetRealTAS(use_real);\r |
189 | #endif\r |
70357ce5 |
190 | #ifdef EMU_F68K\r |
191 | // TODO\r |
192 | #endif\r |
2433f409 |
193 | }\r |
194 | \r |
b4db550e |
195 | // Pack the cpu into a common format:\r |
196 | // XXX: rename\r |
197 | PICO_INTERNAL void SekPackCpu(unsigned char *cpu, int is_sub)\r |
198 | {\r |
199 | unsigned int pc=0;\r |
200 | \r |
201 | #if defined(EMU_C68K)\r |
202 | struct Cyclone *context = is_sub ? &PicoCpuCS68k : &PicoCpuCM68k;\r |
203 | memcpy(cpu,context->d,0x40);\r |
204 | pc=context->pc-context->membase;\r |
205 | *(unsigned int *)(cpu+0x44)=CycloneGetSr(context);\r |
206 | *(unsigned int *)(cpu+0x48)=context->osp;\r |
207 | cpu[0x4c] = context->irq;\r |
208 | cpu[0x4d] = context->state_flags & 1;\r |
209 | #elif defined(EMU_M68K)\r |
210 | void *oldcontext = m68ki_cpu_p;\r |
211 | m68k_set_context(is_sub ? &PicoCpuMS68k : &PicoCpuMM68k);\r |
212 | memcpy(cpu,m68ki_cpu_p->dar,0x40);\r |
213 | pc=m68ki_cpu_p->pc;\r |
214 | *(unsigned int *)(cpu+0x44)=m68k_get_reg(NULL, M68K_REG_SR);\r |
215 | *(unsigned int *)(cpu+0x48)=m68ki_cpu_p->sp[m68ki_cpu_p->s_flag^SFLAG_SET];\r |
216 | cpu[0x4c] = CPU_INT_LEVEL>>8;\r |
217 | cpu[0x4d] = CPU_STOPPED;\r |
218 | m68k_set_context(oldcontext);\r |
219 | #elif defined(EMU_F68K)\r |
220 | M68K_CONTEXT *context = is_sub ? &PicoCpuFS68k : &PicoCpuFM68k;\r |
221 | memcpy(cpu,context->dreg,0x40);\r |
222 | pc=context->pc;\r |
223 | *(unsigned int *)(cpu+0x44)=context->sr;\r |
224 | *(unsigned int *)(cpu+0x48)=context->asp;\r |
225 | cpu[0x4c] = context->interrupts[0];\r |
226 | cpu[0x4d] = (context->execinfo & FM68K_HALTED) ? 1 : 0;\r |
227 | #endif\r |
228 | \r |
6a98f03e |
229 | *(unsigned int *)(cpu+0x40) = pc;\r |
ae214f1c |
230 | *(unsigned int *)(cpu+0x50) =\r |
231 | is_sub ? SekCycleCntS68k : SekCycleCnt;\r |
b4db550e |
232 | }\r |
233 | \r |
234 | PICO_INTERNAL void SekUnpackCpu(const unsigned char *cpu, int is_sub)\r |
235 | {\r |
236 | #if defined(EMU_C68K)\r |
237 | struct Cyclone *context = is_sub ? &PicoCpuCS68k : &PicoCpuCM68k;\r |
238 | CycloneSetSr(context, *(unsigned int *)(cpu+0x44));\r |
239 | context->osp=*(unsigned int *)(cpu+0x48);\r |
240 | memcpy(context->d,cpu,0x40);\r |
241 | context->membase = 0;\r |
242 | context->pc = *(unsigned int *)(cpu+0x40);\r |
243 | CycloneUnpack(context, NULL); // rebase PC\r |
244 | context->irq = cpu[0x4c];\r |
245 | context->state_flags = 0;\r |
246 | if (cpu[0x4d])\r |
247 | context->state_flags |= 1;\r |
248 | #elif defined(EMU_M68K)\r |
249 | void *oldcontext = m68ki_cpu_p;\r |
250 | m68k_set_context(is_sub ? &PicoCpuMS68k : &PicoCpuMM68k);\r |
251 | m68k_set_reg(M68K_REG_SR, *(unsigned int *)(cpu+0x44));\r |
252 | memcpy(m68ki_cpu_p->dar,cpu,0x40);\r |
253 | m68ki_cpu_p->pc=*(unsigned int *)(cpu+0x40);\r |
254 | m68ki_cpu_p->sp[m68ki_cpu_p->s_flag^SFLAG_SET]=*(unsigned int *)(cpu+0x48);\r |
255 | CPU_INT_LEVEL = cpu[0x4c] << 8;\r |
256 | CPU_STOPPED = cpu[0x4d];\r |
257 | m68k_set_context(oldcontext);\r |
258 | #elif defined(EMU_F68K)\r |
259 | M68K_CONTEXT *context = is_sub ? &PicoCpuFS68k : &PicoCpuFM68k;\r |
260 | memcpy(context->dreg,cpu,0x40);\r |
261 | context->pc =*(unsigned int *)(cpu+0x40);\r |
262 | context->sr =*(unsigned int *)(cpu+0x44);\r |
263 | context->asp=*(unsigned int *)(cpu+0x48);\r |
264 | context->interrupts[0] = cpu[0x4c];\r |
265 | context->execinfo &= ~FM68K_HALTED;\r |
266 | if (cpu[0x4d]&1) context->execinfo |= FM68K_HALTED;\r |
267 | #endif\r |
ae214f1c |
268 | if (is_sub)\r |
269 | SekCycleCntS68k = *(unsigned int *)(cpu+0x50);\r |
270 | else\r |
271 | SekCycleCnt = *(unsigned int *)(cpu+0x50);\r |
b4db550e |
272 | }\r |
273 | \r |
5f9a0d16 |
274 | \r |
053fd9b4 |
275 | /* idle loop detection, not to be used in CD mode */\r |
276 | #ifdef EMU_C68K\r |
d4d62665 |
277 | #include "cpu/cyclone/tools/idle.h"\r |
053fd9b4 |
278 | #endif\r |
279 | \r |
488c0bbf |
280 | static unsigned short **idledet_ptrs = NULL;\r |
053fd9b4 |
281 | static int idledet_count = 0, idledet_bads = 0;\r |
0219d379 |
282 | static int idledet_start_frame = 0;\r |
053fd9b4 |
283 | \r |
5ed2a20e |
284 | #if 0\r |
285 | #define IDLE_STATS 1\r |
286 | unsigned int idlehit_addrs[128], idlehit_counts[128];\r |
287 | \r |
288 | void SekRegisterIdleHit(unsigned int pc)\r |
289 | {\r |
290 | int i;\r |
291 | for (i = 0; i < 127 && idlehit_addrs[i]; i++) {\r |
292 | if (idlehit_addrs[i] == pc) {\r |
293 | idlehit_counts[i]++;\r |
294 | return;\r |
295 | }\r |
296 | }\r |
297 | idlehit_addrs[i] = pc;\r |
298 | idlehit_counts[i] = 1;\r |
299 | idlehit_addrs[i+1] = 0;\r |
300 | }\r |
301 | #endif\r |
302 | \r |
053fd9b4 |
303 | void SekInitIdleDet(void)\r |
304 | {\r |
488c0bbf |
305 | unsigned short **tmp = realloc(idledet_ptrs, 0x200*4);\r |
053fd9b4 |
306 | if (tmp == NULL) {\r |
488c0bbf |
307 | free(idledet_ptrs);\r |
308 | idledet_ptrs = NULL;\r |
053fd9b4 |
309 | }\r |
310 | else\r |
488c0bbf |
311 | idledet_ptrs = tmp;\r |
053fd9b4 |
312 | idledet_count = idledet_bads = 0;\r |
313 | idledet_start_frame = Pico.m.frame_count + 360;\r |
5ed2a20e |
314 | #ifdef IDLE_STATS\r |
315 | idlehit_addrs[0] = 0;\r |
316 | #endif\r |
053fd9b4 |
317 | \r |
053fd9b4 |
318 | #ifdef EMU_C68K\r |
319 | CycloneInitIdle();\r |
320 | #endif\r |
c060a9ab |
321 | #ifdef EMU_F68K\r |
99ade2ee |
322 | fm68k_emulate(0, 1);\r |
c060a9ab |
323 | #endif\r |
053fd9b4 |
324 | }\r |
325 | \r |
0219d379 |
326 | int SekIsIdleReady(void)\r |
327 | {\r |
328 | return (Pico.m.frame_count >= idledet_start_frame);\r |
329 | }\r |
330 | \r |
053fd9b4 |
331 | int SekIsIdleCode(unsigned short *dst, int bytes)\r |
332 | {\r |
8187ba84 |
333 | // printf("SekIsIdleCode %04x %i\n", *dst, bytes);\r |
053fd9b4 |
334 | switch (bytes)\r |
335 | {\r |
5ed2a20e |
336 | case 2:\r |
337 | if ((*dst & 0xf000) != 0x6000) // not another branch\r |
338 | return 1;\r |
339 | break;\r |
053fd9b4 |
340 | case 4:\r |
0219d379 |
341 | if ( (*dst & 0xff3f) == 0x4a38 || // tst.x ($xxxx.w); tas ($xxxx.w)\r |
342 | (*dst & 0xc1ff) == 0x0038 || // move.x ($xxxx.w), dX\r |
343 | (*dst & 0xf13f) == 0xb038) // cmp.x ($xxxx.w), dX\r |
344 | return 1;\r |
345 | if (PicoAHW & (PAHW_MCD|PAHW_32X))\r |
346 | break;\r |
347 | // with no addons, there should be no need to wait\r |
348 | // for byte change anywhere\r |
349 | if ( (*dst & 0xfff8) == 0x4a10 || // tst.b ($aX)\r |
350 | (*dst & 0xfff8) == 0x4a28) // tst.b ($xxxx,a0)\r |
053fd9b4 |
351 | return 1;\r |
352 | break;\r |
353 | case 6:\r |
b0677887 |
354 | if ( ((dst[1] & 0xe0) == 0xe0 && ( // RAM and\r |
355 | *dst == 0x4a39 || // tst.b ($xxxxxxxx)\r |
356 | *dst == 0x4a79 || // tst.w ($xxxxxxxx)\r |
357 | *dst == 0x4ab9 || // tst.l ($xxxxxxxx)\r |
358 | (*dst & 0xc1ff) == 0x0039 || // move.x ($xxxxxxxx), dX\r |
359 | (*dst & 0xf13f) == 0xb039))||// cmp.x ($xxxxxxxx), dX\r |
360 | *dst == 0x0838 || // btst $X, ($xxxx.w) [6 byte op]\r |
361 | (*dst & 0xffbf) == 0x0c38) // cmpi.{b,w} $X, ($xxxx.w)\r |
053fd9b4 |
362 | return 1;\r |
363 | break;\r |
364 | case 8:\r |
b0677887 |
365 | if ( ((dst[2] & 0xe0) == 0xe0 && ( // RAM and\r |
366 | *dst == 0x0839 || // btst $X, ($xxxxxxxx.w) [8 byte op]\r |
367 | (*dst & 0xffbf) == 0x0c39))||// cmpi.{b,w} $X, ($xxxxxxxx)\r |
368 | *dst == 0x0cb8) // cmpi.l $X, ($xxxx.w)\r |
053fd9b4 |
369 | return 1;\r |
370 | break;\r |
371 | case 12:\r |
0219d379 |
372 | if (PicoAHW & (PAHW_MCD|PAHW_32X))\r |
373 | break;\r |
374 | if ( (*dst & 0xf1f8) == 0x3010 && // move.w (aX), dX\r |
b0677887 |
375 | (dst[1]&0xf100) == 0x0000 && // arithmetic\r |
376 | (dst[3]&0xf100) == 0x0000) // arithmetic\r |
053fd9b4 |
377 | return 1;\r |
378 | break;\r |
379 | }\r |
380 | \r |
381 | return 0;\r |
382 | }\r |
383 | \r |
5ed2a20e |
384 | int SekRegisterIdlePatch(unsigned int pc, int oldop, int newop, void *ctx)\r |
053fd9b4 |
385 | {\r |
5ed2a20e |
386 | int is_main68k = 1;\r |
488c0bbf |
387 | u16 *target;\r |
388 | uptr v;\r |
389 | \r |
5ed2a20e |
390 | #if defined(EMU_C68K)\r |
391 | struct Cyclone *cyc = ctx;\r |
392 | is_main68k = cyc == &PicoCpuCM68k;\r |
393 | pc -= cyc->membase;\r |
394 | #elif defined(EMU_F68K)\r |
395 | is_main68k = ctx == &PicoCpuFM68k;\r |
053fd9b4 |
396 | #endif\r |
397 | pc &= ~0xff000000;\r |
0219d379 |
398 | if (!(newop&0x200))\r |
5ed2a20e |
399 | elprintf(EL_IDLE, "idle: patch %06x %04x %04x %c %c #%i", pc, oldop, newop,\r |
400 | (newop&0x200)?'n':'y', is_main68k?'m':'s', idledet_count);\r |
401 | \r |
488c0bbf |
402 | // XXX: probably shouldn't patch RAM too\r |
403 | v = m68k_read16_map[pc >> M68K_MEM_SHIFT];\r |
404 | if (!(v & 0x80000000))\r |
405 | target = (u16 *)((v << 1) + pc);\r |
406 | else {\r |
407 | if (++idledet_bads > 128)\r |
408 | return 2; // remove detector\r |
053fd9b4 |
409 | return 1; // don't patch\r |
410 | }\r |
411 | \r |
412 | if (idledet_count >= 0x200 && (idledet_count & 0x1ff) == 0) {\r |
488c0bbf |
413 | unsigned short **tmp = realloc(idledet_ptrs, (idledet_count+0x200)*4);\r |
414 | if (tmp == NULL)\r |
415 | return 1;\r |
416 | idledet_ptrs = tmp;\r |
053fd9b4 |
417 | }\r |
418 | \r |
488c0bbf |
419 | idledet_ptrs[idledet_count++] = target;\r |
b0677887 |
420 | \r |
053fd9b4 |
421 | return 0;\r |
422 | }\r |
423 | \r |
424 | void SekFinishIdleDet(void)\r |
425 | {\r |
2b15cea8 |
426 | if (idledet_count < 0)\r |
427 | return;\r |
053fd9b4 |
428 | #ifdef EMU_C68K\r |
429 | CycloneFinishIdle();\r |
c060a9ab |
430 | #endif\r |
431 | #ifdef EMU_F68K\r |
99ade2ee |
432 | fm68k_emulate(0, 2);\r |
053fd9b4 |
433 | #endif\r |
434 | while (idledet_count > 0)\r |
435 | {\r |
488c0bbf |
436 | unsigned short *op = idledet_ptrs[--idledet_count];\r |
053fd9b4 |
437 | if ((*op & 0xfd00) == 0x7100)\r |
438 | *op &= 0xff, *op |= 0x6600;\r |
439 | else if ((*op & 0xfd00) == 0x7500)\r |
440 | *op &= 0xff, *op |= 0x6700;\r |
441 | else if ((*op & 0xfd00) == 0x7d00)\r |
442 | *op &= 0xff, *op |= 0x6000;\r |
443 | else\r |
444 | elprintf(EL_STATUS|EL_IDLE, "idle: don't know how to restore %04x", *op);\r |
445 | }\r |
2b15cea8 |
446 | idledet_count = -1;\r |
053fd9b4 |
447 | }\r |
448 | \r |
449 | \r |
12da51c2 |
450 | #if defined(CPU_CMP_R) || defined(CPU_CMP_W)\r |
451 | #include "debug.h"\r |
452 | \r |
453 | struct ref_68k {\r |
454 | u32 dar[16];\r |
455 | u32 pc;\r |
456 | u32 sr;\r |
457 | u32 cycles;\r |
458 | u32 pc_prev;\r |
459 | };\r |
460 | struct ref_68k ref_68ks[2];\r |
461 | static int current_68k;\r |
462 | \r |
463 | void SekTrace(int is_s68k)\r |
464 | {\r |
465 | struct ref_68k *x68k = &ref_68ks[is_s68k];\r |
466 | u32 pc = is_s68k ? SekPcS68k : SekPc;\r |
467 | u32 sr = is_s68k ? SekSrS68k : SekSr;\r |
468 | u32 cycles = is_s68k ? SekCycleCntS68k : SekCycleCnt;\r |
469 | u32 r;\r |
470 | u8 cmd;\r |
471 | #ifdef CPU_CMP_W\r |
472 | int i;\r |
473 | \r |
474 | if (is_s68k != current_68k) {\r |
475 | current_68k = is_s68k;\r |
476 | cmd = CTL_68K_SLAVE | current_68k;\r |
477 | tl_write(&cmd, sizeof(cmd));\r |
478 | }\r |
479 | if (pc != x68k->pc) {\r |
480 | x68k->pc = pc;\r |
481 | tl_write_uint(CTL_68K_PC, x68k->pc);\r |
482 | }\r |
483 | if (sr != x68k->sr) {\r |
484 | x68k->sr = sr;\r |
485 | tl_write_uint(CTL_68K_SR, x68k->sr);\r |
486 | }\r |
487 | for (i = 0; i < 16; i++) {\r |
488 | r = is_s68k ? SekDarS68k(i) : SekDar(i);\r |
489 | if (r != x68k->dar[i]) {\r |
490 | x68k->dar[i] = r;\r |
491 | tl_write_uint(CTL_68K_R + i, r);\r |
492 | }\r |
493 | }\r |
494 | tl_write_uint(CTL_68K_CYCLES, cycles);\r |
495 | #else\r |
496 | int i, bad = 0;\r |
497 | \r |
498 | while (1)\r |
499 | {\r |
500 | int ret = tl_read(&cmd, sizeof(cmd));\r |
501 | if (ret == 0) {\r |
502 | elprintf(EL_STATUS, "EOF");\r |
503 | exit(1);\r |
504 | }\r |
505 | switch (cmd) {\r |
506 | case CTL_68K_SLAVE:\r |
507 | case CTL_68K_SLAVE + 1:\r |
508 | current_68k = cmd & 1;\r |
509 | break;\r |
510 | case CTL_68K_PC:\r |
511 | tl_read_uint(&x68k->pc);\r |
512 | break;\r |
513 | case CTL_68K_SR:\r |
514 | tl_read_uint(&x68k->sr);\r |
515 | break;\r |
516 | case CTL_68K_CYCLES:\r |
517 | tl_read_uint(&x68k->cycles);\r |
518 | goto breakloop;\r |
519 | default:\r |
520 | if (CTL_68K_R <= cmd && cmd < CTL_68K_R + 0x10)\r |
521 | tl_read_uint(&x68k->dar[cmd - CTL_68K_R]);\r |
522 | else\r |
523 | elprintf(EL_STATUS, "invalid cmd: %02x", cmd);\r |
524 | }\r |
525 | }\r |
526 | \r |
527 | breakloop:\r |
528 | if (is_s68k != current_68k) {\r |
529 | printf("bad 68k: %d %d\n", is_s68k, current_68k);\r |
530 | bad = 1;\r |
531 | }\r |
532 | if (cycles != x68k->cycles) {\r |
533 | printf("bad cycles: %u %u\n", cycles, x68k->cycles);\r |
534 | bad = 1;\r |
535 | }\r |
536 | if ((pc ^ x68k->pc) & 0xffffff) {\r |
537 | printf("bad PC: %08x %08x\n", pc, x68k->pc);\r |
538 | bad = 1;\r |
539 | }\r |
540 | if (sr != x68k->sr) {\r |
541 | printf("bad SR: %03x %03x\n", sr, x68k->sr);\r |
542 | bad = 1;\r |
543 | }\r |
544 | for (i = 0; i < 16; i++) {\r |
545 | r = is_s68k ? SekDarS68k(i) : SekDar(i);\r |
546 | if (r != x68k->dar[i]) {\r |
547 | printf("bad %c%d: %08x %08x\n", i < 8 ? 'D' : 'A', i & 7,\r |
548 | r, x68k->dar[i]);\r |
549 | bad = 1;\r |
550 | }\r |
551 | }\r |
552 | if (bad) {\r |
553 | for (i = 0; i < 8; i++)\r |
554 | printf("D%d: %08x A%d: %08x\n", i, x68k->dar[i],\r |
555 | i, x68k->dar[i + 8]);\r |
556 | printf("PC: %08x, %08x\n", x68k->pc, x68k->pc_prev);\r |
a39743e3 |
557 | printf("SR: %04x\n", x68k->sr);\r |
12da51c2 |
558 | \r |
559 | PDebugDumpMem();\r |
560 | exit(1);\r |
561 | }\r |
562 | x68k->pc_prev = x68k->pc;\r |
563 | #endif\r |
564 | }\r |
565 | #endif // CPU_CMP_*\r |
566 | \r |
6cab49fd |
567 | #if defined(EMU_M68K) && M68K_INSTRUCTION_HOOK == OPT_SPECIFY_HANDLER\r |
568 | static unsigned char op_flags[0x400000/2] = { 0, };\r |
569 | static int atexit_set = 0;\r |
570 | \r |
571 | static void make_idc(void)\r |
572 | {\r |
573 | FILE *f = fopen("idc.idc", "w");\r |
574 | int i;\r |
575 | if (!f) return;\r |
576 | fprintf(f, "#include <idc.idc>\nstatic main() {\n");\r |
577 | for (i = 0; i < 0x400000/2; i++)\r |
578 | if (op_flags[i] != 0)\r |
579 | fprintf(f, " MakeCode(0x%06x);\n", i*2);\r |
580 | fprintf(f, "}\n");\r |
581 | fclose(f);\r |
582 | }\r |
583 | \r |
584 | void instruction_hook(void)\r |
585 | {\r |
586 | if (!atexit_set) {\r |
587 | atexit(make_idc);\r |
588 | atexit_set = 1;\r |
589 | }\r |
590 | if (REG_PC < 0x400000)\r |
591 | op_flags[REG_PC/2] = 1;\r |
592 | }\r |
593 | #endif\r |
12da51c2 |
594 | \r |
595 | // vim:shiftwidth=2:ts=2:expandtab\r |