improve cue handling a bit
[picodrive.git] / pico / sek.c
CommitLineData
cff531af 1/*\r
2 * PicoDrive\r
3 * (c) Copyright Dave, 2004\r
4 * (C) notaz, 2006-2009\r
5 *\r
6 * This work is licensed under the terms of MAME license.\r
7 * See COPYING file in the top-level directory.\r
8 */\r
cc68a136 9\r
efcba75f 10#include "pico_int.h"\r
488c0bbf 11#include "memory.h"\r
cc68a136 12\r
13\r
ae214f1c 14unsigned int SekCycleCnt;\r
15unsigned int SekCycleAim;\r
cc68a136 16\r
70357ce5 17\r
18/* context */\r
19// Cyclone 68000\r
cc68a136 20#ifdef EMU_C68K\r
3aa1e148 21struct Cyclone PicoCpuCM68k;\r
cc68a136 22#endif\r
70357ce5 23// MUSASHI 68000\r
cc68a136 24#ifdef EMU_M68K\r
3aa1e148 25m68ki_cpu_core PicoCpuMM68k;\r
cc68a136 26#endif\r
70357ce5 27// FAME 68000\r
28#ifdef EMU_F68K\r
3aa1e148 29M68K_CONTEXT PicoCpuFM68k;\r
cc68a136 30#endif\r
31\r
32\r
70357ce5 33/* callbacks */\r
cc68a136 34#ifdef EMU_C68K\r
b837b69b 35// interrupt acknowledgment\r
0af33fe0 36static int SekIntAck(int level)\r
cc68a136 37{\r
38 // try to emulate VDP's reaction to 68000 int ack\r
69996cb7 39 if (level == 4) { Pico.video.pending_ints = 0; elprintf(EL_INTS, "hack: @ %06x [%i]", SekPc, SekCycleCnt); }\r
40 else if(level == 6) { Pico.video.pending_ints &= ~0x20; elprintf(EL_INTS, "vack: @ %06x [%i]", SekPc, SekCycleCnt); }\r
3aa1e148 41 PicoCpuCM68k.irq = 0;\r
0af33fe0 42 return CYCLONE_INT_ACK_AUTOVECTOR;\r
cc68a136 43}\r
44\r
69996cb7 45static void SekResetAck(void)\r
cc68a136 46{\r
69996cb7 47 elprintf(EL_ANOMALY, "Reset encountered @ %06x", SekPc);\r
cc68a136 48}\r
49\r
50static int SekUnrecognizedOpcode()\r
51{\r
b4db550e 52 unsigned int pc;\r
cc68a136 53 pc = SekPc;\r
b4db550e 54 elprintf(EL_ANOMALY, "Unrecognized Opcode @ %06x", pc);\r
55 // see if we are still in a mapped region\r
56 pc &= 0x00ffffff;\r
57 if (map_flag_set(m68k_read16_map[pc >> M68K_MEM_SHIFT])) {\r
58 elprintf(EL_STATUS|EL_ANOMALY, "m68k crash @%06x", pc);\r
3aa1e148 59 PicoCpuCM68k.cycles = 0;\r
60 PicoCpuCM68k.state_flags |= 1;\r
cc68a136 61 return 1;\r
62 }\r
2d0b15bb 63#ifdef EMU_M68K // debugging cyclone\r
64 {\r
65 extern int have_illegal;\r
66 have_illegal = 1;\r
67 }\r
68#endif\r
cc68a136 69 return 0;\r
70}\r
71#endif\r
72\r
73\r
74#ifdef EMU_M68K\r
75static int SekIntAckM68K(int level)\r
76{\r
69996cb7 77 if (level == 4) { Pico.video.pending_ints = 0; elprintf(EL_INTS, "hack: @ %06x [%i]", SekPc, SekCycleCnt); }\r
78 else if(level == 6) { Pico.video.pending_ints &= ~0x20; elprintf(EL_INTS, "vack: @ %06x [%i]", SekPc, SekCycleCnt); }\r
cc68a136 79 CPU_INT_LEVEL = 0;\r
80 return M68K_INT_ACK_AUTOVECTOR;\r
81}\r
0af33fe0 82\r
83static int SekTasCallback(void)\r
84{\r
85 return 0; // no writeback\r
86}\r
cc68a136 87#endif\r
88\r
89\r
70357ce5 90#ifdef EMU_F68K\r
3aa1e148 91static void SekIntAckF68K(unsigned level)\r
70357ce5 92{\r
c7fd7bb8 93 if (level == 4) {\r
94 Pico.video.pending_ints = 0;\r
95 elprintf(EL_INTS, "hack: @ %06x [%i]", SekPc, SekCyclesDone());\r
96 }\r
97 else if(level == 6) {\r
98 Pico.video.pending_ints &= ~0x20;\r
99 elprintf(EL_INTS, "vack: @ %06x [%i]", SekPc, SekCyclesDone());\r
100 }\r
3aa1e148 101 PicoCpuFM68k.interrupts[0] = 0;\r
70357ce5 102}\r
103#endif\r
104\r
cc68a136 105\r
2aa27095 106PICO_INTERNAL void SekInit(void)\r
cc68a136 107{\r
108#ifdef EMU_C68K\r
109 CycloneInit();\r
3aa1e148 110 memset(&PicoCpuCM68k,0,sizeof(PicoCpuCM68k));\r
111 PicoCpuCM68k.IrqCallback=SekIntAck;\r
112 PicoCpuCM68k.ResetCallback=SekResetAck;\r
113 PicoCpuCM68k.UnrecognizedCallback=SekUnrecognizedOpcode;\r
03e4f2a3 114 PicoCpuCM68k.flags=4; // Z set\r
cc68a136 115#endif\r
cc68a136 116#ifdef EMU_M68K\r
117 {\r
118 void *oldcontext = m68ki_cpu_p;\r
3aa1e148 119 m68k_set_context(&PicoCpuMM68k);\r
cc68a136 120 m68k_set_cpu_type(M68K_CPU_TYPE_68000);\r
121 m68k_init();\r
122 m68k_set_int_ack_callback(SekIntAckM68K);\r
0af33fe0 123 m68k_set_tas_instr_callback(SekTasCallback);\r
9037e45d 124 //m68k_pulse_reset();\r
cc68a136 125 m68k_set_context(oldcontext);\r
126 }\r
127#endif\r
70357ce5 128#ifdef EMU_F68K\r
129 {\r
130 void *oldcontext = g_m68kcontext;\r
3aa1e148 131 g_m68kcontext = &PicoCpuFM68k;\r
132 memset(&PicoCpuFM68k, 0, sizeof(PicoCpuFM68k));\r
03e4f2a3 133 fm68k_init();\r
3aa1e148 134 PicoCpuFM68k.iack_handler = SekIntAckF68K;\r
b5e5172d 135 PicoCpuFM68k.sr = 0x2704; // Z flag\r
70357ce5 136 g_m68kcontext = oldcontext;\r
137 }\r
138#endif\r
cc68a136 139}\r
140\r
70357ce5 141\r
cc68a136 142// Reset the 68000:\r
2aa27095 143PICO_INTERNAL int SekReset(void)\r
cc68a136 144{\r
145 if (Pico.rom==NULL) return 1;\r
146\r
147#ifdef EMU_C68K\r
5e89f0f5 148 CycloneReset(&PicoCpuCM68k);\r
cc68a136 149#endif\r
cc68a136 150#ifdef EMU_M68K\r
3aa1e148 151 m68k_set_context(&PicoCpuMM68k); // if we ever reset m68k, we always need it's context to be set\r
2d0b15bb 152 m68ki_cpu.sp[0]=0;\r
153 m68k_set_irq(0);\r
b837b69b 154 m68k_pulse_reset();\r
99464b62 155 REG_USP = 0; // ?\r
cc68a136 156#endif\r
70357ce5 157#ifdef EMU_F68K\r
158 {\r
3aa1e148 159 g_m68kcontext = &PicoCpuFM68k;\r
03e4f2a3 160 fm68k_reset();\r
70357ce5 161 }\r
162#endif\r
cc68a136 163\r
164 return 0;\r
165}\r
166\r
5f9a0d16 167void SekStepM68k(void)\r
168{\r
169 SekCycleAim=SekCycleCnt+1;\r
170#if defined(EMU_CORE_DEBUG)\r
171 SekCycleCnt+=CM_compareRun(1, 0);\r
172#elif defined(EMU_C68K)\r
173 PicoCpuCM68k.cycles=1;\r
174 CycloneRun(&PicoCpuCM68k);\r
175 SekCycleCnt+=1-PicoCpuCM68k.cycles;\r
176#elif defined(EMU_M68K)\r
177 SekCycleCnt+=m68k_execute(1);\r
178#elif defined(EMU_F68K)\r
f579f7b8 179 SekCycleCnt+=fm68k_emulate(1, 0, 0);\r
5f9a0d16 180#endif\r
181}\r
cc68a136 182\r
eff55556 183PICO_INTERNAL void SekSetRealTAS(int use_real)\r
2433f409 184{\r
185#ifdef EMU_C68K\r
186 CycloneSetRealTAS(use_real);\r
187#endif\r
70357ce5 188#ifdef EMU_F68K\r
189 // TODO\r
190#endif\r
2433f409 191}\r
192\r
b4db550e 193// Pack the cpu into a common format:\r
194// XXX: rename\r
195PICO_INTERNAL void SekPackCpu(unsigned char *cpu, int is_sub)\r
196{\r
197 unsigned int pc=0;\r
198\r
199#if defined(EMU_C68K)\r
200 struct Cyclone *context = is_sub ? &PicoCpuCS68k : &PicoCpuCM68k;\r
201 memcpy(cpu,context->d,0x40);\r
202 pc=context->pc-context->membase;\r
203 *(unsigned int *)(cpu+0x44)=CycloneGetSr(context);\r
204 *(unsigned int *)(cpu+0x48)=context->osp;\r
205 cpu[0x4c] = context->irq;\r
206 cpu[0x4d] = context->state_flags & 1;\r
207#elif defined(EMU_M68K)\r
208 void *oldcontext = m68ki_cpu_p;\r
209 m68k_set_context(is_sub ? &PicoCpuMS68k : &PicoCpuMM68k);\r
210 memcpy(cpu,m68ki_cpu_p->dar,0x40);\r
211 pc=m68ki_cpu_p->pc;\r
212 *(unsigned int *)(cpu+0x44)=m68k_get_reg(NULL, M68K_REG_SR);\r
213 *(unsigned int *)(cpu+0x48)=m68ki_cpu_p->sp[m68ki_cpu_p->s_flag^SFLAG_SET];\r
214 cpu[0x4c] = CPU_INT_LEVEL>>8;\r
215 cpu[0x4d] = CPU_STOPPED;\r
216 m68k_set_context(oldcontext);\r
217#elif defined(EMU_F68K)\r
218 M68K_CONTEXT *context = is_sub ? &PicoCpuFS68k : &PicoCpuFM68k;\r
219 memcpy(cpu,context->dreg,0x40);\r
220 pc=context->pc;\r
221 *(unsigned int *)(cpu+0x44)=context->sr;\r
222 *(unsigned int *)(cpu+0x48)=context->asp;\r
223 cpu[0x4c] = context->interrupts[0];\r
224 cpu[0x4d] = (context->execinfo & FM68K_HALTED) ? 1 : 0;\r
225#endif\r
226\r
6a98f03e 227 *(unsigned int *)(cpu+0x40) = pc;\r
ae214f1c 228 *(unsigned int *)(cpu+0x50) =\r
229 is_sub ? SekCycleCntS68k : SekCycleCnt;\r
b4db550e 230}\r
231\r
232PICO_INTERNAL void SekUnpackCpu(const unsigned char *cpu, int is_sub)\r
233{\r
234#if defined(EMU_C68K)\r
235 struct Cyclone *context = is_sub ? &PicoCpuCS68k : &PicoCpuCM68k;\r
236 CycloneSetSr(context, *(unsigned int *)(cpu+0x44));\r
237 context->osp=*(unsigned int *)(cpu+0x48);\r
238 memcpy(context->d,cpu,0x40);\r
239 context->membase = 0;\r
240 context->pc = *(unsigned int *)(cpu+0x40);\r
241 CycloneUnpack(context, NULL); // rebase PC\r
242 context->irq = cpu[0x4c];\r
243 context->state_flags = 0;\r
244 if (cpu[0x4d])\r
245 context->state_flags |= 1;\r
246#elif defined(EMU_M68K)\r
247 void *oldcontext = m68ki_cpu_p;\r
248 m68k_set_context(is_sub ? &PicoCpuMS68k : &PicoCpuMM68k);\r
249 m68k_set_reg(M68K_REG_SR, *(unsigned int *)(cpu+0x44));\r
250 memcpy(m68ki_cpu_p->dar,cpu,0x40);\r
251 m68ki_cpu_p->pc=*(unsigned int *)(cpu+0x40);\r
252 m68ki_cpu_p->sp[m68ki_cpu_p->s_flag^SFLAG_SET]=*(unsigned int *)(cpu+0x48);\r
253 CPU_INT_LEVEL = cpu[0x4c] << 8;\r
254 CPU_STOPPED = cpu[0x4d];\r
255 m68k_set_context(oldcontext);\r
256#elif defined(EMU_F68K)\r
257 M68K_CONTEXT *context = is_sub ? &PicoCpuFS68k : &PicoCpuFM68k;\r
258 memcpy(context->dreg,cpu,0x40);\r
259 context->pc =*(unsigned int *)(cpu+0x40);\r
260 context->sr =*(unsigned int *)(cpu+0x44);\r
261 context->asp=*(unsigned int *)(cpu+0x48);\r
262 context->interrupts[0] = cpu[0x4c];\r
263 context->execinfo &= ~FM68K_HALTED;\r
264 if (cpu[0x4d]&1) context->execinfo |= FM68K_HALTED;\r
265#endif\r
ae214f1c 266 if (is_sub)\r
267 SekCycleCntS68k = *(unsigned int *)(cpu+0x50);\r
268 else\r
269 SekCycleCnt = *(unsigned int *)(cpu+0x50);\r
b4db550e 270}\r
271\r
5f9a0d16 272\r
053fd9b4 273/* idle loop detection, not to be used in CD mode */\r
274#ifdef EMU_C68K\r
d4d62665 275#include "cpu/cyclone/tools/idle.h"\r
053fd9b4 276#endif\r
277\r
488c0bbf 278static unsigned short **idledet_ptrs = NULL;\r
053fd9b4 279static int idledet_count = 0, idledet_bads = 0;\r
0219d379 280static int idledet_start_frame = 0;\r
053fd9b4 281\r
5ed2a20e 282#if 0\r
283#define IDLE_STATS 1\r
284unsigned int idlehit_addrs[128], idlehit_counts[128];\r
285\r
286void SekRegisterIdleHit(unsigned int pc)\r
287{\r
288 int i;\r
289 for (i = 0; i < 127 && idlehit_addrs[i]; i++) {\r
290 if (idlehit_addrs[i] == pc) {\r
291 idlehit_counts[i]++;\r
292 return;\r
293 }\r
294 }\r
295 idlehit_addrs[i] = pc;\r
296 idlehit_counts[i] = 1;\r
297 idlehit_addrs[i+1] = 0;\r
298}\r
299#endif\r
300\r
053fd9b4 301void SekInitIdleDet(void)\r
302{\r
488c0bbf 303 unsigned short **tmp = realloc(idledet_ptrs, 0x200*4);\r
053fd9b4 304 if (tmp == NULL) {\r
488c0bbf 305 free(idledet_ptrs);\r
306 idledet_ptrs = NULL;\r
053fd9b4 307 }\r
308 else\r
488c0bbf 309 idledet_ptrs = tmp;\r
053fd9b4 310 idledet_count = idledet_bads = 0;\r
311 idledet_start_frame = Pico.m.frame_count + 360;\r
5ed2a20e 312#ifdef IDLE_STATS\r
313 idlehit_addrs[0] = 0;\r
314#endif\r
053fd9b4 315\r
053fd9b4 316#ifdef EMU_C68K\r
317 CycloneInitIdle();\r
318#endif\r
c060a9ab 319#ifdef EMU_F68K\r
c060a9ab 320 fm68k_emulate(0, 0, 1);\r
321#endif\r
053fd9b4 322}\r
323\r
0219d379 324int SekIsIdleReady(void)\r
325{\r
326 return (Pico.m.frame_count >= idledet_start_frame);\r
327}\r
328\r
053fd9b4 329int SekIsIdleCode(unsigned short *dst, int bytes)\r
330{\r
8187ba84 331 // printf("SekIsIdleCode %04x %i\n", *dst, bytes);\r
053fd9b4 332 switch (bytes)\r
333 {\r
5ed2a20e 334 case 2:\r
335 if ((*dst & 0xf000) != 0x6000) // not another branch\r
336 return 1;\r
337 break;\r
053fd9b4 338 case 4:\r
0219d379 339 if ( (*dst & 0xff3f) == 0x4a38 || // tst.x ($xxxx.w); tas ($xxxx.w)\r
340 (*dst & 0xc1ff) == 0x0038 || // move.x ($xxxx.w), dX\r
341 (*dst & 0xf13f) == 0xb038) // cmp.x ($xxxx.w), dX\r
342 return 1;\r
343 if (PicoAHW & (PAHW_MCD|PAHW_32X))\r
344 break;\r
345 // with no addons, there should be no need to wait\r
346 // for byte change anywhere\r
347 if ( (*dst & 0xfff8) == 0x4a10 || // tst.b ($aX)\r
348 (*dst & 0xfff8) == 0x4a28) // tst.b ($xxxx,a0)\r
053fd9b4 349 return 1;\r
350 break;\r
351 case 6:\r
b0677887 352 if ( ((dst[1] & 0xe0) == 0xe0 && ( // RAM and\r
353 *dst == 0x4a39 || // tst.b ($xxxxxxxx)\r
354 *dst == 0x4a79 || // tst.w ($xxxxxxxx)\r
355 *dst == 0x4ab9 || // tst.l ($xxxxxxxx)\r
356 (*dst & 0xc1ff) == 0x0039 || // move.x ($xxxxxxxx), dX\r
357 (*dst & 0xf13f) == 0xb039))||// cmp.x ($xxxxxxxx), dX\r
358 *dst == 0x0838 || // btst $X, ($xxxx.w) [6 byte op]\r
359 (*dst & 0xffbf) == 0x0c38) // cmpi.{b,w} $X, ($xxxx.w)\r
053fd9b4 360 return 1;\r
361 break;\r
362 case 8:\r
b0677887 363 if ( ((dst[2] & 0xe0) == 0xe0 && ( // RAM and\r
364 *dst == 0x0839 || // btst $X, ($xxxxxxxx.w) [8 byte op]\r
365 (*dst & 0xffbf) == 0x0c39))||// cmpi.{b,w} $X, ($xxxxxxxx)\r
366 *dst == 0x0cb8) // cmpi.l $X, ($xxxx.w)\r
053fd9b4 367 return 1;\r
368 break;\r
369 case 12:\r
0219d379 370 if (PicoAHW & (PAHW_MCD|PAHW_32X))\r
371 break;\r
372 if ( (*dst & 0xf1f8) == 0x3010 && // move.w (aX), dX\r
b0677887 373 (dst[1]&0xf100) == 0x0000 && // arithmetic\r
374 (dst[3]&0xf100) == 0x0000) // arithmetic\r
053fd9b4 375 return 1;\r
376 break;\r
377 }\r
378\r
379 return 0;\r
380}\r
381\r
5ed2a20e 382int SekRegisterIdlePatch(unsigned int pc, int oldop, int newop, void *ctx)\r
053fd9b4 383{\r
5ed2a20e 384 int is_main68k = 1;\r
488c0bbf 385 u16 *target;\r
386 uptr v;\r
387\r
5ed2a20e 388#if defined(EMU_C68K)\r
389 struct Cyclone *cyc = ctx;\r
390 is_main68k = cyc == &PicoCpuCM68k;\r
391 pc -= cyc->membase;\r
392#elif defined(EMU_F68K)\r
393 is_main68k = ctx == &PicoCpuFM68k;\r
053fd9b4 394#endif\r
395 pc &= ~0xff000000;\r
0219d379 396 if (!(newop&0x200))\r
5ed2a20e 397 elprintf(EL_IDLE, "idle: patch %06x %04x %04x %c %c #%i", pc, oldop, newop,\r
398 (newop&0x200)?'n':'y', is_main68k?'m':'s', idledet_count);\r
399\r
488c0bbf 400 // XXX: probably shouldn't patch RAM too\r
401 v = m68k_read16_map[pc >> M68K_MEM_SHIFT];\r
402 if (!(v & 0x80000000))\r
403 target = (u16 *)((v << 1) + pc);\r
404 else {\r
405 if (++idledet_bads > 128)\r
406 return 2; // remove detector\r
053fd9b4 407 return 1; // don't patch\r
408 }\r
409\r
410 if (idledet_count >= 0x200 && (idledet_count & 0x1ff) == 0) {\r
488c0bbf 411 unsigned short **tmp = realloc(idledet_ptrs, (idledet_count+0x200)*4);\r
412 if (tmp == NULL)\r
413 return 1;\r
414 idledet_ptrs = tmp;\r
053fd9b4 415 }\r
416\r
488c0bbf 417 idledet_ptrs[idledet_count++] = target;\r
b0677887 418\r
053fd9b4 419 return 0;\r
420}\r
421\r
422void SekFinishIdleDet(void)\r
423{\r
053fd9b4 424#ifdef EMU_C68K\r
425 CycloneFinishIdle();\r
c060a9ab 426#endif\r
427#ifdef EMU_F68K\r
428 fm68k_emulate(0, 0, 2);\r
053fd9b4 429#endif\r
430 while (idledet_count > 0)\r
431 {\r
488c0bbf 432 unsigned short *op = idledet_ptrs[--idledet_count];\r
053fd9b4 433 if ((*op & 0xfd00) == 0x7100)\r
434 *op &= 0xff, *op |= 0x6600;\r
435 else if ((*op & 0xfd00) == 0x7500)\r
436 *op &= 0xff, *op |= 0x6700;\r
437 else if ((*op & 0xfd00) == 0x7d00)\r
438 *op &= 0xff, *op |= 0x6000;\r
439 else\r
440 elprintf(EL_STATUS|EL_IDLE, "idle: don't know how to restore %04x", *op);\r
441 }\r
053fd9b4 442}\r
443\r
444\r
12da51c2 445#if defined(CPU_CMP_R) || defined(CPU_CMP_W)\r
446#include "debug.h"\r
447\r
448struct ref_68k {\r
449 u32 dar[16];\r
450 u32 pc;\r
451 u32 sr;\r
452 u32 cycles;\r
453 u32 pc_prev;\r
454};\r
455struct ref_68k ref_68ks[2];\r
456static int current_68k;\r
457\r
458void SekTrace(int is_s68k)\r
459{\r
460 struct ref_68k *x68k = &ref_68ks[is_s68k];\r
461 u32 pc = is_s68k ? SekPcS68k : SekPc;\r
462 u32 sr = is_s68k ? SekSrS68k : SekSr;\r
463 u32 cycles = is_s68k ? SekCycleCntS68k : SekCycleCnt;\r
464 u32 r;\r
465 u8 cmd;\r
466#ifdef CPU_CMP_W\r
467 int i;\r
468\r
469 if (is_s68k != current_68k) {\r
470 current_68k = is_s68k;\r
471 cmd = CTL_68K_SLAVE | current_68k;\r
472 tl_write(&cmd, sizeof(cmd));\r
473 }\r
474 if (pc != x68k->pc) {\r
475 x68k->pc = pc;\r
476 tl_write_uint(CTL_68K_PC, x68k->pc);\r
477 }\r
478 if (sr != x68k->sr) {\r
479 x68k->sr = sr;\r
480 tl_write_uint(CTL_68K_SR, x68k->sr);\r
481 }\r
482 for (i = 0; i < 16; i++) {\r
483 r = is_s68k ? SekDarS68k(i) : SekDar(i);\r
484 if (r != x68k->dar[i]) {\r
485 x68k->dar[i] = r;\r
486 tl_write_uint(CTL_68K_R + i, r);\r
487 }\r
488 }\r
489 tl_write_uint(CTL_68K_CYCLES, cycles);\r
490#else\r
491 int i, bad = 0;\r
492\r
493 while (1)\r
494 {\r
495 int ret = tl_read(&cmd, sizeof(cmd));\r
496 if (ret == 0) {\r
497 elprintf(EL_STATUS, "EOF");\r
498 exit(1);\r
499 }\r
500 switch (cmd) {\r
501 case CTL_68K_SLAVE:\r
502 case CTL_68K_SLAVE + 1:\r
503 current_68k = cmd & 1;\r
504 break;\r
505 case CTL_68K_PC:\r
506 tl_read_uint(&x68k->pc);\r
507 break;\r
508 case CTL_68K_SR:\r
509 tl_read_uint(&x68k->sr);\r
510 break;\r
511 case CTL_68K_CYCLES:\r
512 tl_read_uint(&x68k->cycles);\r
513 goto breakloop;\r
514 default:\r
515 if (CTL_68K_R <= cmd && cmd < CTL_68K_R + 0x10)\r
516 tl_read_uint(&x68k->dar[cmd - CTL_68K_R]);\r
517 else\r
518 elprintf(EL_STATUS, "invalid cmd: %02x", cmd);\r
519 }\r
520 }\r
521\r
522breakloop:\r
523 if (is_s68k != current_68k) {\r
524 printf("bad 68k: %d %d\n", is_s68k, current_68k);\r
525 bad = 1;\r
526 }\r
527 if (cycles != x68k->cycles) {\r
528 printf("bad cycles: %u %u\n", cycles, x68k->cycles);\r
529 bad = 1;\r
530 }\r
531 if ((pc ^ x68k->pc) & 0xffffff) {\r
532 printf("bad PC: %08x %08x\n", pc, x68k->pc);\r
533 bad = 1;\r
534 }\r
535 if (sr != x68k->sr) {\r
536 printf("bad SR: %03x %03x\n", sr, x68k->sr);\r
537 bad = 1;\r
538 }\r
539 for (i = 0; i < 16; i++) {\r
540 r = is_s68k ? SekDarS68k(i) : SekDar(i);\r
541 if (r != x68k->dar[i]) {\r
542 printf("bad %c%d: %08x %08x\n", i < 8 ? 'D' : 'A', i & 7,\r
543 r, x68k->dar[i]);\r
544 bad = 1;\r
545 }\r
546 }\r
547 if (bad) {\r
548 for (i = 0; i < 8; i++)\r
549 printf("D%d: %08x A%d: %08x\n", i, x68k->dar[i],\r
550 i, x68k->dar[i + 8]);\r
551 printf("PC: %08x, %08x\n", x68k->pc, x68k->pc_prev);\r
552\r
553 PDebugDumpMem();\r
554 exit(1);\r
555 }\r
556 x68k->pc_prev = x68k->pc;\r
557#endif\r
558}\r
559#endif // CPU_CMP_*\r
560\r
6cab49fd 561#if defined(EMU_M68K) && M68K_INSTRUCTION_HOOK == OPT_SPECIFY_HANDLER\r
562static unsigned char op_flags[0x400000/2] = { 0, };\r
563static int atexit_set = 0;\r
564\r
565static void make_idc(void)\r
566{\r
567 FILE *f = fopen("idc.idc", "w");\r
568 int i;\r
569 if (!f) return;\r
570 fprintf(f, "#include <idc.idc>\nstatic main() {\n");\r
571 for (i = 0; i < 0x400000/2; i++)\r
572 if (op_flags[i] != 0)\r
573 fprintf(f, " MakeCode(0x%06x);\n", i*2);\r
574 fprintf(f, "}\n");\r
575 fclose(f);\r
576}\r
577\r
578void instruction_hook(void)\r
579{\r
580 if (!atexit_set) {\r
581 atexit(make_idc);\r
582 atexit_set = 1;\r
583 }\r
584 if (REG_PC < 0x400000)\r
585 op_flags[REG_PC/2] = 1;\r
586}\r
587#endif\r
12da51c2 588\r
589// vim:shiftwidth=2:ts=2:expandtab\r