kill helix build, it's no longer called anyway
[picodrive.git] / pico / pico.c
CommitLineData
d9fc2fe1 1// PicoDrive\r
cc68a136 2\r
3// (c) Copyright 2004 Dave, All rights reserved.\r
d9fc2fe1 4// (c) Copyright 2006-2008 notaz, All rights reserved.\r
cc68a136 5// Free for non-commercial use.\r
6\r
7// For commercial use, separate licencing terms must be obtained.\r
8\r
9\r
efcba75f 10#include "pico_int.h"\r
cc68a136 11#include "sound/ym2612.h"\r
12\r
69996cb7 13int PicoVer=0x0133;\r
cc68a136 14struct Pico Pico;\r
602133e1 15int PicoOpt = 0;\r
16int PicoSkipFrame = 0; // skip rendering frame?\r
17int emustatus = 0; // rapid_ym2612, multi_ym_updates\r
2b02d6e5 18int PicoPad[2]; // Joypads, format is MXYZ SACB RLDU\r
5f9a0d16 19int PicoPadInt[2]; // internal copy\r
9037e45d 20int PicoAHW = 0; // active addon hardware: scd_active, 32x_active, svp_active, pico_active\r
cc68a136 21int PicoRegionOverride = 0; // override the region detection 0: Auto, 1: Japan NTSC, 2: Japan PAL, 4: US, 8: Europe\r
51a902ae 22int PicoAutoRgnOrder = 0;\r
602133e1 23struct PicoSRAM SRam = {0,};\r
24\r
f8ef8ff7 25void (*PicoWriteSound)(int len) = NULL; // called at the best time to send sound buffer (PsndOut) to hardware\r
26void (*PicoResetHook)(void) = NULL;\r
b0677887 27void (*PicoLineHook)(void) = NULL;\r
cc68a136 28\r
cc68a136 29// to be called once on emu init\r
2aa27095 30void PicoInit(void)\r
cc68a136 31{\r
32 // Blank space for state:\r
33 memset(&Pico,0,sizeof(Pico));\r
34 memset(&PicoPad,0,sizeof(PicoPad));\r
5f9a0d16 35 memset(&PicoPadInt,0,sizeof(PicoPadInt));\r
cc68a136 36\r
37 // Init CPUs:\r
38 SekInit();\r
39 z80_init(); // init even if we aren't going to use it\r
40\r
cc68a136 41 PicoInitMCD();\r
e807ac75 42 PicoSVPInit();\r
be2c4208 43 Pico32xInit();\r
cc68a136 44}\r
45\r
46// to be called once on emu exit\r
47void PicoExit(void)\r
48{\r
602133e1 49 if (PicoAHW & PAHW_MCD)\r
4f265db7 50 PicoExitMCD();\r
ca482e5d 51 PicoCartUnload();\r
cc68a136 52 z80_exit();\r
53\r
45f2f245 54 if (SRam.data)\r
55 free(SRam.data);\r
cc68a136 56}\r
57\r
1cb1584b 58void PicoPower(void)\r
59{\r
053fd9b4 60 Pico.m.frame_count = 0;\r
61\r
1cb1584b 62 // clear all memory of the emulated machine\r
63 memset(&Pico.ram,0,(unsigned int)&Pico.rom-(unsigned int)&Pico.ram);\r
64\r
65 memset(&Pico.video,0,sizeof(Pico.video));\r
66 memset(&Pico.m,0,sizeof(Pico.m));\r
67\r
68 Pico.video.pending_ints=0;\r
69 z80_reset();\r
70\r
71 // default VDP register values (based on Fusion)\r
72 Pico.video.reg[0] = Pico.video.reg[1] = 0x04;\r
73 Pico.video.reg[0xc] = 0x81;\r
74 Pico.video.reg[0xf] = 0x02;\r
75\r
602133e1 76 if (PicoAHW & PAHW_MCD)\r
1cb1584b 77 PicoPowerMCD();\r
78\r
974fdb5b 79 if (!(PicoOpt & POPT_DIS_32X))\r
80 PicoPower32x();\r
81\r
1cb1584b 82 PicoReset();\r
83}\r
84\r
1e6b5e39 85PICO_INTERNAL void PicoDetectRegion(void)\r
cc68a136 86{\r
1e6b5e39 87 int support=0, hw=0, i;\r
cc68a136 88 unsigned char pal=0;\r
cc68a136 89\r
1e6b5e39 90 if (PicoRegionOverride)\r
cc68a136 91 {\r
92 support = PicoRegionOverride;\r
93 }\r
94 else\r
95 {\r
96 // Read cartridge region data:\r
af37bca8 97 unsigned short *rd = (unsigned short *)(Pico.rom + 0x1f0);\r
98 int region = (rd[0] << 16) | rd[1];\r
cc68a136 99\r
af37bca8 100 for (i = 0; i < 4; i++)\r
cc68a136 101 {\r
af37bca8 102 int c;\r
cc68a136 103\r
af37bca8 104 c = region >> (i<<3);\r
105 c &= 0xff;\r
106 if (c <= ' ') continue;\r
cc68a136 107\r
51a902ae 108 if (c=='J') support|=1;\r
109 else if (c=='U') support|=4;\r
110 else if (c=='E') support|=8;\r
111 else if (c=='j') {support|=1; break; }\r
112 else if (c=='u') {support|=4; break; }\r
113 else if (c=='e') {support|=8; break; }\r
cc68a136 114 else\r
115 {\r
116 // New style code:\r
117 char s[2]={0,0};\r
118 s[0]=(char)c;\r
119 support|=strtol(s,NULL,16);\r
120 }\r
121 }\r
122 }\r
123\r
51a902ae 124 // auto detection order override\r
125 if (PicoAutoRgnOrder) {\r
126 if (((PicoAutoRgnOrder>>0)&0xf) & support) support = (PicoAutoRgnOrder>>0)&0xf;\r
127 else if (((PicoAutoRgnOrder>>4)&0xf) & support) support = (PicoAutoRgnOrder>>4)&0xf;\r
128 else if (((PicoAutoRgnOrder>>8)&0xf) & support) support = (PicoAutoRgnOrder>>8)&0xf;\r
129 }\r
130\r
cc68a136 131 // Try to pick the best hardware value for English/50hz:\r
132 if (support&8) { hw=0xc0; pal=1; } // Europe\r
133 else if (support&4) hw=0x80; // USA\r
134 else if (support&2) { hw=0x40; pal=1; } // Japan PAL\r
135 else if (support&1) hw=0x00; // Japan NTSC\r
136 else hw=0x80; // USA\r
137\r
138 Pico.m.hardware=(unsigned char)(hw|0x20); // No disk attached\r
139 Pico.m.pal=pal;\r
1e6b5e39 140}\r
141\r
142int PicoReset(void)\r
143{\r
2ec9bec5 144 if (Pico.romsize <= 0)\r
145 return 1;\r
1e6b5e39 146\r
147 /* must call now, so that banking is reset, and correct vectors get fetched */\r
2ec9bec5 148 if (PicoResetHook)\r
149 PicoResetHook();\r
1e6b5e39 150\r
5f9a0d16 151 memset(&PicoPadInt,0,sizeof(PicoPadInt));\r
2ec9bec5 152 emustatus = 0;\r
153\r
154 if (PicoAHW & PAHW_SMS) {\r
155 PicoResetMS();\r
156 return 0;\r
157 }\r
158\r
159 SekReset();\r
1e6b5e39 160 // s68k doesn't have the TAS quirk, so we just globally set normal TAS handler in MCD mode (used by Batman games).\r
161 SekSetRealTAS(PicoAHW & PAHW_MCD);\r
162 SekCycleCntT=0;\r
163\r
164 if (PicoAHW & PAHW_MCD)\r
165 // needed for MCD to reset properly, probably some bug hides behind this..\r
166 memset(Pico.ioports,0,sizeof(Pico.ioports));\r
1e6b5e39 167\r
168 Pico.m.dirtyPal = 1;\r
169\r
1832075e 170 Pico.m.z80_bank68k = 0;\r
af37bca8 171 Pico.m.z80_reset = 1;\r
1832075e 172 memset(Pico.zram, 0, sizeof(Pico.zram)); // ??\r
173\r
1e6b5e39 174 PicoDetectRegion();\r
e5fa9817 175 Pico.video.status = 0x3428 | Pico.m.pal; // 'always set' bits | vblank | collision | pal\r
cc68a136 176\r
9d917eea 177 PsndReset(); // pal must be known here\r
cc68a136 178\r
1cb1584b 179 // create an empty "dma" to cause 68k exec start at random frame location\r
2ec9bec5 180 if (Pico.m.dma_xfers == 0 && !(PicoOpt & POPT_DIS_VDP_FIFO))\r
1cb1584b 181 Pico.m.dma_xfers = rand() & 0x1fff;\r
182\r
5ed2a20e 183 SekFinishIdleDet();\r
184\r
602133e1 185 if (PicoAHW & PAHW_MCD) {\r
1cb1584b 186 PicoResetMCD();\r
cc68a136 187 return 0;\r
188 }\r
5ed2a20e 189\r
190 // reinit, so that checksum checks pass\r
191 if (!(PicoOpt & POPT_DIS_IDLE_DET))\r
192 SekInitIdleDet();\r
cc68a136 193\r
be2c4208 194 if (!(PicoOpt & POPT_DIS_32X)) {\r
195 PicoReset32x();\r
196 return 0;\r
197 }\r
198\r
1dceadae 199 // reset sram state; enable sram access by default if it doesn't overlap with ROM\r
45f2f245 200 Pico.m.sram_reg = 0;\r
201 if ((SRam.flags & SRF_EEPROM) || Pico.romsize <= SRam.start)\r
202 Pico.m.sram_reg |= SRR_MAPPED;\r
cc68a136 203\r
45f2f245 204 if (SRam.flags & SRF_ENABLED)\r
205 elprintf(EL_STATUS, "sram: %06x - %06x; eeprom: %i", SRam.start, SRam.end,\r
206 !!(SRam.flags & SRF_EEPROM));\r
cc68a136 207\r
208 return 0;\r
209}\r
210\r
1dceadae 211\r
69996cb7 212// dma2vram settings are just hacks to unglitch Legend of Galahad (needs <= 104 to work)\r
213// same for Outrunners (92-121, when active is set to 24)\r
48df6e9e 214// 96 is VR hack\r
69996cb7 215static const int dma_timings[] = {\r
053fd9b4 216 96, 167, 166, 83, // vblank: 32cell: dma2vram dma2[vs|c]ram vram_fill vram_copy\r
217 102, 205, 204, 102, // vblank: 40cell:\r
218 16, 16, 15, 8, // active: 32cell:\r
219 24, 18, 17, 9 // ...\r
4f672280 220};\r
221\r
69996cb7 222static const int dma_bsycles[] = {\r
053fd9b4 223 (488<<8)/96, (488<<8)/167, (488<<8)/166, (488<<8)/83,\r
224 (488<<8)/102, (488<<8)/205, (488<<8)/204, (488<<8)/102,\r
225 (488<<8)/16, (488<<8)/16, (488<<8)/15, (488<<8)/8,\r
226 (488<<8)/24, (488<<8)/18, (488<<8)/17, (488<<8)/9\r
312e9ce1 227};\r
228\r
eff55556 229PICO_INTERNAL int CheckDMA(void)\r
4f672280 230{\r
69996cb7 231 int burn = 0, xfers_can, dma_op = Pico.video.reg[0x17]>>6; // see gens for 00 and 01 modes\r
232 int xfers = Pico.m.dma_xfers;\r
312e9ce1 233 int dma_op1;\r
4f672280 234\r
312e9ce1 235 if(!(dma_op&2)) dma_op = (Pico.video.type==1) ? 0 : 1; // setting dma_timings offset here according to Gens\r
236 dma_op1 = dma_op;\r
237 if(Pico.video.reg[12] & 1) dma_op |= 4; // 40 cell mode?\r
238 if(!(Pico.video.status&8)&&(Pico.video.reg[1]&0x40)) dma_op|=8; // active display?\r
69996cb7 239 xfers_can = dma_timings[dma_op];\r
9761a7d0 240 if(xfers <= xfers_can)\r
241 {\r
4f672280 242 if(dma_op&2) Pico.video.status&=~2; // dma no longer busy\r
243 else {\r
69996cb7 244 burn = xfers * dma_bsycles[dma_op] >> 8; // have to be approximate because can't afford division..\r
4f672280 245 }\r
69996cb7 246 Pico.m.dma_xfers = 0;\r
4f672280 247 } else {\r
248 if(!(dma_op&2)) burn = 488;\r
69996cb7 249 Pico.m.dma_xfers -= xfers_can;\r
4f672280 250 }\r
251\r
69996cb7 252 elprintf(EL_VDPDMA, "~Dma %i op=%i can=%i burn=%i [%i]", Pico.m.dma_xfers, dma_op1, xfers_can, burn, SekCyclesDone());\r
312e9ce1 253 //dprintf("~aim: %i, cnt: %i", SekCycleAim, SekCycleCnt);\r
254 return burn;\r
4f672280 255}\r
256\r
bf5fbbb4 257static __inline void SekRunM68k(int cyc)\r
cc68a136 258{\r
259 int cyc_do;\r
260 SekCycleAim+=cyc;\r
053fd9b4 261 if ((cyc_do=SekCycleAim-SekCycleCnt) <= 0) return;\r
03e4f2a3 262#if defined(EMU_CORE_DEBUG)\r
263 // this means we do run-compare\r
b5e5172d 264 SekCycleCnt+=CM_compareRun(cyc_do, 0);\r
cc68a136 265#elif defined(EMU_C68K)\r
3aa1e148 266 PicoCpuCM68k.cycles=cyc_do;\r
267 CycloneRun(&PicoCpuCM68k);\r
268 SekCycleCnt+=cyc_do-PicoCpuCM68k.cycles;\r
cc68a136 269#elif defined(EMU_M68K)\r
270 SekCycleCnt+=m68k_execute(cyc_do);\r
70357ce5 271#elif defined(EMU_F68K)\r
c060a9ab 272 SekCycleCnt+=fm68k_emulate(cyc_do+1, 0, 0);\r
cc68a136 273#endif\r
274}\r
275\r
efcba75f 276#include "pico_cmn.c"\r
4b9c5888 277\r
278int z80stopCycle;\r
279int z80_cycle_cnt; /* 'done' z80 cycles before z80_run() */\r
280int z80_cycle_aim;\r
281int z80_scanline;\r
282int z80_scanline_cycles; /* cycles done until z80_scanline */\r
283\r
284/* sync z80 to 68k */\r
285PICO_INTERNAL void PicoSyncZ80(int m68k_cycles_done)\r
cc68a136 286{\r
4b9c5888 287 int cnt;\r
288 z80_cycle_aim = cycles_68k_to_z80(m68k_cycles_done);\r
289 cnt = z80_cycle_aim - z80_cycle_cnt;\r
cc68a136 290\r
e5fa9817 291 elprintf(EL_BUSREQ, "z80 sync %i (%i|%i -> %i|%i)", cnt, z80_cycle_cnt, z80_cycle_cnt / 228,\r
4b9c5888 292 z80_cycle_aim, z80_cycle_aim / 228);\r
293\r
294 if (cnt > 0)\r
295 z80_cycle_cnt += z80_run(cnt);\r
cc68a136 296}\r
297\r
4b9c5888 298\r
2aa27095 299void PicoFrame(void)\r
cc68a136 300{\r
8c1952f0 301 Pico.m.frame_count++;\r
302\r
19954be1 303 if (PicoAHW & PAHW_SMS) {\r
304 PicoFrameMS();\r
2aa27095 305 return;\r
cc68a136 306 }\r
19954be1 307\r
974fdb5b 308 // TODO: MCD+32X\r
19954be1 309 if (PicoAHW & PAHW_MCD) {\r
310 PicoFrameMCD();\r
3e49ffd0 311 return;\r
312 }\r
cc68a136 313\r
974fdb5b 314 if (PicoAHW & PAHW_32X) {\r
315 PicoFrame32x();\r
316 return;\r
317 }\r
318\r
cc68a136 319 //if(Pico.video.reg[12]&0x2) Pico.video.status ^= 0x10; // change odd bit in interlace mode\r
320\r
19954be1 321 PicoFrameStart();\r
2aa27095 322 PicoFrameHints();\r
cc68a136 323}\r
324\r
a12e0116 325void PicoFrameDrawOnly(void)\r
326{\r
87b0845f 327 if (!(PicoAHW & PAHW_SMS)) {\r
328 PicoFrameStart();\r
329 PicoDrawSync(223, 0);\r
330 } else {\r
331 PicoFrameDrawOnlyMS();\r
332 }\r
a12e0116 333}\r
334\r
4609d0cd 335void PicoGetInternal(pint_t which, pint_ret_t *r)\r
8e5427a0 336{\r
337 switch (which)\r
338 {\r
4609d0cd 339 case PI_ROM: r->vptr = Pico.rom; break;\r
340 case PI_ISPAL: r->vint = Pico.m.pal; break;\r
341 case PI_IS40_CELL: r->vint = Pico.video.reg[12]&1; break;\r
342 case PI_IS240_LINES: r->vint = Pico.m.pal && (Pico.video.reg[1]&8); break;\r
8e5427a0 343 }\r
8e5427a0 344}\r
345\r
66fdc0f0 346// callback to output message from emu\r
347void (*PicoMessage)(const char *msg)=NULL;\r
cc68a136 348\r