fixes for idle and other stuff
[picodrive.git] / pico / sek.c
CommitLineData
cff531af 1/*\r
2 * PicoDrive\r
3 * (c) Copyright Dave, 2004\r
4 * (C) notaz, 2006-2009\r
5 *\r
6 * This work is licensed under the terms of MAME license.\r
7 * See COPYING file in the top-level directory.\r
8 */\r
cc68a136 9\r
efcba75f 10#include "pico_int.h"\r
488c0bbf 11#include "memory.h"\r
cc68a136 12\r
13\r
14int SekCycleCnt=0; // cycles done in this frame\r
15int SekCycleAim=0; // cycle aim\r
16unsigned int SekCycleCntT=0;\r
17\r
70357ce5 18\r
19/* context */\r
20// Cyclone 68000\r
cc68a136 21#ifdef EMU_C68K\r
3aa1e148 22struct Cyclone PicoCpuCM68k;\r
cc68a136 23#endif\r
70357ce5 24// MUSASHI 68000\r
cc68a136 25#ifdef EMU_M68K\r
3aa1e148 26m68ki_cpu_core PicoCpuMM68k;\r
cc68a136 27#endif\r
70357ce5 28// FAME 68000\r
29#ifdef EMU_F68K\r
3aa1e148 30M68K_CONTEXT PicoCpuFM68k;\r
cc68a136 31#endif\r
32\r
33\r
70357ce5 34/* callbacks */\r
cc68a136 35#ifdef EMU_C68K\r
b837b69b 36// interrupt acknowledgment\r
0af33fe0 37static int SekIntAck(int level)\r
cc68a136 38{\r
39 // try to emulate VDP's reaction to 68000 int ack\r
69996cb7 40 if (level == 4) { Pico.video.pending_ints = 0; elprintf(EL_INTS, "hack: @ %06x [%i]", SekPc, SekCycleCnt); }\r
41 else if(level == 6) { Pico.video.pending_ints &= ~0x20; elprintf(EL_INTS, "vack: @ %06x [%i]", SekPc, SekCycleCnt); }\r
3aa1e148 42 PicoCpuCM68k.irq = 0;\r
0af33fe0 43 return CYCLONE_INT_ACK_AUTOVECTOR;\r
cc68a136 44}\r
45\r
69996cb7 46static void SekResetAck(void)\r
cc68a136 47{\r
69996cb7 48 elprintf(EL_ANOMALY, "Reset encountered @ %06x", SekPc);\r
cc68a136 49}\r
50\r
51static int SekUnrecognizedOpcode()\r
52{\r
b4db550e 53 unsigned int pc;\r
cc68a136 54 pc = SekPc;\r
b4db550e 55 elprintf(EL_ANOMALY, "Unrecognized Opcode @ %06x", pc);\r
56 // see if we are still in a mapped region\r
57 pc &= 0x00ffffff;\r
58 if (map_flag_set(m68k_read16_map[pc >> M68K_MEM_SHIFT])) {\r
59 elprintf(EL_STATUS|EL_ANOMALY, "m68k crash @%06x", pc);\r
3aa1e148 60 PicoCpuCM68k.cycles = 0;\r
61 PicoCpuCM68k.state_flags |= 1;\r
cc68a136 62 return 1;\r
63 }\r
2d0b15bb 64#ifdef EMU_M68K // debugging cyclone\r
65 {\r
66 extern int have_illegal;\r
67 have_illegal = 1;\r
68 }\r
69#endif\r
cc68a136 70 return 0;\r
71}\r
72#endif\r
73\r
74\r
75#ifdef EMU_M68K\r
76static int SekIntAckM68K(int level)\r
77{\r
69996cb7 78 if (level == 4) { Pico.video.pending_ints = 0; elprintf(EL_INTS, "hack: @ %06x [%i]", SekPc, SekCycleCnt); }\r
79 else if(level == 6) { Pico.video.pending_ints &= ~0x20; elprintf(EL_INTS, "vack: @ %06x [%i]", SekPc, SekCycleCnt); }\r
cc68a136 80 CPU_INT_LEVEL = 0;\r
81 return M68K_INT_ACK_AUTOVECTOR;\r
82}\r
0af33fe0 83\r
84static int SekTasCallback(void)\r
85{\r
86 return 0; // no writeback\r
87}\r
cc68a136 88#endif\r
89\r
90\r
70357ce5 91#ifdef EMU_F68K\r
3aa1e148 92static void SekIntAckF68K(unsigned level)\r
70357ce5 93{\r
94 if (level == 4) { Pico.video.pending_ints = 0; elprintf(EL_INTS, "hack: @ %06x [%i]", SekPc, SekCycleCnt); }\r
95 else if(level == 6) { Pico.video.pending_ints &= ~0x20; elprintf(EL_INTS, "vack: @ %06x [%i]", SekPc, SekCycleCnt); }\r
3aa1e148 96 PicoCpuFM68k.interrupts[0] = 0;\r
70357ce5 97}\r
98#endif\r
99\r
cc68a136 100\r
2aa27095 101PICO_INTERNAL void SekInit(void)\r
cc68a136 102{\r
103#ifdef EMU_C68K\r
104 CycloneInit();\r
3aa1e148 105 memset(&PicoCpuCM68k,0,sizeof(PicoCpuCM68k));\r
106 PicoCpuCM68k.IrqCallback=SekIntAck;\r
107 PicoCpuCM68k.ResetCallback=SekResetAck;\r
108 PicoCpuCM68k.UnrecognizedCallback=SekUnrecognizedOpcode;\r
03e4f2a3 109 PicoCpuCM68k.flags=4; // Z set\r
cc68a136 110#endif\r
cc68a136 111#ifdef EMU_M68K\r
112 {\r
113 void *oldcontext = m68ki_cpu_p;\r
3aa1e148 114 m68k_set_context(&PicoCpuMM68k);\r
cc68a136 115 m68k_set_cpu_type(M68K_CPU_TYPE_68000);\r
116 m68k_init();\r
117 m68k_set_int_ack_callback(SekIntAckM68K);\r
0af33fe0 118 m68k_set_tas_instr_callback(SekTasCallback);\r
9037e45d 119 //m68k_pulse_reset();\r
cc68a136 120 m68k_set_context(oldcontext);\r
121 }\r
122#endif\r
70357ce5 123#ifdef EMU_F68K\r
124 {\r
125 void *oldcontext = g_m68kcontext;\r
3aa1e148 126 g_m68kcontext = &PicoCpuFM68k;\r
127 memset(&PicoCpuFM68k, 0, sizeof(PicoCpuFM68k));\r
03e4f2a3 128 fm68k_init();\r
3aa1e148 129 PicoCpuFM68k.iack_handler = SekIntAckF68K;\r
b5e5172d 130 PicoCpuFM68k.sr = 0x2704; // Z flag\r
70357ce5 131 g_m68kcontext = oldcontext;\r
132 }\r
133#endif\r
cc68a136 134}\r
135\r
70357ce5 136\r
cc68a136 137// Reset the 68000:\r
2aa27095 138PICO_INTERNAL int SekReset(void)\r
cc68a136 139{\r
140 if (Pico.rom==NULL) return 1;\r
141\r
142#ifdef EMU_C68K\r
5e89f0f5 143 CycloneReset(&PicoCpuCM68k);\r
cc68a136 144#endif\r
cc68a136 145#ifdef EMU_M68K\r
3aa1e148 146 m68k_set_context(&PicoCpuMM68k); // if we ever reset m68k, we always need it's context to be set\r
2d0b15bb 147 m68ki_cpu.sp[0]=0;\r
148 m68k_set_irq(0);\r
b837b69b 149 m68k_pulse_reset();\r
99464b62 150 REG_USP = 0; // ?\r
cc68a136 151#endif\r
70357ce5 152#ifdef EMU_F68K\r
153 {\r
3aa1e148 154 g_m68kcontext = &PicoCpuFM68k;\r
03e4f2a3 155 fm68k_reset();\r
70357ce5 156 }\r
157#endif\r
cc68a136 158\r
159 return 0;\r
160}\r
161\r
5f9a0d16 162void SekStepM68k(void)\r
163{\r
164 SekCycleAim=SekCycleCnt+1;\r
165#if defined(EMU_CORE_DEBUG)\r
166 SekCycleCnt+=CM_compareRun(1, 0);\r
167#elif defined(EMU_C68K)\r
168 PicoCpuCM68k.cycles=1;\r
169 CycloneRun(&PicoCpuCM68k);\r
170 SekCycleCnt+=1-PicoCpuCM68k.cycles;\r
171#elif defined(EMU_M68K)\r
172 SekCycleCnt+=m68k_execute(1);\r
173#elif defined(EMU_F68K)\r
f579f7b8 174 SekCycleCnt+=fm68k_emulate(1, 0, 0);\r
5f9a0d16 175#endif\r
176}\r
cc68a136 177\r
eff55556 178PICO_INTERNAL void SekSetRealTAS(int use_real)\r
2433f409 179{\r
180#ifdef EMU_C68K\r
181 CycloneSetRealTAS(use_real);\r
182#endif\r
70357ce5 183#ifdef EMU_F68K\r
184 // TODO\r
185#endif\r
2433f409 186}\r
187\r
b4db550e 188// Pack the cpu into a common format:\r
189// XXX: rename\r
190PICO_INTERNAL void SekPackCpu(unsigned char *cpu, int is_sub)\r
191{\r
192 unsigned int pc=0;\r
193\r
194#if defined(EMU_C68K)\r
195 struct Cyclone *context = is_sub ? &PicoCpuCS68k : &PicoCpuCM68k;\r
196 memcpy(cpu,context->d,0x40);\r
197 pc=context->pc-context->membase;\r
198 *(unsigned int *)(cpu+0x44)=CycloneGetSr(context);\r
199 *(unsigned int *)(cpu+0x48)=context->osp;\r
200 cpu[0x4c] = context->irq;\r
201 cpu[0x4d] = context->state_flags & 1;\r
202#elif defined(EMU_M68K)\r
203 void *oldcontext = m68ki_cpu_p;\r
204 m68k_set_context(is_sub ? &PicoCpuMS68k : &PicoCpuMM68k);\r
205 memcpy(cpu,m68ki_cpu_p->dar,0x40);\r
206 pc=m68ki_cpu_p->pc;\r
207 *(unsigned int *)(cpu+0x44)=m68k_get_reg(NULL, M68K_REG_SR);\r
208 *(unsigned int *)(cpu+0x48)=m68ki_cpu_p->sp[m68ki_cpu_p->s_flag^SFLAG_SET];\r
209 cpu[0x4c] = CPU_INT_LEVEL>>8;\r
210 cpu[0x4d] = CPU_STOPPED;\r
211 m68k_set_context(oldcontext);\r
212#elif defined(EMU_F68K)\r
213 M68K_CONTEXT *context = is_sub ? &PicoCpuFS68k : &PicoCpuFM68k;\r
214 memcpy(cpu,context->dreg,0x40);\r
215 pc=context->pc;\r
216 *(unsigned int *)(cpu+0x44)=context->sr;\r
217 *(unsigned int *)(cpu+0x48)=context->asp;\r
218 cpu[0x4c] = context->interrupts[0];\r
219 cpu[0x4d] = (context->execinfo & FM68K_HALTED) ? 1 : 0;\r
220#endif\r
221\r
6a98f03e 222 *(unsigned int *)(cpu+0x40) = pc;\r
223 *(unsigned int *)(cpu+0x50) = SekCycleCntT;\r
b4db550e 224}\r
225\r
226PICO_INTERNAL void SekUnpackCpu(const unsigned char *cpu, int is_sub)\r
227{\r
228#if defined(EMU_C68K)\r
229 struct Cyclone *context = is_sub ? &PicoCpuCS68k : &PicoCpuCM68k;\r
230 CycloneSetSr(context, *(unsigned int *)(cpu+0x44));\r
231 context->osp=*(unsigned int *)(cpu+0x48);\r
232 memcpy(context->d,cpu,0x40);\r
233 context->membase = 0;\r
234 context->pc = *(unsigned int *)(cpu+0x40);\r
235 CycloneUnpack(context, NULL); // rebase PC\r
236 context->irq = cpu[0x4c];\r
237 context->state_flags = 0;\r
238 if (cpu[0x4d])\r
239 context->state_flags |= 1;\r
240#elif defined(EMU_M68K)\r
241 void *oldcontext = m68ki_cpu_p;\r
242 m68k_set_context(is_sub ? &PicoCpuMS68k : &PicoCpuMM68k);\r
243 m68k_set_reg(M68K_REG_SR, *(unsigned int *)(cpu+0x44));\r
244 memcpy(m68ki_cpu_p->dar,cpu,0x40);\r
245 m68ki_cpu_p->pc=*(unsigned int *)(cpu+0x40);\r
246 m68ki_cpu_p->sp[m68ki_cpu_p->s_flag^SFLAG_SET]=*(unsigned int *)(cpu+0x48);\r
247 CPU_INT_LEVEL = cpu[0x4c] << 8;\r
248 CPU_STOPPED = cpu[0x4d];\r
249 m68k_set_context(oldcontext);\r
250#elif defined(EMU_F68K)\r
251 M68K_CONTEXT *context = is_sub ? &PicoCpuFS68k : &PicoCpuFM68k;\r
252 memcpy(context->dreg,cpu,0x40);\r
253 context->pc =*(unsigned int *)(cpu+0x40);\r
254 context->sr =*(unsigned int *)(cpu+0x44);\r
255 context->asp=*(unsigned int *)(cpu+0x48);\r
256 context->interrupts[0] = cpu[0x4c];\r
257 context->execinfo &= ~FM68K_HALTED;\r
258 if (cpu[0x4d]&1) context->execinfo |= FM68K_HALTED;\r
259#endif\r
6a98f03e 260 SekCycleCntT = *(unsigned int *)(cpu+0x50);\r
b4db550e 261}\r
262\r
5f9a0d16 263\r
053fd9b4 264/* idle loop detection, not to be used in CD mode */\r
265#ifdef EMU_C68K\r
d4d62665 266#include "cpu/cyclone/tools/idle.h"\r
053fd9b4 267#endif\r
268\r
488c0bbf 269static unsigned short **idledet_ptrs = NULL;\r
053fd9b4 270static int idledet_count = 0, idledet_bads = 0;\r
0219d379 271static int idledet_start_frame = 0;\r
053fd9b4 272\r
5ed2a20e 273#if 0\r
274#define IDLE_STATS 1\r
275unsigned int idlehit_addrs[128], idlehit_counts[128];\r
276\r
277void SekRegisterIdleHit(unsigned int pc)\r
278{\r
279 int i;\r
280 for (i = 0; i < 127 && idlehit_addrs[i]; i++) {\r
281 if (idlehit_addrs[i] == pc) {\r
282 idlehit_counts[i]++;\r
283 return;\r
284 }\r
285 }\r
286 idlehit_addrs[i] = pc;\r
287 idlehit_counts[i] = 1;\r
288 idlehit_addrs[i+1] = 0;\r
289}\r
290#endif\r
291\r
053fd9b4 292void SekInitIdleDet(void)\r
293{\r
488c0bbf 294 unsigned short **tmp = realloc(idledet_ptrs, 0x200*4);\r
053fd9b4 295 if (tmp == NULL) {\r
488c0bbf 296 free(idledet_ptrs);\r
297 idledet_ptrs = NULL;\r
053fd9b4 298 }\r
299 else\r
488c0bbf 300 idledet_ptrs = tmp;\r
053fd9b4 301 idledet_count = idledet_bads = 0;\r
302 idledet_start_frame = Pico.m.frame_count + 360;\r
5ed2a20e 303#ifdef IDLE_STATS\r
304 idlehit_addrs[0] = 0;\r
305#endif\r
053fd9b4 306\r
053fd9b4 307#ifdef EMU_C68K\r
308 CycloneInitIdle();\r
309#endif\r
c060a9ab 310#ifdef EMU_F68K\r
c060a9ab 311 fm68k_emulate(0, 0, 1);\r
312#endif\r
053fd9b4 313}\r
314\r
0219d379 315int SekIsIdleReady(void)\r
316{\r
317 return (Pico.m.frame_count >= idledet_start_frame);\r
318}\r
319\r
053fd9b4 320int SekIsIdleCode(unsigned short *dst, int bytes)\r
321{\r
8187ba84 322 // printf("SekIsIdleCode %04x %i\n", *dst, bytes);\r
053fd9b4 323 switch (bytes)\r
324 {\r
5ed2a20e 325 case 2:\r
326 if ((*dst & 0xf000) != 0x6000) // not another branch\r
327 return 1;\r
328 break;\r
053fd9b4 329 case 4:\r
0219d379 330 if ( (*dst & 0xff3f) == 0x4a38 || // tst.x ($xxxx.w); tas ($xxxx.w)\r
331 (*dst & 0xc1ff) == 0x0038 || // move.x ($xxxx.w), dX\r
332 (*dst & 0xf13f) == 0xb038) // cmp.x ($xxxx.w), dX\r
333 return 1;\r
334 if (PicoAHW & (PAHW_MCD|PAHW_32X))\r
335 break;\r
336 // with no addons, there should be no need to wait\r
337 // for byte change anywhere\r
338 if ( (*dst & 0xfff8) == 0x4a10 || // tst.b ($aX)\r
339 (*dst & 0xfff8) == 0x4a28) // tst.b ($xxxx,a0)\r
053fd9b4 340 return 1;\r
341 break;\r
342 case 6:\r
b0677887 343 if ( ((dst[1] & 0xe0) == 0xe0 && ( // RAM and\r
344 *dst == 0x4a39 || // tst.b ($xxxxxxxx)\r
345 *dst == 0x4a79 || // tst.w ($xxxxxxxx)\r
346 *dst == 0x4ab9 || // tst.l ($xxxxxxxx)\r
347 (*dst & 0xc1ff) == 0x0039 || // move.x ($xxxxxxxx), dX\r
348 (*dst & 0xf13f) == 0xb039))||// cmp.x ($xxxxxxxx), dX\r
349 *dst == 0x0838 || // btst $X, ($xxxx.w) [6 byte op]\r
350 (*dst & 0xffbf) == 0x0c38) // cmpi.{b,w} $X, ($xxxx.w)\r
053fd9b4 351 return 1;\r
352 break;\r
353 case 8:\r
b0677887 354 if ( ((dst[2] & 0xe0) == 0xe0 && ( // RAM and\r
355 *dst == 0x0839 || // btst $X, ($xxxxxxxx.w) [8 byte op]\r
356 (*dst & 0xffbf) == 0x0c39))||// cmpi.{b,w} $X, ($xxxxxxxx)\r
357 *dst == 0x0cb8) // cmpi.l $X, ($xxxx.w)\r
053fd9b4 358 return 1;\r
359 break;\r
360 case 12:\r
0219d379 361 if (PicoAHW & (PAHW_MCD|PAHW_32X))\r
362 break;\r
363 if ( (*dst & 0xf1f8) == 0x3010 && // move.w (aX), dX\r
b0677887 364 (dst[1]&0xf100) == 0x0000 && // arithmetic\r
365 (dst[3]&0xf100) == 0x0000) // arithmetic\r
053fd9b4 366 return 1;\r
367 break;\r
368 }\r
369\r
370 return 0;\r
371}\r
372\r
5ed2a20e 373int SekRegisterIdlePatch(unsigned int pc, int oldop, int newop, void *ctx)\r
053fd9b4 374{\r
5ed2a20e 375 int is_main68k = 1;\r
488c0bbf 376 u16 *target;\r
377 uptr v;\r
378\r
5ed2a20e 379#if defined(EMU_C68K)\r
380 struct Cyclone *cyc = ctx;\r
381 is_main68k = cyc == &PicoCpuCM68k;\r
382 pc -= cyc->membase;\r
383#elif defined(EMU_F68K)\r
384 is_main68k = ctx == &PicoCpuFM68k;\r
053fd9b4 385#endif\r
386 pc &= ~0xff000000;\r
0219d379 387 if (!(newop&0x200))\r
5ed2a20e 388 elprintf(EL_IDLE, "idle: patch %06x %04x %04x %c %c #%i", pc, oldop, newop,\r
389 (newop&0x200)?'n':'y', is_main68k?'m':'s', idledet_count);\r
390\r
488c0bbf 391 // XXX: probably shouldn't patch RAM too\r
392 v = m68k_read16_map[pc >> M68K_MEM_SHIFT];\r
393 if (!(v & 0x80000000))\r
394 target = (u16 *)((v << 1) + pc);\r
395 else {\r
396 if (++idledet_bads > 128)\r
397 return 2; // remove detector\r
053fd9b4 398 return 1; // don't patch\r
399 }\r
400\r
401 if (idledet_count >= 0x200 && (idledet_count & 0x1ff) == 0) {\r
488c0bbf 402 unsigned short **tmp = realloc(idledet_ptrs, (idledet_count+0x200)*4);\r
403 if (tmp == NULL)\r
404 return 1;\r
405 idledet_ptrs = tmp;\r
053fd9b4 406 }\r
407\r
488c0bbf 408 idledet_ptrs[idledet_count++] = target;\r
b0677887 409\r
053fd9b4 410 return 0;\r
411}\r
412\r
413void SekFinishIdleDet(void)\r
414{\r
053fd9b4 415#ifdef EMU_C68K\r
416 CycloneFinishIdle();\r
c060a9ab 417#endif\r
418#ifdef EMU_F68K\r
419 fm68k_emulate(0, 0, 2);\r
053fd9b4 420#endif\r
421 while (idledet_count > 0)\r
422 {\r
488c0bbf 423 unsigned short *op = idledet_ptrs[--idledet_count];\r
053fd9b4 424 if ((*op & 0xfd00) == 0x7100)\r
425 *op &= 0xff, *op |= 0x6600;\r
426 else if ((*op & 0xfd00) == 0x7500)\r
427 *op &= 0xff, *op |= 0x6700;\r
428 else if ((*op & 0xfd00) == 0x7d00)\r
429 *op &= 0xff, *op |= 0x6000;\r
430 else\r
431 elprintf(EL_STATUS|EL_IDLE, "idle: don't know how to restore %04x", *op);\r
432 }\r
053fd9b4 433}\r
434\r
435\r
12da51c2 436#if defined(CPU_CMP_R) || defined(CPU_CMP_W)\r
437#include "debug.h"\r
438\r
439struct ref_68k {\r
440 u32 dar[16];\r
441 u32 pc;\r
442 u32 sr;\r
443 u32 cycles;\r
444 u32 pc_prev;\r
445};\r
446struct ref_68k ref_68ks[2];\r
447static int current_68k;\r
448\r
449void SekTrace(int is_s68k)\r
450{\r
451 struct ref_68k *x68k = &ref_68ks[is_s68k];\r
452 u32 pc = is_s68k ? SekPcS68k : SekPc;\r
453 u32 sr = is_s68k ? SekSrS68k : SekSr;\r
454 u32 cycles = is_s68k ? SekCycleCntS68k : SekCycleCnt;\r
455 u32 r;\r
456 u8 cmd;\r
457#ifdef CPU_CMP_W\r
458 int i;\r
459\r
460 if (is_s68k != current_68k) {\r
461 current_68k = is_s68k;\r
462 cmd = CTL_68K_SLAVE | current_68k;\r
463 tl_write(&cmd, sizeof(cmd));\r
464 }\r
465 if (pc != x68k->pc) {\r
466 x68k->pc = pc;\r
467 tl_write_uint(CTL_68K_PC, x68k->pc);\r
468 }\r
469 if (sr != x68k->sr) {\r
470 x68k->sr = sr;\r
471 tl_write_uint(CTL_68K_SR, x68k->sr);\r
472 }\r
473 for (i = 0; i < 16; i++) {\r
474 r = is_s68k ? SekDarS68k(i) : SekDar(i);\r
475 if (r != x68k->dar[i]) {\r
476 x68k->dar[i] = r;\r
477 tl_write_uint(CTL_68K_R + i, r);\r
478 }\r
479 }\r
480 tl_write_uint(CTL_68K_CYCLES, cycles);\r
481#else\r
482 int i, bad = 0;\r
483\r
484 while (1)\r
485 {\r
486 int ret = tl_read(&cmd, sizeof(cmd));\r
487 if (ret == 0) {\r
488 elprintf(EL_STATUS, "EOF");\r
489 exit(1);\r
490 }\r
491 switch (cmd) {\r
492 case CTL_68K_SLAVE:\r
493 case CTL_68K_SLAVE + 1:\r
494 current_68k = cmd & 1;\r
495 break;\r
496 case CTL_68K_PC:\r
497 tl_read_uint(&x68k->pc);\r
498 break;\r
499 case CTL_68K_SR:\r
500 tl_read_uint(&x68k->sr);\r
501 break;\r
502 case CTL_68K_CYCLES:\r
503 tl_read_uint(&x68k->cycles);\r
504 goto breakloop;\r
505 default:\r
506 if (CTL_68K_R <= cmd && cmd < CTL_68K_R + 0x10)\r
507 tl_read_uint(&x68k->dar[cmd - CTL_68K_R]);\r
508 else\r
509 elprintf(EL_STATUS, "invalid cmd: %02x", cmd);\r
510 }\r
511 }\r
512\r
513breakloop:\r
514 if (is_s68k != current_68k) {\r
515 printf("bad 68k: %d %d\n", is_s68k, current_68k);\r
516 bad = 1;\r
517 }\r
518 if (cycles != x68k->cycles) {\r
519 printf("bad cycles: %u %u\n", cycles, x68k->cycles);\r
520 bad = 1;\r
521 }\r
522 if ((pc ^ x68k->pc) & 0xffffff) {\r
523 printf("bad PC: %08x %08x\n", pc, x68k->pc);\r
524 bad = 1;\r
525 }\r
526 if (sr != x68k->sr) {\r
527 printf("bad SR: %03x %03x\n", sr, x68k->sr);\r
528 bad = 1;\r
529 }\r
530 for (i = 0; i < 16; i++) {\r
531 r = is_s68k ? SekDarS68k(i) : SekDar(i);\r
532 if (r != x68k->dar[i]) {\r
533 printf("bad %c%d: %08x %08x\n", i < 8 ? 'D' : 'A', i & 7,\r
534 r, x68k->dar[i]);\r
535 bad = 1;\r
536 }\r
537 }\r
538 if (bad) {\r
539 for (i = 0; i < 8; i++)\r
540 printf("D%d: %08x A%d: %08x\n", i, x68k->dar[i],\r
541 i, x68k->dar[i + 8]);\r
542 printf("PC: %08x, %08x\n", x68k->pc, x68k->pc_prev);\r
543\r
544 PDebugDumpMem();\r
545 exit(1);\r
546 }\r
547 x68k->pc_prev = x68k->pc;\r
548#endif\r
549}\r
550#endif // CPU_CMP_*\r
551\r
6cab49fd 552#if defined(EMU_M68K) && M68K_INSTRUCTION_HOOK == OPT_SPECIFY_HANDLER\r
553static unsigned char op_flags[0x400000/2] = { 0, };\r
554static int atexit_set = 0;\r
555\r
556static void make_idc(void)\r
557{\r
558 FILE *f = fopen("idc.idc", "w");\r
559 int i;\r
560 if (!f) return;\r
561 fprintf(f, "#include <idc.idc>\nstatic main() {\n");\r
562 for (i = 0; i < 0x400000/2; i++)\r
563 if (op_flags[i] != 0)\r
564 fprintf(f, " MakeCode(0x%06x);\n", i*2);\r
565 fprintf(f, "}\n");\r
566 fclose(f);\r
567}\r
568\r
569void instruction_hook(void)\r
570{\r
571 if (!atexit_set) {\r
572 atexit(make_idc);\r
573 atexit_set = 1;\r
574 }\r
575 if (REG_PC < 0x400000)\r
576 op_flags[REG_PC/2] = 1;\r
577}\r
578#endif\r
12da51c2 579\r
580// vim:shiftwidth=2:ts=2:expandtab\r