[picodrive.git] / pico / sek.c

/*\r
 * PicoDrive\r
 * (c) Copyright Dave, 2004\r
 * (C) notaz, 2006-2009\r
 *\r
 * This work is licensed under the terms of MAME license.\r
 * See COPYING file in the top-level directory.\r
 */\r
\r
#include "pico_int.h"\r
#include "memory.h"\r
\r
\r
unsigned int SekCycleCnt;\r
unsigned int SekCycleAim;\r
\r
\r
/* context */\r
// Cyclone 68000\r
#ifdef EMU_C68K\r
struct Cyclone PicoCpuCM68k;\r
#endif\r
// MUSASHI 68000\r
#ifdef EMU_M68K\r
m68ki_cpu_core PicoCpuMM68k;\r
#endif\r
// FAME 68000\r
#ifdef EMU_F68K\r
M68K_CONTEXT PicoCpuFM68k;\r
#endif\r
\r
\r
/* callbacks */\r
#ifdef EMU_C68K\r
// interrupt acknowledgment\r
static int SekIntAck(int level)\r
{\r
  // try to emulate VDP's reaction to 68000 int ack\r
  if     (level == 4) { Pico.video.pending_ints  =  0;    elprintf(EL_INTS, "hack: @ %06x [%i]", SekPc, SekCycleCnt); }\r
  else if(level == 6) { Pico.video.pending_ints &= ~0x20; elprintf(EL_INTS, "vack: @ %06x [%i]", SekPc, SekCycleCnt); }\r
  PicoCpuCM68k.irq = 0;\r
  return CYCLONE_INT_ACK_AUTOVECTOR;\r
}\r
\r
static void SekResetAck(void)\r
{\r
  elprintf(EL_ANOMALY, "Reset encountered @ %06x", SekPc);\r
}\r
\r
static int SekUnrecognizedOpcode()\r
{\r
  unsigned int pc;\r
  pc = SekPc;\r
  elprintf(EL_ANOMALY, "Unrecognized Opcode @ %06x", pc);\r
  // see if we are still in a mapped region\r
  pc &= 0x00ffffff;\r
  if (map_flag_set(m68k_read16_map[pc >> M68K_MEM_SHIFT])) {\r
    elprintf(EL_STATUS|EL_ANOMALY, "m68k crash @%06x", pc);\r
    PicoCpuCM68k.cycles = 0;\r
    PicoCpuCM68k.state_flags |= 1;\r
    return 1;\r
  }\r
#ifdef EMU_M68K // debugging cyclone\r
  {\r
    extern int have_illegal;\r
    have_illegal = 1;\r
  }\r
#endif\r
  return 0;\r
}\r
#endif\r
\r
\r
#ifdef EMU_M68K\r
static int SekIntAckM68K(int level)\r
{\r
  if     (level == 4) { Pico.video.pending_ints  =  0;    elprintf(EL_INTS, "hack: @ %06x [%i]", SekPc, SekCycleCnt); }\r
  else if(level == 6) { Pico.video.pending_ints &= ~0x20; elprintf(EL_INTS, "vack: @ %06x [%i]", SekPc, SekCycleCnt); }\r
  CPU_INT_LEVEL = 0;\r
  return M68K_INT_ACK_AUTOVECTOR;\r
}\r
\r
static int SekTasCallback(void)\r
{\r
  return 0; // no writeback\r
}\r
#endif\r
\r
\r
#ifdef EMU_F68K\r
static void SekIntAckF68K(unsigned level)\r
{\r
  if     (level == 4) { Pico.video.pending_ints  =  0;    elprintf(EL_INTS, "hack: @ %06x [%i]", SekPc, SekCycleCnt); }\r
  else if(level == 6) { Pico.video.pending_ints &= ~0x20; elprintf(EL_INTS, "vack: @ %06x [%i]", SekPc, SekCycleCnt); }\r
  PicoCpuFM68k.interrupts[0] = 0;\r
}\r
#endif\r
\r
\r
PICO_INTERNAL void SekInit(void)\r
{\r
#ifdef EMU_C68K\r
  CycloneInit();\r
  memset(&PicoCpuCM68k,0,sizeof(PicoCpuCM68k));\r
  PicoCpuCM68k.IrqCallback=SekIntAck;\r
  PicoCpuCM68k.ResetCallback=SekResetAck;\r
  PicoCpuCM68k.UnrecognizedCallback=SekUnrecognizedOpcode;\r
  PicoCpuCM68k.flags=4;   // Z set\r
#endif\r
#ifdef EMU_M68K\r
  {\r
    void *oldcontext = m68ki_cpu_p;\r
    m68k_set_context(&PicoCpuMM68k);\r
    m68k_set_cpu_type(M68K_CPU_TYPE_68000);\r
    m68k_init();\r
    m68k_set_int_ack_callback(SekIntAckM68K);\r
    m68k_set_tas_instr_callback(SekTasCallback);\r
    //m68k_pulse_reset();\r
    m68k_set_context(oldcontext);\r
  }\r
#endif\r
#ifdef EMU_F68K\r
  {\r
    void *oldcontext = g_m68kcontext;\r
    g_m68kcontext = &PicoCpuFM68k;\r
    memset(&PicoCpuFM68k, 0, sizeof(PicoCpuFM68k));\r
    fm68k_init();\r
    PicoCpuFM68k.iack_handler = SekIntAckF68K;\r
    PicoCpuFM68k.sr = 0x2704; // Z flag\r
    g_m68kcontext = oldcontext;\r
  }\r
#endif\r
}\r
\r
\r
// Reset the 68000:\r
PICO_INTERNAL int SekReset(void)\r
{\r
  if (Pico.rom==NULL) return 1;\r
\r
#ifdef EMU_C68K\r
  CycloneReset(&PicoCpuCM68k);\r
#endif\r
#ifdef EMU_M68K\r
  m68k_set_context(&PicoCpuMM68k); // if we ever reset m68k, we always need it's context to be set\r
  m68ki_cpu.sp[0]=0;\r
  m68k_set_irq(0);\r
  m68k_pulse_reset();\r
  REG_USP = 0; // ?\r
#endif\r
#ifdef EMU_F68K\r
  {\r
    g_m68kcontext = &PicoCpuFM68k;\r
    fm68k_reset();\r
  }\r
#endif\r
\r
  return 0;\r
}\r
\r
void SekStepM68k(void)\r
{\r
  SekCycleAim=SekCycleCnt+1;\r
#if defined(EMU_CORE_DEBUG)\r
  SekCycleCnt+=CM_compareRun(1, 0);\r
#elif defined(EMU_C68K)\r
  PicoCpuCM68k.cycles=1;\r
  CycloneRun(&PicoCpuCM68k);\r
  SekCycleCnt+=1-PicoCpuCM68k.cycles;\r
#elif defined(EMU_M68K)\r
  SekCycleCnt+=m68k_execute(1);\r
#elif defined(EMU_F68K)\r
  SekCycleCnt+=fm68k_emulate(1, 0, 0);\r
#endif\r
}\r
\r
PICO_INTERNAL void SekSetRealTAS(int use_real)\r
{\r
#ifdef EMU_C68K\r
  CycloneSetRealTAS(use_real);\r
#endif\r
#ifdef EMU_F68K\r
  // TODO\r
#endif\r
}\r
\r
// Pack the cpu into a common format:\r
// XXX: rename\r
PICO_INTERNAL void SekPackCpu(unsigned char *cpu, int is_sub)\r
{\r
  unsigned int pc=0;\r
\r
#if defined(EMU_C68K)\r
  struct Cyclone *context = is_sub ? &PicoCpuCS68k : &PicoCpuCM68k;\r
  memcpy(cpu,context->d,0x40);\r
  pc=context->pc-context->membase;\r
  *(unsigned int *)(cpu+0x44)=CycloneGetSr(context);\r
  *(unsigned int *)(cpu+0x48)=context->osp;\r
  cpu[0x4c] = context->irq;\r
  cpu[0x4d] = context->state_flags & 1;\r
#elif defined(EMU_M68K)\r
  void *oldcontext = m68ki_cpu_p;\r
  m68k_set_context(is_sub ? &PicoCpuMS68k : &PicoCpuMM68k);\r
  memcpy(cpu,m68ki_cpu_p->dar,0x40);\r
  pc=m68ki_cpu_p->pc;\r
  *(unsigned int  *)(cpu+0x44)=m68k_get_reg(NULL, M68K_REG_SR);\r
  *(unsigned int  *)(cpu+0x48)=m68ki_cpu_p->sp[m68ki_cpu_p->s_flag^SFLAG_SET];\r
  cpu[0x4c] = CPU_INT_LEVEL>>8;\r
  cpu[0x4d] = CPU_STOPPED;\r
  m68k_set_context(oldcontext);\r
#elif defined(EMU_F68K)\r
  M68K_CONTEXT *context = is_sub ? &PicoCpuFS68k : &PicoCpuFM68k;\r
  memcpy(cpu,context->dreg,0x40);\r
  pc=context->pc;\r
  *(unsigned int  *)(cpu+0x44)=context->sr;\r
  *(unsigned int  *)(cpu+0x48)=context->asp;\r
  cpu[0x4c] = context->interrupts[0];\r
  cpu[0x4d] = (context->execinfo & FM68K_HALTED) ? 1 : 0;\r
#endif\r
\r
  *(unsigned int *)(cpu+0x40) = pc;\r
  *(unsigned int *)(cpu+0x50) =\r
    is_sub ? SekCycleCntS68k : SekCycleCnt;\r
}\r
\r
PICO_INTERNAL void SekUnpackCpu(const unsigned char *cpu, int is_sub)\r
{\r
#if defined(EMU_C68K)\r
  struct Cyclone *context = is_sub ? &PicoCpuCS68k : &PicoCpuCM68k;\r
  CycloneSetSr(context, *(unsigned int *)(cpu+0x44));\r
  context->osp=*(unsigned int *)(cpu+0x48);\r
  memcpy(context->d,cpu,0x40);\r
  context->membase = 0;\r
  context->pc = *(unsigned int *)(cpu+0x40);\r
  CycloneUnpack(context, NULL); // rebase PC\r
  context->irq = cpu[0x4c];\r
  context->state_flags = 0;\r
  if (cpu[0x4d])\r
    context->state_flags |= 1;\r
#elif defined(EMU_M68K)\r
  void *oldcontext = m68ki_cpu_p;\r
  m68k_set_context(is_sub ? &PicoCpuMS68k : &PicoCpuMM68k);\r
  m68k_set_reg(M68K_REG_SR, *(unsigned int *)(cpu+0x44));\r
  memcpy(m68ki_cpu_p->dar,cpu,0x40);\r
  m68ki_cpu_p->pc=*(unsigned int *)(cpu+0x40);\r
  m68ki_cpu_p->sp[m68ki_cpu_p->s_flag^SFLAG_SET]=*(unsigned int *)(cpu+0x48);\r
  CPU_INT_LEVEL = cpu[0x4c] << 8;\r
  CPU_STOPPED = cpu[0x4d];\r
  m68k_set_context(oldcontext);\r
#elif defined(EMU_F68K)\r
  M68K_CONTEXT *context = is_sub ? &PicoCpuFS68k : &PicoCpuFM68k;\r
  memcpy(context->dreg,cpu,0x40);\r
  context->pc =*(unsigned int *)(cpu+0x40);\r
  context->sr =*(unsigned int *)(cpu+0x44);\r
  context->asp=*(unsigned int *)(cpu+0x48);\r
  context->interrupts[0] = cpu[0x4c];\r
  context->execinfo &= ~FM68K_HALTED;\r
  if (cpu[0x4d]&1) context->execinfo |= FM68K_HALTED;\r
#endif\r
  if (is_sub)\r
    SekCycleCntS68k = *(unsigned int *)(cpu+0x50);\r
  else\r
    SekCycleCnt = *(unsigned int *)(cpu+0x50);\r
}\r
\r
\r
/* idle loop detection, not to be used in CD mode */\r
#ifdef EMU_C68K\r
#include "cpu/cyclone/tools/idle.h"\r
#endif\r
\r
static unsigned short **idledet_ptrs = NULL;\r
static int idledet_count = 0, idledet_bads = 0;\r
static int idledet_start_frame = 0;\r
\r
#if 0\r
#define IDLE_STATS 1\r
unsigned int idlehit_addrs[128], idlehit_counts[128];\r
\r
void SekRegisterIdleHit(unsigned int pc)\r
{\r
  int i;\r
  for (i = 0; i < 127 && idlehit_addrs[i]; i++) {\r
    if (idlehit_addrs[i] == pc) {\r
      idlehit_counts[i]++;\r
      return;\r
    }\r
  }\r
  idlehit_addrs[i] = pc;\r
  idlehit_counts[i] = 1;\r
  idlehit_addrs[i+1] = 0;\r
}\r
#endif\r
\r
void SekInitIdleDet(void)\r
{\r
  unsigned short **tmp = realloc(idledet_ptrs, 0x200*4);\r
  if (tmp == NULL) {\r
    free(idledet_ptrs);\r
    idledet_ptrs = NULL;\r
  }\r
  else\r
    idledet_ptrs = tmp;\r
  idledet_count = idledet_bads = 0;\r
  idledet_start_frame = Pico.m.frame_count + 360;\r
#ifdef IDLE_STATS\r
  idlehit_addrs[0] = 0;\r
#endif\r
\r
#ifdef EMU_C68K\r
  CycloneInitIdle();\r
#endif\r
#ifdef EMU_F68K\r
  fm68k_emulate(0, 0, 1);\r
#endif\r
}\r
\r
int SekIsIdleReady(void)\r
{\r
	return (Pico.m.frame_count >= idledet_start_frame);\r
}\r
\r
int SekIsIdleCode(unsigned short *dst, int bytes)\r
{\r
  // printf("SekIsIdleCode %04x %i\n", *dst, bytes);\r
  switch (bytes)\r
  {\r
    case 2:\r
      if ((*dst & 0xf000) != 0x6000)     // not another branch\r
        return 1;\r
      break;\r
    case 4:\r
      if ( (*dst & 0xff3f) == 0x4a38 || // tst.x ($xxxx.w); tas ($xxxx.w)\r
           (*dst & 0xc1ff) == 0x0038 || // move.x ($xxxx.w), dX\r
           (*dst & 0xf13f) == 0xb038)   // cmp.x ($xxxx.w), dX\r
        return 1;\r
      if (PicoAHW & (PAHW_MCD|PAHW_32X))\r
        break;\r
      // with no addons, there should be no need to wait\r
      // for byte change anywhere\r
      if ( (*dst & 0xfff8) == 0x4a10 || // tst.b ($aX)\r
           (*dst & 0xfff8) == 0x4a28)   // tst.b ($xxxx,a0)\r
        return 1;\r
      break;\r
    case 6:\r
      if ( ((dst[1] & 0xe0) == 0xe0 && ( // RAM and\r
            *dst == 0x4a39 ||            //   tst.b ($xxxxxxxx)\r
            *dst == 0x4a79 ||            //   tst.w ($xxxxxxxx)\r
            *dst == 0x4ab9 ||            //   tst.l ($xxxxxxxx)\r
            (*dst & 0xc1ff) == 0x0039 || //   move.x ($xxxxxxxx), dX\r
            (*dst & 0xf13f) == 0xb039))||//   cmp.x ($xxxxxxxx), dX\r
            *dst == 0x0838 ||            // btst $X, ($xxxx.w) [6 byte op]\r
            (*dst & 0xffbf) == 0x0c38)   // cmpi.{b,w} $X, ($xxxx.w)\r
        return 1;\r
      break;\r
    case 8:\r
      if ( ((dst[2] & 0xe0) == 0xe0 && ( // RAM and\r
            *dst == 0x0839 ||            //   btst $X, ($xxxxxxxx.w) [8 byte op]\r
            (*dst & 0xffbf) == 0x0c39))||//   cmpi.{b,w} $X, ($xxxxxxxx)\r
            *dst == 0x0cb8)              // cmpi.l $X, ($xxxx.w)\r
        return 1;\r
      break;\r
    case 12:\r
      if (PicoAHW & (PAHW_MCD|PAHW_32X))\r
        break;\r
      if ( (*dst & 0xf1f8) == 0x3010 && // move.w (aX), dX\r
            (dst[1]&0xf100) == 0x0000 && // arithmetic\r
            (dst[3]&0xf100) == 0x0000)   // arithmetic\r
        return 1;\r
      break;\r
  }\r
\r
  return 0;\r
}\r
\r
int SekRegisterIdlePatch(unsigned int pc, int oldop, int newop, void *ctx)\r
{\r
  int is_main68k = 1;\r
  u16 *target;\r
  uptr v;\r
\r
#if   defined(EMU_C68K)\r
  struct Cyclone *cyc = ctx;\r
  is_main68k = cyc == &PicoCpuCM68k;\r
  pc -= cyc->membase;\r
#elif defined(EMU_F68K)\r
  is_main68k = ctx == &PicoCpuFM68k;\r
#endif\r
  pc &= ~0xff000000;\r
  if (!(newop&0x200))\r
  elprintf(EL_IDLE, "idle: patch %06x %04x %04x %c %c #%i", pc, oldop, newop,\r
    (newop&0x200)?'n':'y', is_main68k?'m':'s', idledet_count);\r
\r
  // XXX: probably shouldn't patch RAM too\r
  v = m68k_read16_map[pc >> M68K_MEM_SHIFT];\r
  if (!(v & 0x80000000))\r
    target = (u16 *)((v << 1) + pc);\r
  else {\r
    if (++idledet_bads > 128)\r
      return 2; // remove detector\r
    return 1; // don't patch\r
  }\r
\r
  if (idledet_count >= 0x200 && (idledet_count & 0x1ff) == 0) {\r
    unsigned short **tmp = realloc(idledet_ptrs, (idledet_count+0x200)*4);\r
    if (tmp == NULL)\r
      return 1;\r
    idledet_ptrs = tmp;\r
  }\r
\r
  idledet_ptrs[idledet_count++] = target;\r
\r
  return 0;\r
}\r
\r
void SekFinishIdleDet(void)\r
{\r
#ifdef EMU_C68K\r
  CycloneFinishIdle();\r
#endif\r
#ifdef EMU_F68K\r
  fm68k_emulate(0, 0, 2);\r
#endif\r
  while (idledet_count > 0)\r
  {\r
    unsigned short *op = idledet_ptrs[--idledet_count];\r
    if      ((*op & 0xfd00) == 0x7100)\r
      *op &= 0xff, *op |= 0x6600;\r
    else if ((*op & 0xfd00) == 0x7500)\r
      *op &= 0xff, *op |= 0x6700;\r
    else if ((*op & 0xfd00) == 0x7d00)\r
      *op &= 0xff, *op |= 0x6000;\r
    else\r
      elprintf(EL_STATUS|EL_IDLE, "idle: don't know how to restore %04x", *op);\r
  }\r
}\r
\r
\r
#if defined(CPU_CMP_R) || defined(CPU_CMP_W)\r
#include "debug.h"\r
\r
struct ref_68k {\r
  u32 dar[16];\r
  u32 pc;\r
  u32 sr;\r
  u32 cycles;\r
  u32 pc_prev;\r
};\r
struct ref_68k ref_68ks[2];\r
static int current_68k;\r
\r
void SekTrace(int is_s68k)\r
{\r
  struct ref_68k *x68k = &ref_68ks[is_s68k];\r
  u32 pc = is_s68k ? SekPcS68k : SekPc;\r
  u32 sr = is_s68k ? SekSrS68k : SekSr;\r
  u32 cycles = is_s68k ? SekCycleCntS68k : SekCycleCnt;\r
  u32 r;\r
  u8 cmd;\r
#ifdef CPU_CMP_W\r
  int i;\r
\r
  if (is_s68k != current_68k) {\r
    current_68k = is_s68k;\r
    cmd = CTL_68K_SLAVE | current_68k;\r
    tl_write(&cmd, sizeof(cmd));\r
  }\r
  if (pc != x68k->pc) {\r
    x68k->pc = pc;\r
    tl_write_uint(CTL_68K_PC, x68k->pc);\r
  }\r
  if (sr != x68k->sr) {\r
    x68k->sr = sr;\r
    tl_write_uint(CTL_68K_SR, x68k->sr);\r
  }\r
  for (i = 0; i < 16; i++) {\r
    r = is_s68k ? SekDarS68k(i) : SekDar(i);\r
    if (r != x68k->dar[i]) {\r
      x68k->dar[i] = r;\r
      tl_write_uint(CTL_68K_R + i, r);\r
    }\r
  }\r
  tl_write_uint(CTL_68K_CYCLES, cycles);\r
#else\r
  int i, bad = 0;\r
\r
  while (1)\r
  {\r
    int ret = tl_read(&cmd, sizeof(cmd));\r
    if (ret == 0) {\r
      elprintf(EL_STATUS, "EOF");\r
      exit(1);\r
    }\r
    switch (cmd) {\r
    case CTL_68K_SLAVE:\r
    case CTL_68K_SLAVE + 1:\r
      current_68k = cmd & 1;\r
      break;\r
    case CTL_68K_PC:\r
      tl_read_uint(&x68k->pc);\r
      break;\r
    case CTL_68K_SR:\r
      tl_read_uint(&x68k->sr);\r
      break;\r
    case CTL_68K_CYCLES:\r
      tl_read_uint(&x68k->cycles);\r
      goto breakloop;\r
    default:\r
      if (CTL_68K_R <= cmd && cmd < CTL_68K_R + 0x10)\r
        tl_read_uint(&x68k->dar[cmd - CTL_68K_R]);\r
      else\r
        elprintf(EL_STATUS, "invalid cmd: %02x", cmd);\r
    }\r
  }\r
\r
breakloop:\r
  if (is_s68k != current_68k) {\r
		printf("bad 68k: %d %d\n", is_s68k, current_68k);\r
    bad = 1;\r
  }\r
  if (cycles != x68k->cycles) {\r
		printf("bad cycles: %u %u\n", cycles, x68k->cycles);\r
    bad = 1;\r
  }\r
  if ((pc ^ x68k->pc) & 0xffffff) {\r
		printf("bad PC: %08x %08x\n", pc, x68k->pc);\r
    bad = 1;\r
  }\r
  if (sr != x68k->sr) {\r
		printf("bad SR:  %03x %03x\n", sr, x68k->sr);\r
    bad = 1;\r
  }\r
  for (i = 0; i < 16; i++) {\r
    r = is_s68k ? SekDarS68k(i) : SekDar(i);\r
    if (r != x68k->dar[i]) {\r
		  printf("bad %c%d: %08x %08x\n", i < 8 ? 'D' : 'A', i & 7,\r
        r, x68k->dar[i]);\r
      bad = 1;\r
    }\r
  }\r
  if (bad) {\r
    for (i = 0; i < 8; i++)\r
			printf("D%d: %08x  A%d: %08x\n", i, x68k->dar[i],\r
        i, x68k->dar[i + 8]);\r
		printf("PC: %08x, %08x\n", x68k->pc, x68k->pc_prev);\r
\r
    PDebugDumpMem();\r
    exit(1);\r
  }\r
  x68k->pc_prev = x68k->pc;\r
#endif\r
}\r
#endif // CPU_CMP_*\r
\r
#if defined(EMU_M68K) && M68K_INSTRUCTION_HOOK == OPT_SPECIFY_HANDLER\r
static unsigned char op_flags[0x400000/2] = { 0, };\r
static int atexit_set = 0;\r
\r
static void make_idc(void)\r
{\r
  FILE *f = fopen("idc.idc", "w");\r
  int i;\r
  if (!f) return;\r
  fprintf(f, "#include <idc.idc>\nstatic main() {\n");\r
  for (i = 0; i < 0x400000/2; i++)\r
    if (op_flags[i] != 0)\r
      fprintf(f, "  MakeCode(0x%06x);\n", i*2);\r
  fprintf(f, "}\n");\r
  fclose(f);\r
}\r
\r
void instruction_hook(void)\r
{\r
  if (!atexit_set) {\r
    atexit(make_idc);\r
    atexit_set = 1;\r
  }\r
  if (REG_PC < 0x400000)\r
    op_flags[REG_PC/2] = 1;\r
}\r
#endif\r
\r
// vim:shiftwidth=2:ts=2:expandtab\r
Commit	Line	Data
cff531af	1	/*\r
	2	* PicoDrive\r
	3	* (c) Copyright Dave, 2004\r
	4	* (C) notaz, 2006-2009\r
	5	*\r
	6	* This work is licensed under the terms of MAME license.\r
	7	* See COPYING file in the top-level directory.\r
	8	*/\r
cc68a136	9	\r
efcba75f	10	#include "pico_int.h"\r
488c0bbf	11	#include "memory.h"\r
cc68a136	12	\r
cc68a136	13	\r
ae214f1c	14	unsigned int SekCycleCnt;\r
ae214f1c	15	unsigned int SekCycleAim;\r
cc68a136	16	\r
70357ce5	17	\r
	18	/* context */\r
	19	// Cyclone 68000\r
cc68a136	20	#ifdef EMU_C68K\r
3aa1e148	21	struct Cyclone PicoCpuCM68k;\r
cc68a136	22	#endif\r
70357ce5	23	// MUSASHI 68000\r
cc68a136	24	#ifdef EMU_M68K\r
3aa1e148	25	m68ki_cpu_core PicoCpuMM68k;\r
cc68a136	26	#endif\r
70357ce5	27	// FAME 68000\r
70357ce5	28	#ifdef EMU_F68K\r
3aa1e148	29	M68K_CONTEXT PicoCpuFM68k;\r
cc68a136	30	#endif\r
	31	\r
	32	\r
70357ce5	33	/* callbacks */\r
cc68a136	34	#ifdef EMU_C68K\r
b837b69b	35	// interrupt acknowledgment\r
0af33fe0	36	static int SekIntAck(int level)\r
cc68a136	37	{\r
cc68a136	38	// try to emulate VDP's reaction to 68000 int ack\r
69996cb7	39	if (level == 4) { Pico.video.pending_ints = 0; elprintf(EL_INTS, "hack: @ %06x [%i]", SekPc, SekCycleCnt); }\r
69996cb7	40	else if(level == 6) { Pico.video.pending_ints &= ~0x20; elprintf(EL_INTS, "vack: @ %06x [%i]", SekPc, SekCycleCnt); }\r
3aa1e148	41	PicoCpuCM68k.irq = 0;\r
0af33fe0	42	return CYCLONE_INT_ACK_AUTOVECTOR;\r
cc68a136	43	}\r
cc68a136	44	\r
69996cb7	45	static void SekResetAck(void)\r
cc68a136	46	{\r
69996cb7	47	elprintf(EL_ANOMALY, "Reset encountered @ %06x", SekPc);\r
cc68a136	48	}\r
	49	\r
	50	static int SekUnrecognizedOpcode()\r
	51	{\r
b4db550e	52	unsigned int pc;\r
cc68a136	53	pc = SekPc;\r
b4db550e	54	elprintf(EL_ANOMALY, "Unrecognized Opcode @ %06x", pc);\r
	55	// see if we are still in a mapped region\r
	56	pc &= 0x00ffffff;\r
	57	if (map_flag_set(m68k_read16_map[pc >> M68K_MEM_SHIFT])) {\r
	58	elprintf(EL_STATUS\|EL_ANOMALY, "m68k crash @%06x", pc);\r
3aa1e148	59	PicoCpuCM68k.cycles = 0;\r
3aa1e148	60	PicoCpuCM68k.state_flags \|= 1;\r
cc68a136	61	return 1;\r
cc68a136	62	}\r
2d0b15bb	63	#ifdef EMU_M68K // debugging cyclone\r
	64	{\r
	65	extern int have_illegal;\r
	66	have_illegal = 1;\r
	67	}\r
	68	#endif\r
cc68a136	69	return 0;\r
	70	}\r
	71	#endif\r
	72	\r
	73	\r
	74	#ifdef EMU_M68K\r
	75	static int SekIntAckM68K(int level)\r
	76	{\r
69996cb7	77	if (level == 4) { Pico.video.pending_ints = 0; elprintf(EL_INTS, "hack: @ %06x [%i]", SekPc, SekCycleCnt); }\r
69996cb7	78	else if(level == 6) { Pico.video.pending_ints &= ~0x20; elprintf(EL_INTS, "vack: @ %06x [%i]", SekPc, SekCycleCnt); }\r
cc68a136	79	CPU_INT_LEVEL = 0;\r
	80	return M68K_INT_ACK_AUTOVECTOR;\r
	81	}\r
0af33fe0	82	\r
	83	static int SekTasCallback(void)\r
	84	{\r
	85	return 0; // no writeback\r
	86	}\r
cc68a136	87	#endif\r
	88	\r
	89	\r
70357ce5	90	#ifdef EMU_F68K\r
3aa1e148	91	static void SekIntAckF68K(unsigned level)\r
70357ce5	92	{\r
	93	if (level == 4) { Pico.video.pending_ints = 0; elprintf(EL_INTS, "hack: @ %06x [%i]", SekPc, SekCycleCnt); }\r
	94	else if(level == 6) { Pico.video.pending_ints &= ~0x20; elprintf(EL_INTS, "vack: @ %06x [%i]", SekPc, SekCycleCnt); }\r
3aa1e148	95	PicoCpuFM68k.interrupts[0] = 0;\r
70357ce5	96	}\r
	97	#endif\r
	98	\r
cc68a136	99	\r
2aa27095	100	PICO_INTERNAL void SekInit(void)\r
cc68a136	101	{\r
	102	#ifdef EMU_C68K\r
	103	CycloneInit();\r
3aa1e148	104	memset(&PicoCpuCM68k,0,sizeof(PicoCpuCM68k));\r
	105	PicoCpuCM68k.IrqCallback=SekIntAck;\r
	106	PicoCpuCM68k.ResetCallback=SekResetAck;\r
	107	PicoCpuCM68k.UnrecognizedCallback=SekUnrecognizedOpcode;\r
03e4f2a3	108	PicoCpuCM68k.flags=4; // Z set\r
cc68a136	109	#endif\r
cc68a136	110	#ifdef EMU_M68K\r
	111	{\r
	112	void *oldcontext = m68ki_cpu_p;\r
3aa1e148	113	m68k_set_context(&PicoCpuMM68k);\r
cc68a136	114	m68k_set_cpu_type(M68K_CPU_TYPE_68000);\r
	115	m68k_init();\r
	116	m68k_set_int_ack_callback(SekIntAckM68K);\r
0af33fe0	117	m68k_set_tas_instr_callback(SekTasCallback);\r
9037e45d	118	//m68k_pulse_reset();\r
cc68a136	119	m68k_set_context(oldcontext);\r
	120	}\r
	121	#endif\r
70357ce5	122	#ifdef EMU_F68K\r
	123	{\r
	124	void *oldcontext = g_m68kcontext;\r
3aa1e148	125	g_m68kcontext = &PicoCpuFM68k;\r
3aa1e148	126	memset(&PicoCpuFM68k, 0, sizeof(PicoCpuFM68k));\r
03e4f2a3	127	fm68k_init();\r
3aa1e148	128	PicoCpuFM68k.iack_handler = SekIntAckF68K;\r
b5e5172d	129	PicoCpuFM68k.sr = 0x2704; // Z flag\r
70357ce5	130	g_m68kcontext = oldcontext;\r
	131	}\r
	132	#endif\r
cc68a136	133	}\r
cc68a136	134	\r
70357ce5	135	\r
cc68a136	136	// Reset the 68000:\r
2aa27095	137	PICO_INTERNAL int SekReset(void)\r
cc68a136	138	{\r
	139	if (Pico.rom==NULL) return 1;\r
	140	\r
	141	#ifdef EMU_C68K\r
5e89f0f5	142	CycloneReset(&PicoCpuCM68k);\r
cc68a136	143	#endif\r
cc68a136	144	#ifdef EMU_M68K\r
3aa1e148	145	m68k_set_context(&PicoCpuMM68k); // if we ever reset m68k, we always need it's context to be set\r
2d0b15bb	146	m68ki_cpu.sp[0]=0;\r
2d0b15bb	147	m68k_set_irq(0);\r
b837b69b	148	m68k_pulse_reset();\r
99464b62	149	REG_USP = 0; // ?\r
cc68a136	150	#endif\r
70357ce5	151	#ifdef EMU_F68K\r
70357ce5	152	{\r
3aa1e148	153	g_m68kcontext = &PicoCpuFM68k;\r
03e4f2a3	154	fm68k_reset();\r
70357ce5	155	}\r
70357ce5	156	#endif\r
cc68a136	157	\r
	158	return 0;\r
	159	}\r
	160	\r
5f9a0d16	161	void SekStepM68k(void)\r
	162	{\r
	163	SekCycleAim=SekCycleCnt+1;\r
	164	#if defined(EMU_CORE_DEBUG)\r
	165	SekCycleCnt+=CM_compareRun(1, 0);\r
	166	#elif defined(EMU_C68K)\r
	167	PicoCpuCM68k.cycles=1;\r
	168	CycloneRun(&PicoCpuCM68k);\r
	169	SekCycleCnt+=1-PicoCpuCM68k.cycles;\r
	170	#elif defined(EMU_M68K)\r
	171	SekCycleCnt+=m68k_execute(1);\r
	172	#elif defined(EMU_F68K)\r
f579f7b8	173	SekCycleCnt+=fm68k_emulate(1, 0, 0);\r
5f9a0d16	174	#endif\r
5f9a0d16	175	}\r
cc68a136	176	\r
eff55556	177	PICO_INTERNAL void SekSetRealTAS(int use_real)\r
2433f409	178	{\r
	179	#ifdef EMU_C68K\r
	180	CycloneSetRealTAS(use_real);\r
	181	#endif\r
70357ce5	182	#ifdef EMU_F68K\r
	183	// TODO\r
	184	#endif\r
2433f409	185	}\r
2433f409	186	\r
b4db550e	187	// Pack the cpu into a common format:\r
	188	// XXX: rename\r
	189	PICO_INTERNAL void SekPackCpu(unsigned char *cpu, int is_sub)\r
	190	{\r
	191	unsigned int pc=0;\r
	192	\r
	193	#if defined(EMU_C68K)\r
	194	struct Cyclone *context = is_sub ? &PicoCpuCS68k : &PicoCpuCM68k;\r
	195	memcpy(cpu,context->d,0x40);\r
	196	pc=context->pc-context->membase;\r
	197	(unsigned int )(cpu+0x44)=CycloneGetSr(context);\r
	198	(unsigned int )(cpu+0x48)=context->osp;\r
	199	cpu[0x4c] = context->irq;\r
	200	cpu[0x4d] = context->state_flags & 1;\r
	201	#elif defined(EMU_M68K)\r
	202	void *oldcontext = m68ki_cpu_p;\r
	203	m68k_set_context(is_sub ? &PicoCpuMS68k : &PicoCpuMM68k);\r
	204	memcpy(cpu,m68ki_cpu_p->dar,0x40);\r
	205	pc=m68ki_cpu_p->pc;\r
	206	(unsigned int )(cpu+0x44)=m68k_get_reg(NULL, M68K_REG_SR);\r
	207	(unsigned int )(cpu+0x48)=m68ki_cpu_p->sp[m68ki_cpu_p->s_flag^SFLAG_SET];\r
	208	cpu[0x4c] = CPU_INT_LEVEL>>8;\r
	209	cpu[0x4d] = CPU_STOPPED;\r
	210	m68k_set_context(oldcontext);\r
	211	#elif defined(EMU_F68K)\r
	212	M68K_CONTEXT *context = is_sub ? &PicoCpuFS68k : &PicoCpuFM68k;\r
	213	memcpy(cpu,context->dreg,0x40);\r
	214	pc=context->pc;\r
	215	(unsigned int )(cpu+0x44)=context->sr;\r
	216	(unsigned int )(cpu+0x48)=context->asp;\r
	217	cpu[0x4c] = context->interrupts[0];\r
	218	cpu[0x4d] = (context->execinfo & FM68K_HALTED) ? 1 : 0;\r
	219	#endif\r
	220	\r
6a98f03e	221	(unsigned int )(cpu+0x40) = pc;\r
ae214f1c	222	(unsigned int )(cpu+0x50) =\r
ae214f1c	223	is_sub ? SekCycleCntS68k : SekCycleCnt;\r
b4db550e	224	}\r
	225	\r
	226	PICO_INTERNAL void SekUnpackCpu(const unsigned char *cpu, int is_sub)\r
	227	{\r
	228	#if defined(EMU_C68K)\r
	229	struct Cyclone *context = is_sub ? &PicoCpuCS68k : &PicoCpuCM68k;\r
	230	CycloneSetSr(context, (unsigned int )(cpu+0x44));\r
	231	context->osp=(unsigned int )(cpu+0x48);\r
	232	memcpy(context->d,cpu,0x40);\r
	233	context->membase = 0;\r
	234	context->pc = (unsigned int )(cpu+0x40);\r
	235	CycloneUnpack(context, NULL); // rebase PC\r
	236	context->irq = cpu[0x4c];\r
	237	context->state_flags = 0;\r
	238	if (cpu[0x4d])\r
	239	context->state_flags \|= 1;\r
	240	#elif defined(EMU_M68K)\r
	241	void *oldcontext = m68ki_cpu_p;\r
	242	m68k_set_context(is_sub ? &PicoCpuMS68k : &PicoCpuMM68k);\r
	243	m68k_set_reg(M68K_REG_SR, (unsigned int )(cpu+0x44));\r
	244	memcpy(m68ki_cpu_p->dar,cpu,0x40);\r
	245	m68ki_cpu_p->pc=(unsigned int )(cpu+0x40);\r
	246	m68ki_cpu_p->sp[m68ki_cpu_p->s_flag^SFLAG_SET]=(unsigned int )(cpu+0x48);\r
	247	CPU_INT_LEVEL = cpu[0x4c] << 8;\r
	248	CPU_STOPPED = cpu[0x4d];\r
	249	m68k_set_context(oldcontext);\r
	250	#elif defined(EMU_F68K)\r
	251	M68K_CONTEXT *context = is_sub ? &PicoCpuFS68k : &PicoCpuFM68k;\r
	252	memcpy(context->dreg,cpu,0x40);\r
	253	context->pc =(unsigned int )(cpu+0x40);\r
	254	context->sr =(unsigned int )(cpu+0x44);\r
	255	context->asp=(unsigned int )(cpu+0x48);\r
	256	context->interrupts[0] = cpu[0x4c];\r
	257	context->execinfo &= ~FM68K_HALTED;\r
	258	if (cpu[0x4d]&1) context->execinfo \|= FM68K_HALTED;\r
	259	#endif\r
ae214f1c	260	if (is_sub)\r
	261	SekCycleCntS68k = (unsigned int )(cpu+0x50);\r
	262	else\r
	263	SekCycleCnt = (unsigned int )(cpu+0x50);\r
b4db550e	264	}\r
b4db550e	265	\r
5f9a0d16	266	\r
053fd9b4	267	/* idle loop detection, not to be used in CD mode */\r
053fd9b4	268	#ifdef EMU_C68K\r
d4d62665	269	#include "cpu/cyclone/tools/idle.h"\r
053fd9b4	270	#endif\r
053fd9b4	271	\r
488c0bbf	272	static unsigned short **idledet_ptrs = NULL;\r
053fd9b4	273	static int idledet_count = 0, idledet_bads = 0;\r
0219d379	274	static int idledet_start_frame = 0;\r
053fd9b4	275	\r
5ed2a20e	276	#if 0\r
	277	#define IDLE_STATS 1\r
	278	unsigned int idlehit_addrs[128], idlehit_counts[128];\r
	279	\r
	280	void SekRegisterIdleHit(unsigned int pc)\r
	281	{\r
	282	int i;\r
	283	for (i = 0; i < 127 && idlehit_addrs[i]; i++) {\r
	284	if (idlehit_addrs[i] == pc) {\r
	285	idlehit_counts[i]++;\r
	286	return;\r
	287	}\r
	288	}\r
	289	idlehit_addrs[i] = pc;\r
	290	idlehit_counts[i] = 1;\r
	291	idlehit_addrs[i+1] = 0;\r
	292	}\r
	293	#endif\r
	294	\r
053fd9b4	295	void SekInitIdleDet(void)\r
053fd9b4	296	{\r
488c0bbf	297	unsigned short *tmp = realloc(idledet_ptrs, 0x2004);\r
053fd9b4	298	if (tmp == NULL) {\r
488c0bbf	299	free(idledet_ptrs);\r
488c0bbf	300	idledet_ptrs = NULL;\r
053fd9b4	301	}\r
053fd9b4	302	else\r
488c0bbf	303	idledet_ptrs = tmp;\r
053fd9b4	304	idledet_count = idledet_bads = 0;\r
053fd9b4	305	idledet_start_frame = Pico.m.frame_count + 360;\r
5ed2a20e	306	#ifdef IDLE_STATS\r
	307	idlehit_addrs[0] = 0;\r
	308	#endif\r
053fd9b4	309	\r
053fd9b4	310	#ifdef EMU_C68K\r
	311	CycloneInitIdle();\r
	312	#endif\r
c060a9ab	313	#ifdef EMU_F68K\r
c060a9ab	314	fm68k_emulate(0, 0, 1);\r
c060a9ab	315	#endif\r
053fd9b4	316	}\r
053fd9b4	317	\r
0219d379	318	int SekIsIdleReady(void)\r
	319	{\r
	320	return (Pico.m.frame_count >= idledet_start_frame);\r
	321	}\r
	322	\r
053fd9b4	323	int SekIsIdleCode(unsigned short *dst, int bytes)\r
053fd9b4	324	{\r
8187ba84	325	// printf("SekIsIdleCode %04x %i\n", *dst, bytes);\r
053fd9b4	326	switch (bytes)\r
053fd9b4	327	{\r
5ed2a20e	328	case 2:\r
	329	if ((*dst & 0xf000) != 0x6000) // not another branch\r
	330	return 1;\r
	331	break;\r
053fd9b4	332	case 4:\r
0219d379	333	if ( (*dst & 0xff3f) == 0x4a38 \|\| // tst.x ($xxxx.w); tas ($xxxx.w)\r
	334	(*dst & 0xc1ff) == 0x0038 \|\| // move.x ($xxxx.w), dX\r
	335	(*dst & 0xf13f) == 0xb038) // cmp.x ($xxxx.w), dX\r
	336	return 1;\r
	337	if (PicoAHW & (PAHW_MCD\|PAHW_32X))\r
	338	break;\r
	339	// with no addons, there should be no need to wait\r
	340	// for byte change anywhere\r
	341	if ( (*dst & 0xfff8) == 0x4a10 \|\| // tst.b ($aX)\r
	342	(*dst & 0xfff8) == 0x4a28) // tst.b ($xxxx,a0)\r
053fd9b4	343	return 1;\r
	344	break;\r
	345	case 6:\r
b0677887	346	if ( ((dst[1] & 0xe0) == 0xe0 && ( // RAM and\r
	347	*dst == 0x4a39 \|\| // tst.b ($xxxxxxxx)\r
	348	*dst == 0x4a79 \|\| // tst.w ($xxxxxxxx)\r
	349	*dst == 0x4ab9 \|\| // tst.l ($xxxxxxxx)\r
	350	(*dst & 0xc1ff) == 0x0039 \|\| // move.x ($xxxxxxxx), dX\r
	351	(*dst & 0xf13f) == 0xb039))\|\|// cmp.x ($xxxxxxxx), dX\r
	352	*dst == 0x0838 \|\| // btst $X, ($xxxx.w) [6 byte op]\r
	353	(*dst & 0xffbf) == 0x0c38) // cmpi.{b,w} $X, ($xxxx.w)\r
053fd9b4	354	return 1;\r
	355	break;\r
	356	case 8:\r
b0677887	357	if ( ((dst[2] & 0xe0) == 0xe0 && ( // RAM and\r
	358	*dst == 0x0839 \|\| // btst $X, ($xxxxxxxx.w) [8 byte op]\r
	359	(*dst & 0xffbf) == 0x0c39))\|\|// cmpi.{b,w} $X, ($xxxxxxxx)\r
	360	*dst == 0x0cb8) // cmpi.l $X, ($xxxx.w)\r
053fd9b4	361	return 1;\r
	362	break;\r
	363	case 12:\r
0219d379	364	if (PicoAHW & (PAHW_MCD\|PAHW_32X))\r
	365	break;\r
	366	if ( (*dst & 0xf1f8) == 0x3010 && // move.w (aX), dX\r
b0677887	367	(dst[1]&0xf100) == 0x0000 && // arithmetic\r
b0677887	368	(dst[3]&0xf100) == 0x0000) // arithmetic\r
053fd9b4	369	return 1;\r
	370	break;\r
	371	}\r
	372	\r
	373	return 0;\r
	374	}\r
	375	\r
5ed2a20e	376	int SekRegisterIdlePatch(unsigned int pc, int oldop, int newop, void *ctx)\r
053fd9b4	377	{\r
5ed2a20e	378	int is_main68k = 1;\r
488c0bbf	379	u16 *target;\r
	380	uptr v;\r
	381	\r
5ed2a20e	382	#if defined(EMU_C68K)\r
	383	struct Cyclone *cyc = ctx;\r
	384	is_main68k = cyc == &PicoCpuCM68k;\r
	385	pc -= cyc->membase;\r
	386	#elif defined(EMU_F68K)\r
	387	is_main68k = ctx == &PicoCpuFM68k;\r
053fd9b4	388	#endif\r
053fd9b4	389	pc &= ~0xff000000;\r
0219d379	390	if (!(newop&0x200))\r
5ed2a20e	391	elprintf(EL_IDLE, "idle: patch %06x %04x %04x %c %c #%i", pc, oldop, newop,\r
	392	(newop&0x200)?'n':'y', is_main68k?'m':'s', idledet_count);\r
	393	\r
488c0bbf	394	// XXX: probably shouldn't patch RAM too\r
	395	v = m68k_read16_map[pc >> M68K_MEM_SHIFT];\r
	396	if (!(v & 0x80000000))\r
	397	target = (u16 *)((v << 1) + pc);\r
	398	else {\r
	399	if (++idledet_bads > 128)\r
	400	return 2; // remove detector\r
053fd9b4	401	return 1; // don't patch\r
	402	}\r
	403	\r
	404	if (idledet_count >= 0x200 && (idledet_count & 0x1ff) == 0) {\r
488c0bbf	405	unsigned short *tmp = realloc(idledet_ptrs, (idledet_count+0x200)4);\r
	406	if (tmp == NULL)\r
	407	return 1;\r
	408	idledet_ptrs = tmp;\r
053fd9b4	409	}\r
053fd9b4	410	\r
488c0bbf	411	idledet_ptrs[idledet_count++] = target;\r
b0677887	412	\r
053fd9b4	413	return 0;\r
	414	}\r
	415	\r
	416	void SekFinishIdleDet(void)\r
	417	{\r
053fd9b4	418	#ifdef EMU_C68K\r
053fd9b4	419	CycloneFinishIdle();\r
c060a9ab	420	#endif\r
	421	#ifdef EMU_F68K\r
	422	fm68k_emulate(0, 0, 2);\r
053fd9b4	423	#endif\r
	424	while (idledet_count > 0)\r
	425	{\r
488c0bbf	426	unsigned short *op = idledet_ptrs[--idledet_count];\r
053fd9b4	427	if ((*op & 0xfd00) == 0x7100)\r
	428	op &= 0xff, op \|= 0x6600;\r
	429	else if ((*op & 0xfd00) == 0x7500)\r
	430	op &= 0xff, op \|= 0x6700;\r
	431	else if ((*op & 0xfd00) == 0x7d00)\r
	432	op &= 0xff, op \|= 0x6000;\r
	433	else\r
	434	elprintf(EL_STATUS\|EL_IDLE, "idle: don't know how to restore %04x", *op);\r
	435	}\r
053fd9b4	436	}\r
	437	\r
	438	\r
12da51c2	439	#if defined(CPU_CMP_R) \|\| defined(CPU_CMP_W)\r
	440	#include "debug.h"\r
	441	\r
	442	struct ref_68k {\r
	443	u32 dar[16];\r
	444	u32 pc;\r
	445	u32 sr;\r
	446	u32 cycles;\r
	447	u32 pc_prev;\r
	448	};\r
	449	struct ref_68k ref_68ks[2];\r
	450	static int current_68k;\r
	451	\r
	452	void SekTrace(int is_s68k)\r
	453	{\r
	454	struct ref_68k *x68k = &ref_68ks[is_s68k];\r
	455	u32 pc = is_s68k ? SekPcS68k : SekPc;\r
	456	u32 sr = is_s68k ? SekSrS68k : SekSr;\r
	457	u32 cycles = is_s68k ? SekCycleCntS68k : SekCycleCnt;\r
	458	u32 r;\r
	459	u8 cmd;\r
	460	#ifdef CPU_CMP_W\r
	461	int i;\r
	462	\r
	463	if (is_s68k != current_68k) {\r
	464	current_68k = is_s68k;\r
	465	cmd = CTL_68K_SLAVE \| current_68k;\r
	466	tl_write(&cmd, sizeof(cmd));\r
	467	}\r
	468	if (pc != x68k->pc) {\r
	469	x68k->pc = pc;\r
	470	tl_write_uint(CTL_68K_PC, x68k->pc);\r
	471	}\r
	472	if (sr != x68k->sr) {\r
	473	x68k->sr = sr;\r
	474	tl_write_uint(CTL_68K_SR, x68k->sr);\r
	475	}\r
	476	for (i = 0; i < 16; i++) {\r
	477	r = is_s68k ? SekDarS68k(i) : SekDar(i);\r
	478	if (r != x68k->dar[i]) {\r
	479	x68k->dar[i] = r;\r
	480	tl_write_uint(CTL_68K_R + i, r);\r
	481	}\r
	482	}\r
	483	tl_write_uint(CTL_68K_CYCLES, cycles);\r
	484	#else\r
	485	int i, bad = 0;\r
	486	\r
	487	while (1)\r
	488	{\r
	489	int ret = tl_read(&cmd, sizeof(cmd));\r
	490	if (ret == 0) {\r
	491	elprintf(EL_STATUS, "EOF");\r
	492	exit(1);\r
	493	}\r
	494	switch (cmd) {\r
	495	case CTL_68K_SLAVE:\r
	496	case CTL_68K_SLAVE + 1:\r
	497	current_68k = cmd & 1;\r
	498	break;\r
	499	case CTL_68K_PC:\r
	500	tl_read_uint(&x68k->pc);\r
	501	break;\r
	502	case CTL_68K_SR:\r
503	tl_read_uint(&x68k->sr);\r
504	break;\r
505	case CTL_68K_CYCLES:\r
506	tl_read_uint(&x68k->cycles);\r
507	goto breakloop;\r
508	default:\r
509	if (CTL_68K_R <= cmd && cmd < CTL_68K_R + 0x10)\r
510	tl_read_uint(&x68k->dar[cmd - CTL_68K_R]);\r
511	else\r
512	elprintf(EL_STATUS, "invalid cmd: %02x", cmd);\r
513	}\r
514	}\r
515	\r
516	breakloop:\r
517	if (is_s68k != current_68k) {\r
518	printf("bad 68k: %d %d\n", is_s68k, current_68k);\r
519	bad = 1;\r
520	}\r
521	if (cycles != x68k->cycles) {\r
522	printf("bad cycles: %u %u\n", cycles, x68k->cycles);\r
523	bad = 1;\r
524	}\r
525	if ((pc ^ x68k->pc) & 0xffffff) {\r
526	printf("bad PC: %08x %08x\n", pc, x68k->pc);\r
527	bad = 1;\r
528	}\r
529	if (sr != x68k->sr) {\r
530	printf("bad SR: %03x %03x\n", sr, x68k->sr);\r
531	bad = 1;\r
532	}\r
533	for (i = 0; i < 16; i++) {\r
534	r = is_s68k ? SekDarS68k(i) : SekDar(i);\r
535	if (r != x68k->dar[i]) {\r
536	printf("bad %c%d: %08x %08x\n", i < 8 ? 'D' : 'A', i & 7,\r
537	r, x68k->dar[i]);\r
538	bad = 1;\r
539	}\r
540	}\r
541	if (bad) {\r
542	for (i = 0; i < 8; i++)\r
543	printf("D%d: %08x A%d: %08x\n", i, x68k->dar[i],\r
544	i, x68k->dar[i + 8]);\r
545	printf("PC: %08x, %08x\n", x68k->pc, x68k->pc_prev);\r
546	\r
547	PDebugDumpMem();\r
548	exit(1);\r
549	}\r
550	x68k->pc_prev = x68k->pc;\r
551	#endif\r
552	}\r
553	#endif // CPU_CMP_*\r
554	\r
6cab49fd	555	#if defined(EMU_M68K) && M68K_INSTRUCTION_HOOK == OPT_SPECIFY_HANDLER\r
	556	static unsigned char op_flags[0x400000/2] = { 0, };\r
	557	static int atexit_set = 0;\r
	558	\r
	559	static void make_idc(void)\r
	560	{\r
	561	FILE *f = fopen("idc.idc", "w");\r
	562	int i;\r
	563	if (!f) return;\r
	564	fprintf(f, "#include <idc.idc>\nstatic main() {\n");\r
	565	for (i = 0; i < 0x400000/2; i++)\r
	566	if (op_flags[i] != 0)\r
	567	fprintf(f, " MakeCode(0x%06x);\n", i*2);\r
	568	fprintf(f, "}\n");\r
	569	fclose(f);\r
	570	}\r
	571	\r
	572	void instruction_hook(void)\r
	573	{\r
	574	if (!atexit_set) {\r
	575	atexit(make_idc);\r
	576	atexit_set = 1;\r
	577	}\r
	578	if (REG_PC < 0x400000)\r
	579	op_flags[REG_PC/2] = 1;\r
	580	}\r
	581	#endif\r
12da51c2	582	\r
12da51c2	583	// vim:shiftwidth=2:ts=2:expandtab\r