cff531af |
1 | /* |
2 | * PicoDrive |
ae214f1c |
3 | * (C) notaz, 2007,2013 |
cff531af |
4 | * |
5 | * This work is licensed under the terms of MAME license. |
6 | * See COPYING file in the top-level directory. |
7 | */ |
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8 | |
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9 | #include "../pico_int.h" |
43e6eaad |
10 | #include "../sound/ym2612.h" |
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11 | |
76276b0b |
12 | extern unsigned char formatted_bram[4*0x10]; |
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13 | |
14 | static unsigned int m68k_cycle_mult; |
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15 | |
721cd396 |
16 | void (*PicoMCDopenTray)(void) = NULL; |
d687ef50 |
17 | void (*PicoMCDcloseTray)(void) = NULL; |
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18 | |
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19 | |
2aa27095 |
20 | PICO_INTERNAL void PicoInitMCD(void) |
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21 | { |
22 | SekInitS68k(); |
23 | Init_CD_Driver(); |
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24 | } |
25 | |
eff55556 |
26 | PICO_INTERNAL void PicoExitMCD(void) |
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27 | { |
28 | End_CD_Driver(); |
29 | } |
30 | |
1cb1584b |
31 | PICO_INTERNAL void PicoPowerMCD(void) |
32 | { |
33 | int fmt_size = sizeof(formatted_bram); |
34 | memset(Pico_mcd->prg_ram, 0, sizeof(Pico_mcd->prg_ram)); |
35 | memset(Pico_mcd->word_ram2M, 0, sizeof(Pico_mcd->word_ram2M)); |
36 | memset(Pico_mcd->pcm_ram, 0, sizeof(Pico_mcd->pcm_ram)); |
37 | memset(Pico_mcd->bram, 0, sizeof(Pico_mcd->bram)); |
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38 | memcpy(Pico_mcd->bram + sizeof(Pico_mcd->bram) - fmt_size, |
39 | formatted_bram, fmt_size); |
51a902ae |
40 | memset(Pico_mcd->s68k_regs, 0, sizeof(Pico_mcd->s68k_regs)); |
4f265db7 |
41 | memset(&Pico_mcd->pcm, 0, sizeof(Pico_mcd->pcm)); |
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42 | memset(&Pico_mcd->m, 0, sizeof(Pico_mcd->m)); |
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43 | |
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44 | // cold reset state (tested) |
45 | Pico_mcd->m.state_flags = PCD_ST_S68K_RST; |
46 | Pico_mcd->m.busreq = 2; // busreq on, s68k in reset |
47 | Pico_mcd->s68k_regs[3] = 1; // 2M word RAM mode, m68k access |
48 | Pico_mcd->s68k_regs[6] = 0xff; |
49 | Pico_mcd->s68k_regs[7] = 0xff; |
50 | memset(Pico_mcd->bios + 0x70, 0xff, 4); |
51 | } |
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52 | |
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53 | PICO_INTERNAL int PicoResetMCD(void) |
54 | { |
55 | // ?? |
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56 | Reset_CD(); |
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57 | LC89510_Reset(); |
51a902ae |
58 | gfx_cd_reset(); |
3aa1e148 |
59 | #ifdef _ASM_CD_MEMORY_C |
00bd648e |
60 | //PicoMemResetCDdecode(1); // don't have to call this in 2M mode |
4ff2d527 |
61 | #endif |
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62 | |
6cadc2da |
63 | // use SRam.data for RAM cart |
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64 | if (PicoOpt & POPT_EN_MCD_RAMCART) { |
d6114368 |
65 | if (SRam.data == NULL) |
66 | SRam.data = calloc(1, 0x12000); |
67 | } |
68 | else if (SRam.data != NULL) { |
69 | free(SRam.data); |
70 | SRam.data = NULL; |
71 | } |
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72 | SRam.start = SRam.end = 0; // unused |
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73 | |
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74 | pcd_event_schedule(0, PCD_EVENT_CDC, 12500000/75); |
75 | |
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76 | return 0; |
77 | } |
78 | |
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79 | static __inline void SekRunS68k(unsigned int to) |
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80 | { |
81 | int cyc_do; |
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82 | |
83 | SekCycleAimS68k = to; |
84 | if ((cyc_do = SekCycleAimS68k - SekCycleCntS68k) <= 0) |
85 | return; |
86 | |
87 | SekCycleCntS68k += cyc_do; |
88 | #if defined(EMU_C68K) |
89 | PicoCpuCS68k.cycles = cyc_do; |
3aa1e148 |
90 | CycloneRun(&PicoCpuCS68k); |
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91 | SekCycleCntS68k -= PicoCpuCS68k.cycles; |
b837b69b |
92 | #elif defined(EMU_M68K) |
3aa1e148 |
93 | m68k_set_context(&PicoCpuMS68k); |
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94 | SekCycleCntS68k += m68k_execute(cyc_do) - cyc_do; |
ed4402a7 |
95 | m68k_set_context(&PicoCpuMM68k); |
3aa1e148 |
96 | #elif defined(EMU_F68K) |
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97 | g_m68kcontext = &PicoCpuFS68k; |
98 | SekCycleCntS68k += fm68k_emulate(cyc_do, 0, 0) - cyc_do; |
99 | g_m68kcontext = &PicoCpuFM68k; |
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100 | #endif |
101 | } |
102 | |
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103 | |
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104 | unsigned int pcd_cycles_m68k_to_s68k(unsigned int c) |
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105 | { |
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106 | return (long long)c * m68k_cycle_mult >> 16; |
8022f53d |
107 | } |
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108 | |
109 | /* events */ |
110 | static void pcd_cdc_event(unsigned int now) |
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111 | { |
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112 | // 75Hz CDC update |
113 | Check_CD_Command(); |
114 | pcd_event_schedule(now, PCD_EVENT_CDC, 12500000/75); |
115 | } |
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116 | |
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117 | static void pcd_int3_timer_event(unsigned int now) |
118 | { |
119 | if (Pico_mcd->s68k_regs[0x33] & PCDS_IEN3) { |
120 | elprintf(EL_INTS|EL_CD, "s68k: timer irq 3"); |
121 | SekInterruptS68k(3); |
122 | } |
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123 | |
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124 | if (Pico_mcd->s68k_regs[0x31] != 0) |
125 | pcd_event_schedule(now, PCD_EVENT_TIMER3, |
126 | Pico_mcd->s68k_regs[0x31] * 384); |
127 | } |
128 | |
129 | static void pcd_gfx_event(unsigned int now) |
130 | { |
131 | // update gfx chip |
132 | if (Pico_mcd->rot_comp.Reg_58 & 0x8000) { |
133 | Pico_mcd->rot_comp.Reg_58 &= 0x7fff; |
134 | Pico_mcd->rot_comp.Reg_64 = 0; |
135 | if (Pico_mcd->s68k_regs[0x33] & PCDS_IEN1) { |
136 | elprintf(EL_INTS |EL_CD, "s68k: gfx_cd irq 1"); |
137 | SekInterruptS68k(1); |
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138 | } |
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139 | } |
68cba51e |
140 | } |
141 | |
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142 | static void pcd_dma_event(unsigned int now) |
143 | { |
144 | int ddx = Pico_mcd->s68k_regs[4] & 7; |
145 | Update_CDC_TRansfer(ddx); |
146 | } |
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147 | |
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148 | typedef void (event_cb)(unsigned int now); |
149 | |
150 | /* times are in s68k (12.5MHz) cycles */ |
151 | unsigned int pcd_event_times[PCD_EVENT_COUNT]; |
152 | static unsigned int event_time_next; |
153 | static event_cb *pcd_event_cbs[PCD_EVENT_COUNT] = { |
154 | [PCD_EVENT_CDC] = pcd_cdc_event, |
155 | [PCD_EVENT_TIMER3] = pcd_int3_timer_event, |
156 | [PCD_EVENT_GFX] = pcd_gfx_event, |
157 | [PCD_EVENT_DMA] = pcd_dma_event, |
158 | }; |
159 | |
160 | void pcd_event_schedule(unsigned int now, enum pcd_event event, int after) |
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161 | { |
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162 | unsigned int when; |
163 | |
164 | when = now + after; |
165 | if (when == 0) { |
166 | // event cancelled |
167 | pcd_event_times[event] = 0; |
168 | return; |
169 | } |
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170 | |
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171 | when |= 1; |
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172 | |
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173 | elprintf(EL_CD, "cd: new event #%u %u->%u", event, now, when); |
174 | pcd_event_times[event] = when; |
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175 | |
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176 | if (event_time_next == 0 || CYCLES_GT(event_time_next, when)) |
177 | event_time_next = when; |
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178 | } |
179 | |
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180 | void pcd_event_schedule_s68k(enum pcd_event event, int after) |
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181 | { |
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182 | if (SekCyclesLeftS68k > after) |
183 | SekEndRunS68k(after); |
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184 | |
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185 | pcd_event_schedule(SekCyclesDoneS68k(), event, after); |
186 | } |
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187 | |
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188 | static void pcd_run_events(unsigned int until) |
189 | { |
190 | int oldest, oldest_diff, time; |
191 | int i, diff; |
192 | |
193 | while (1) { |
194 | oldest = -1, oldest_diff = 0x7fffffff; |
195 | |
196 | for (i = 0; i < PCD_EVENT_COUNT; i++) { |
197 | if (pcd_event_times[i]) { |
198 | diff = pcd_event_times[i] - until; |
199 | if (diff < oldest_diff) { |
200 | oldest_diff = diff; |
201 | oldest = i; |
202 | } |
203 | } |
204 | } |
205 | |
206 | if (oldest_diff <= 0) { |
207 | time = pcd_event_times[oldest]; |
208 | pcd_event_times[oldest] = 0; |
209 | elprintf(EL_CD, "cd: run event #%d %u", oldest, time); |
210 | pcd_event_cbs[oldest](time); |
211 | } |
212 | else if (oldest_diff < 0x7fffffff) { |
213 | event_time_next = pcd_event_times[oldest]; |
214 | break; |
215 | } |
216 | else { |
217 | event_time_next = 0; |
218 | break; |
219 | } |
220 | } |
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221 | |
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222 | if (oldest != -1) |
223 | elprintf(EL_CD, "cd: next event #%d at %u", |
224 | oldest, event_time_next); |
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225 | } |
226 | |
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227 | int pcd_sync_s68k(unsigned int m68k_target, int m68k_poll_sync) |
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228 | { |
229 | #define now SekCycleCntS68k |
230 | unsigned int s68k_target = |
231 | (unsigned long long)m68k_target * m68k_cycle_mult >> 16; |
232 | unsigned int target; |
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233 | |
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234 | elprintf(EL_CD, "s68k sync to %u, %u->%u", |
235 | m68k_target, now, s68k_target); |
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236 | |
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237 | if (Pico_mcd->m.busreq != 1) { /* busreq/reset */ |
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238 | SekCycleCntS68k = SekCycleAimS68k = s68k_target; |
239 | pcd_run_events(m68k_target); |
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240 | return 0; |
ae214f1c |
241 | } |
242 | |
243 | while (CYCLES_GT(s68k_target, now)) { |
244 | if (event_time_next && CYCLES_GE(now, event_time_next)) |
245 | pcd_run_events(now); |
246 | |
247 | target = s68k_target; |
248 | if (event_time_next && CYCLES_GT(target, event_time_next)) |
249 | target = event_time_next; |
250 | |
251 | SekRunS68k(target); |
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252 | if (m68k_poll_sync && Pico_mcd->m.m68k_poll_cnt == 0) |
253 | break; |
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254 | } |
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255 | |
256 | return s68k_target - now; |
ae214f1c |
257 | #undef now |
c987bb5c |
258 | } |
ae214f1c |
259 | |
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260 | #define pcd_run_cpus_normal pcd_run_cpus |
261 | //#define pcd_run_cpus_lockstep pcd_run_cpus |
262 | |
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263 | static void SekSyncM68k(void); |
264 | |
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265 | static inline void pcd_run_cpus_normal(int m68k_cycles) |
08769494 |
266 | { |
267 | SekCycleAim += m68k_cycles; |
268 | if (Pico_mcd->m.m68k_poll_cnt >= 16 && !SekShouldInterrupt()) { |
269 | int s68k_left = pcd_sync_s68k(SekCycleAim, 1); |
270 | if (s68k_left <= 0) { |
ba6e8bfd |
271 | elprintf(EL_CDPOLL, "m68k poll [%02x] x%d @%06x", |
08769494 |
272 | Pico_mcd->m.m68k_poll_a, Pico_mcd->m.m68k_poll_cnt, SekPc); |
273 | SekCycleCnt = SekCycleAim; |
274 | return; |
275 | } |
276 | SekCycleCnt = SekCycleAim - (s68k_left * 40220 >> 16); |
277 | } |
278 | |
279 | SekSyncM68k(); |
280 | } |
281 | |
ba6e8bfd |
282 | static inline void pcd_run_cpus_lockstep(int m68k_cycles) |
283 | { |
284 | unsigned int target = SekCycleAim + m68k_cycles; |
285 | do { |
286 | SekCycleAim += 8; |
287 | SekSyncM68k(); |
288 | pcd_sync_s68k(SekCycleAim, 0); |
289 | } while (CYCLES_GT(target, SekCycleAim)); |
290 | } |
291 | |
ae214f1c |
292 | #define PICO_CD |
293 | #define CPUS_RUN(m68k_cycles) \ |
08769494 |
294 | pcd_run_cpus(m68k_cycles) |
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295 | |
efcba75f |
296 | #include "../pico_cmn.c" |
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297 | |
298 | |
2aa27095 |
299 | PICO_INTERNAL void PicoFrameMCD(void) |
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300 | { |
602133e1 |
301 | if (!(PicoOpt&POPT_ALT_RENDERER)) |
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302 | PicoFrameStart(); |
303 | |
ae214f1c |
304 | // ~1.63 for NTSC, ~1.645 for PAL |
305 | if (Pico.m.pal) |
306 | m68k_cycle_mult = ((12500000ull << 16) / (50*312*488)); |
307 | else |
308 | m68k_cycle_mult = ((12500000ull << 16) / (60*262*488)) + 1; |
309 | |
bf5fbbb4 |
310 | PicoFrameHints(); |
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311 | } |
312 | |
ae214f1c |
313 | void pcd_state_loaded(void) |
314 | { |
315 | unsigned int cycles; |
316 | int diff; |
317 | |
318 | pcd_state_loaded_mem(); |
319 | |
320 | // old savestates.. |
321 | cycles = pcd_cycles_m68k_to_s68k(SekCycleAim); |
322 | diff = cycles - SekCycleAimS68k; |
323 | if (diff < -1000 || diff > 1000) { |
324 | SekCycleCntS68k = SekCycleAimS68k = cycles; |
325 | } |
326 | if (pcd_event_times[PCD_EVENT_CDC] == 0) { |
327 | pcd_event_schedule(SekCycleAimS68k, PCD_EVENT_CDC, 12500000/75); |
328 | |
329 | if (Pico_mcd->s68k_regs[0x31]) |
330 | pcd_event_schedule(SekCycleAimS68k, PCD_EVENT_TIMER3, |
331 | Pico_mcd->s68k_regs[0x31] * 384); |
332 | |
333 | if (Pico_mcd->rot_comp.Reg_58 & 0x8000) { |
334 | Pico_mcd->rot_comp.Reg_58 &= 0x7fff; |
335 | Pico_mcd->rot_comp.Reg_64 = 0; |
336 | if (Pico_mcd->s68k_regs[0x33] & PCDS_IEN1) |
337 | SekInterruptS68k(1); |
338 | } |
339 | if (Pico_mcd->scd.Status_CDC & 0x08) |
340 | Update_CDC_TRansfer(Pico_mcd->s68k_regs[4] & 7); |
341 | } |
342 | } |
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343 | |
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344 | // vim:shiftwidth=2:ts=2:expandtab |