cff531af |
1 | /*\r |
2 | * Memory I/O handlers for Sega/Mega CD.\r |
3 | * (C) notaz, 2007-2009\r |
4 | *\r |
5 | * This work is licensed under the terms of MAME license.\r |
6 | * See COPYING file in the top-level directory.\r |
7 | */\r |
cc68a136 |
8 | \r |
efcba75f |
9 | #include "../pico_int.h"\r |
af37bca8 |
10 | #include "../memory.h"\r |
cc68a136 |
11 | \r |
bcf65fd6 |
12 | uptr s68k_read8_map [0x1000000 >> M68K_MEM_SHIFT];\r |
13 | uptr s68k_read16_map [0x1000000 >> M68K_MEM_SHIFT];\r |
14 | uptr s68k_write8_map [0x1000000 >> M68K_MEM_SHIFT];\r |
15 | uptr s68k_write16_map[0x1000000 >> M68K_MEM_SHIFT];\r |
cc68a136 |
16 | \r |
af37bca8 |
17 | MAKE_68K_READ8(s68k_read8, s68k_read8_map)\r |
18 | MAKE_68K_READ16(s68k_read16, s68k_read16_map)\r |
19 | MAKE_68K_READ32(s68k_read32, s68k_read16_map)\r |
20 | MAKE_68K_WRITE8(s68k_write8, s68k_write8_map)\r |
21 | MAKE_68K_WRITE16(s68k_write16, s68k_write16_map)\r |
22 | MAKE_68K_WRITE32(s68k_write32, s68k_write16_map)\r |
b5e5172d |
23 | \r |
cc68a136 |
24 | // -----------------------------------------------------------------\r |
25 | \r |
0ace9b9a |
26 | // provided by ASM code:\r |
27 | #ifdef _ASM_CD_MEMORY_C\r |
0ace9b9a |
28 | u32 PicoReadS68k8_pr(u32 a);\r |
29 | u32 PicoReadS68k16_pr(u32 a);\r |
30 | void PicoWriteS68k8_pr(u32 a, u32 d);\r |
31 | void PicoWriteS68k16_pr(u32 a, u32 d);\r |
32 | \r |
33 | u32 PicoReadM68k8_cell0(u32 a);\r |
34 | u32 PicoReadM68k8_cell1(u32 a);\r |
35 | u32 PicoReadM68k16_cell0(u32 a);\r |
36 | u32 PicoReadM68k16_cell1(u32 a);\r |
37 | void PicoWriteM68k8_cell0(u32 a, u32 d);\r |
38 | void PicoWriteM68k8_cell1(u32 a, u32 d);\r |
39 | void PicoWriteM68k16_cell0(u32 a, u32 d);\r |
40 | void PicoWriteM68k16_cell1(u32 a, u32 d);\r |
41 | \r |
42 | u32 PicoReadS68k8_dec0(u32 a);\r |
43 | u32 PicoReadS68k8_dec1(u32 a);\r |
44 | u32 PicoReadS68k16_dec0(u32 a);\r |
45 | u32 PicoReadS68k16_dec1(u32 a);\r |
46 | void PicoWriteS68k8_dec_m0b0(u32 a, u32 d);\r |
47 | void PicoWriteS68k8_dec_m1b0(u32 a, u32 d);\r |
48 | void PicoWriteS68k8_dec_m2b0(u32 a, u32 d);\r |
49 | void PicoWriteS68k8_dec_m0b1(u32 a, u32 d);\r |
50 | void PicoWriteS68k8_dec_m1b1(u32 a, u32 d);\r |
51 | void PicoWriteS68k8_dec_m2b1(u32 a, u32 d);\r |
52 | void PicoWriteS68k16_dec_m0b0(u32 a, u32 d);\r |
53 | void PicoWriteS68k16_dec_m1b0(u32 a, u32 d);\r |
54 | void PicoWriteS68k16_dec_m2b0(u32 a, u32 d);\r |
55 | void PicoWriteS68k16_dec_m0b1(u32 a, u32 d);\r |
56 | void PicoWriteS68k16_dec_m1b1(u32 a, u32 d);\r |
57 | void PicoWriteS68k16_dec_m2b1(u32 a, u32 d);\r |
58 | #endif\r |
59 | \r |
4fb43555 |
60 | static void remap_prg_window(u32 r1, u32 r3);\r |
61 | static void remap_word_ram(u32 r3);\r |
0ace9b9a |
62 | \r |
7a1f6e45 |
63 | // poller detection\r |
7a1f6e45 |
64 | #define POLL_LIMIT 16\r |
30e8aac4 |
65 | #define POLL_CYCLES 64\r |
cc68a136 |
66 | \r |
cc5ffc3c |
67 | void m68k_comm_check(u32 a)\r |
bc3c13d3 |
68 | {\r |
08769494 |
69 | pcd_sync_s68k(SekCyclesDone(), 0);\r |
ecc8036e |
70 | if (SekNotPolling || a != Pico_mcd->m.m68k_poll_a) {\r |
bc3c13d3 |
71 | Pico_mcd->m.m68k_poll_a = a;\r |
72 | Pico_mcd->m.m68k_poll_cnt = 0;\r |
ecc8036e |
73 | SekNotPolling = 0;\r |
cc5ffc3c |
74 | return;\r |
bc3c13d3 |
75 | }\r |
08769494 |
76 | Pico_mcd->m.m68k_poll_cnt++;\r |
bc3c13d3 |
77 | }\r |
78 | \r |
4ff2d527 |
79 | #ifndef _ASM_CD_MEMORY_C\r |
cb4a513a |
80 | static u32 m68k_reg_read16(u32 a)\r |
cc68a136 |
81 | {\r |
4fb43555 |
82 | u32 d = 0;\r |
cc68a136 |
83 | a &= 0x3e;\r |
cc68a136 |
84 | \r |
85 | switch (a) {\r |
672ad671 |
86 | case 0:\r |
4fb43555 |
87 | // here IFL2 is always 0, just like in Gens\r |
88 | d = ((Pico_mcd->s68k_regs[0x33] << 13) & 0x8000)\r |
89 | | Pico_mcd->m.busreq;\r |
672ad671 |
90 | goto end;\r |
cc68a136 |
91 | case 2:\r |
cc5ffc3c |
92 | m68k_comm_check(a);\r |
672ad671 |
93 | d = (Pico_mcd->s68k_regs[a]<<8) | (Pico_mcd->s68k_regs[a+1]&0xc7);\r |
af37bca8 |
94 | elprintf(EL_CDREG3, "m68k_regs r3: %02x @%06x", (u8)d, SekPc);\r |
cc5ffc3c |
95 | goto end;\r |
c459aefd |
96 | case 4:\r |
97 | d = Pico_mcd->s68k_regs[4]<<8;\r |
98 | goto end;\r |
99 | case 6:\r |
913ef4b7 |
100 | d = *(u16 *)(Pico_mcd->bios + 0x72);\r |
c459aefd |
101 | goto end;\r |
cc68a136 |
102 | case 8:\r |
3f23709e |
103 | d = cdc_host_r();\r |
cc68a136 |
104 | goto end;\r |
c459aefd |
105 | case 0xA:\r |
ca61ee42 |
106 | elprintf(EL_UIO, "m68k FIXME: reserved read");\r |
c459aefd |
107 | goto end;\r |
ae214f1c |
108 | case 0xC: // 384 cycle stopwatch timer\r |
109 | // ugh..\r |
110 | d = pcd_cycles_m68k_to_s68k(SekCyclesDone());\r |
111 | d = (d - Pico_mcd->m.stopwatch_base_c) / 384;\r |
112 | d &= 0x0fff;\r |
af37bca8 |
113 | elprintf(EL_CDREGS, "m68k stopwatch timer read (%04x)", d);\r |
1cd356a3 |
114 | goto end;\r |
cc68a136 |
115 | }\r |
116 | \r |
cc68a136 |
117 | if (a < 0x30) {\r |
118 | // comm flag/cmd/status (0xE-0x2F)\r |
cc5ffc3c |
119 | m68k_comm_check(a);\r |
cc68a136 |
120 | d = (Pico_mcd->s68k_regs[a]<<8) | Pico_mcd->s68k_regs[a+1];\r |
cc5ffc3c |
121 | goto end;\r |
cc68a136 |
122 | }\r |
123 | \r |
ca61ee42 |
124 | elprintf(EL_UIO, "m68k_regs FIXME invalid read @ %02x", a);\r |
cc68a136 |
125 | \r |
126 | end:\r |
cc68a136 |
127 | return d;\r |
128 | }\r |
4ff2d527 |
129 | #endif\r |
cc68a136 |
130 | \r |
4ff2d527 |
131 | #ifndef _ASM_CD_MEMORY_C\r |
132 | static\r |
133 | #endif\r |
134 | void m68k_reg_write8(u32 a, u32 d)\r |
cc68a136 |
135 | {\r |
af37bca8 |
136 | u32 dold;\r |
cc68a136 |
137 | a &= 0x3f;\r |
cc68a136 |
138 | \r |
139 | switch (a) {\r |
140 | case 0:\r |
672ad671 |
141 | d &= 1;\r |
08769494 |
142 | if (d && (Pico_mcd->s68k_regs[0x33] & PCDS_IEN2)) {\r |
143 | elprintf(EL_INTS, "m68k: s68k irq 2");\r |
144 | pcd_sync_s68k(SekCyclesDone(), 0);\r |
145 | SekInterruptS68k(2);\r |
146 | }\r |
c459aefd |
147 | return;\r |
cc68a136 |
148 | case 1:\r |
672ad671 |
149 | d &= 3;\r |
4fb43555 |
150 | dold = Pico_mcd->m.busreq;\r |
151 | if (!(d & 1))\r |
152 | d |= 2; // verified: can't release bus on reset\r |
153 | if (dold == d)\r |
bc3c13d3 |
154 | return;\r |
4fb43555 |
155 | \r |
08769494 |
156 | pcd_sync_s68k(SekCyclesDone(), 0);\r |
bc3c13d3 |
157 | \r |
4fb43555 |
158 | if ((dold ^ d) & 1)\r |
bc3c13d3 |
159 | elprintf(EL_INTSW, "m68k: s68k reset %i", !(d&1));\r |
4fb43555 |
160 | if (!(d & 1))\r |
161 | Pico_mcd->m.state_flags |= PCD_ST_S68K_RST;\r |
162 | else if (d == 1 && (Pico_mcd->m.state_flags & PCD_ST_S68K_RST)) {\r |
163 | Pico_mcd->m.state_flags &= ~PCD_ST_S68K_RST;\r |
164 | elprintf(EL_CDREGS, "m68k: resetting s68k");\r |
165 | SekResetS68k();\r |
cc68a136 |
166 | }\r |
4fb43555 |
167 | if ((dold ^ d) & 2) {\r |
bc3c13d3 |
168 | elprintf(EL_INTSW, "m68k: s68k brq %i", d >> 1);\r |
4fb43555 |
169 | remap_prg_window(d, Pico_mcd->s68k_regs[3]);\r |
bc3c13d3 |
170 | }\r |
c459aefd |
171 | Pico_mcd->m.busreq = d;\r |
172 | return;\r |
672ad671 |
173 | case 2:\r |
af37bca8 |
174 | elprintf(EL_CDREGS, "m68k: prg wp=%02x", d);\r |
672ad671 |
175 | Pico_mcd->s68k_regs[2] = d; // really use s68k side register\r |
176 | return;\r |
af37bca8 |
177 | case 3:\r |
178 | dold = Pico_mcd->s68k_regs[3];\r |
179 | elprintf(EL_CDREG3, "m68k_regs w3: %02x @%06x", (u8)d, SekPc);\r |
af37bca8 |
180 | if ((d ^ dold) & 0xc0) {\r |
08769494 |
181 | elprintf(EL_CDREGS, "m68k: prg bank: %i -> %i",\r |
182 | (Pico_mcd->s68k_regs[a]>>6), ((d>>6)&3));\r |
4fb43555 |
183 | remap_prg_window(Pico_mcd->m.busreq, d);\r |
7a1f6e45 |
184 | }\r |
ba6e8bfd |
185 | \r |
186 | // 2M mode state is tracked regardless of current mode\r |
187 | if (d & 2) {\r |
188 | Pico_mcd->m.dmna_ret_2m |= 2;\r |
189 | Pico_mcd->m.dmna_ret_2m &= ~1;\r |
190 | }\r |
191 | if (dold & 4) { // 1M mode\r |
192 | d ^= 2; // 0 sets DMNA, 1 does nothing\r |
193 | d = (d & 0xc2) | (dold & 0x1f);\r |
194 | }\r |
195 | else\r |
196 | d = (d & 0xc0) | (dold & 0x1c) | Pico_mcd->m.dmna_ret_2m;\r |
197 | \r |
08769494 |
198 | goto write_comm;\r |
c459aefd |
199 | case 6:\r |
d1df8786 |
200 | Pico_mcd->bios[0x72 + 1] = d; // simple hint vector changer\r |
c459aefd |
201 | return;\r |
202 | case 7:\r |
d1df8786 |
203 | Pico_mcd->bios[0x72] = d;\r |
af37bca8 |
204 | elprintf(EL_CDREGS, "hint vector set to %04x%04x",\r |
205 | ((u16 *)Pico_mcd->bios)[0x70/2], ((u16 *)Pico_mcd->bios)[0x72/2]);\r |
c459aefd |
206 | return;\r |
08769494 |
207 | case 0x0f:\r |
08769494 |
208 | a = 0x0e;\r |
209 | case 0x0e:\r |
210 | goto write_comm;\r |
672ad671 |
211 | }\r |
212 | \r |
08769494 |
213 | if ((a&0xf0) == 0x10)\r |
214 | goto write_comm;\r |
cc68a136 |
215 | \r |
ca61ee42 |
216 | elprintf(EL_UIO, "m68k FIXME: invalid write? [%02x] %02x", a, d);\r |
08769494 |
217 | return;\r |
218 | \r |
219 | write_comm:\r |
220 | if (d == Pico_mcd->s68k_regs[a])\r |
221 | return;\r |
222 | \r |
08769494 |
223 | pcd_sync_s68k(SekCyclesDone(), 0);\r |
30e8aac4 |
224 | Pico_mcd->s68k_regs[a] = d;\r |
334d9fb6 |
225 | if (Pico_mcd->m.s68k_poll_a == (a & ~1))\r |
30e8aac4 |
226 | {\r |
334d9fb6 |
227 | if (Pico_mcd->m.s68k_poll_cnt > POLL_LIMIT) {\r |
228 | elprintf(EL_CDPOLL, "s68k poll release, a=%02x", a);\r |
229 | SekSetStopS68k(0);\r |
230 | }\r |
08769494 |
231 | Pico_mcd->m.s68k_poll_a = 0;\r |
08769494 |
232 | }\r |
cc68a136 |
233 | }\r |
234 | \r |
2433f409 |
235 | u32 s68k_poll_detect(u32 a, u32 d)\r |
236 | {\r |
237 | #ifdef USE_POLL_DETECT\r |
08769494 |
238 | u32 cycles, cnt = 0;\r |
239 | if (SekIsStoppedS68k())\r |
240 | return d;\r |
241 | \r |
242 | cycles = SekCyclesDoneS68k();\r |
ecc8036e |
243 | if (!SekNotPolling && a == Pico_mcd->m.s68k_poll_a) {\r |
08769494 |
244 | u32 clkdiff = cycles - Pico_mcd->m.s68k_poll_clk;\r |
2433f409 |
245 | if (clkdiff <= POLL_CYCLES) {\r |
08769494 |
246 | cnt = Pico_mcd->m.s68k_poll_cnt + 1;\r |
247 | //printf("-- diff: %u, cnt = %i\n", clkdiff, cnt);\r |
248 | if (Pico_mcd->m.s68k_poll_cnt > POLL_LIMIT) {\r |
2433f409 |
249 | SekSetStopS68k(1);\r |
cc5ffc3c |
250 | elprintf(EL_CDPOLL, "s68k poll detected @%06x, a=%02x",\r |
08769494 |
251 | SekPcS68k, a);\r |
2433f409 |
252 | }\r |
2433f409 |
253 | }\r |
254 | }\r |
08769494 |
255 | Pico_mcd->m.s68k_poll_a = a;\r |
256 | Pico_mcd->m.s68k_poll_clk = cycles;\r |
257 | Pico_mcd->m.s68k_poll_cnt = cnt;\r |
ecc8036e |
258 | SekNotPollingS68k = 0;\r |
2433f409 |
259 | #endif\r |
260 | return d;\r |
261 | }\r |
cc68a136 |
262 | \r |
913ef4b7 |
263 | #define READ_FONT_DATA(basemask) \\r |
264 | { \\r |
265 | unsigned int fnt = *(unsigned int *)(Pico_mcd->s68k_regs + 0x4c); \\r |
266 | unsigned int col0 = (fnt >> 8) & 0x0f, col1 = (fnt >> 12) & 0x0f; \\r |
267 | if (fnt & (basemask << 0)) d = col1 ; else d = col0; \\r |
268 | if (fnt & (basemask << 1)) d |= col1 << 4; else d |= col0 << 4; \\r |
269 | if (fnt & (basemask << 2)) d |= col1 << 8; else d |= col0 << 8; \\r |
270 | if (fnt & (basemask << 3)) d |= col1 << 12; else d |= col0 << 12; \\r |
271 | }\r |
272 | \r |
cc68a136 |
273 | \r |
4ff2d527 |
274 | #ifndef _ASM_CD_MEMORY_C\r |
275 | static\r |
276 | #endif\r |
277 | u32 s68k_reg_read16(u32 a)\r |
cc68a136 |
278 | {\r |
279 | u32 d=0;\r |
cc68a136 |
280 | \r |
cc68a136 |
281 | switch (a) {\r |
282 | case 0:\r |
7a1f6e45 |
283 | return ((Pico_mcd->s68k_regs[0]&3)<<8) | 1; // ver = 0, not in reset state\r |
672ad671 |
284 | case 2:\r |
2433f409 |
285 | d = (Pico_mcd->s68k_regs[2]<<8) | (Pico_mcd->s68k_regs[3]&0x1f);\r |
af37bca8 |
286 | elprintf(EL_CDREG3, "s68k_regs r3: %02x @%06x", (u8)d, SekPcS68k);\r |
2433f409 |
287 | return s68k_poll_detect(a, d);\r |
cc68a136 |
288 | case 6:\r |
3f23709e |
289 | return cdc_reg_r();\r |
cc68a136 |
290 | case 8:\r |
3f23709e |
291 | return cdc_host_r();\r |
cc68a136 |
292 | case 0xC:\r |
ae214f1c |
293 | d = SekCyclesDoneS68k() - Pico_mcd->m.stopwatch_base_c;\r |
294 | d /= 384;\r |
295 | d &= 0x0fff;\r |
af37bca8 |
296 | elprintf(EL_CDREGS, "s68k stopwatch timer read (%04x)", d);\r |
7a1f6e45 |
297 | return d;\r |
d1df8786 |
298 | case 0x30:\r |
af37bca8 |
299 | elprintf(EL_CDREGS, "s68k int3 timer read (%02x)", Pico_mcd->s68k_regs[31]);\r |
7a1f6e45 |
300 | return Pico_mcd->s68k_regs[31];\r |
cc68a136 |
301 | case 0x34: // fader\r |
7a1f6e45 |
302 | return 0; // no busy bit\r |
913ef4b7 |
303 | case 0x50: // font data (check: Lunar 2, Silpheed)\r |
304 | READ_FONT_DATA(0x00100000);\r |
7a1f6e45 |
305 | return d;\r |
913ef4b7 |
306 | case 0x52:\r |
307 | READ_FONT_DATA(0x00010000);\r |
7a1f6e45 |
308 | return d;\r |
913ef4b7 |
309 | case 0x54:\r |
310 | READ_FONT_DATA(0x10000000);\r |
7a1f6e45 |
311 | return d;\r |
913ef4b7 |
312 | case 0x56:\r |
313 | READ_FONT_DATA(0x01000000);\r |
7a1f6e45 |
314 | return d;\r |
cc68a136 |
315 | }\r |
316 | \r |
317 | d = (Pico_mcd->s68k_regs[a]<<8) | Pico_mcd->s68k_regs[a+1];\r |
318 | \r |
2433f409 |
319 | if (a >= 0x0e && a < 0x30)\r |
320 | return s68k_poll_detect(a, d);\r |
7a1f6e45 |
321 | \r |
cc68a136 |
322 | return d;\r |
323 | }\r |
324 | \r |
4ff2d527 |
325 | #ifndef _ASM_CD_MEMORY_C\r |
326 | static\r |
327 | #endif\r |
328 | void s68k_reg_write8(u32 a, u32 d)\r |
cc68a136 |
329 | {\r |
48e8482f |
330 | // Warning: d might have upper bits set\r |
cc68a136 |
331 | switch (a) {\r |
d0132772 |
332 | case 1:\r |
333 | if (!(d & 1))\r |
334 | pcd_soft_reset();\r |
335 | return;\r |
672ad671 |
336 | case 2:\r |
337 | return; // only m68k can change WP\r |
fa1e5e29 |
338 | case 3: {\r |
339 | int dold = Pico_mcd->s68k_regs[3];\r |
af37bca8 |
340 | elprintf(EL_CDREG3, "s68k_regs w3: %02x @%06x", (u8)d, SekPcS68k);\r |
672ad671 |
341 | d &= 0x1d;\r |
af37bca8 |
342 | d |= dold & 0xc2;\r |
ba6e8bfd |
343 | \r |
344 | // 2M mode state\r |
345 | if (d & 1) {\r |
346 | Pico_mcd->m.dmna_ret_2m |= 1;\r |
347 | Pico_mcd->m.dmna_ret_2m &= ~2; // DMNA clears\r |
348 | }\r |
349 | \r |
af37bca8 |
350 | if (d & 4)\r |
39230401 |
351 | {\r |
fa1e5e29 |
352 | if (!(dold & 4)) {\r |
af37bca8 |
353 | elprintf(EL_CDREG3, "wram mode 2M->1M");\r |
fa1e5e29 |
354 | wram_2M_to_1M(Pico_mcd->word_ram2M);\r |
4ff2d527 |
355 | }\r |
ba6e8bfd |
356 | \r |
357 | if ((d ^ dold) & 0x1d)\r |
358 | remap_word_ram(d);\r |
359 | \r |
360 | if ((d ^ dold) & 0x05)\r |
361 | d &= ~2; // clear DMNA - swap complete\r |
39230401 |
362 | }\r |
363 | else\r |
364 | {\r |
fa1e5e29 |
365 | if (dold & 4) {\r |
af37bca8 |
366 | elprintf(EL_CDREG3, "wram mode 1M->2M");\r |
fa1e5e29 |
367 | wram_1M_to_2M(Pico_mcd->word_ram2M);\r |
0ace9b9a |
368 | remap_word_ram(d);\r |
4ff2d527 |
369 | }\r |
ba6e8bfd |
370 | d = (d & ~3) | Pico_mcd->m.dmna_ret_2m;\r |
d0d47c5b |
371 | }\r |
08769494 |
372 | goto write_comm;\r |
fa1e5e29 |
373 | }\r |
cc68a136 |
374 | case 4:\r |
af37bca8 |
375 | elprintf(EL_CDREGS, "s68k CDC dest: %x", d&7);\r |
cc68a136 |
376 | Pico_mcd->s68k_regs[4] = (Pico_mcd->s68k_regs[4]&0xC0) | (d&7); // CDC mode\r |
377 | return;\r |
378 | case 5:\r |
c459aefd |
379 | //dprintf("s68k CDC reg addr: %x", d&0xf);\r |
cc68a136 |
380 | break;\r |
381 | case 7:\r |
3f23709e |
382 | cdc_reg_w(d);\r |
cc68a136 |
383 | return;\r |
384 | case 0xa:\r |
af37bca8 |
385 | elprintf(EL_CDREGS, "s68k set CDC dma addr");\r |
cc68a136 |
386 | break;\r |
d1df8786 |
387 | case 0xc:\r |
ae214f1c |
388 | case 0xd: // 384 cycle stopwatch timer\r |
389 | elprintf(EL_CDREGS|EL_CD, "s68k clear stopwatch (%x)", d);\r |
390 | // does this also reset internal 384 cycle counter?\r |
391 | Pico_mcd->m.stopwatch_base_c = SekCyclesDoneS68k();\r |
4f265db7 |
392 | return;\r |
08769494 |
393 | case 0x0e:\r |
08769494 |
394 | a = 0x0f;\r |
395 | case 0x0f:\r |
396 | goto write_comm;\r |
ae214f1c |
397 | case 0x31: // 384 cycle int3 timer\r |
398 | d &= 0xff;\r |
399 | elprintf(EL_CDREGS|EL_CD, "s68k set int3 timer: %02x", d);\r |
400 | Pico_mcd->s68k_regs[a] = (u8) d;\r |
401 | if (d) // d or d+1??\r |
402 | pcd_event_schedule_s68k(PCD_EVENT_TIMER3, d * 384);\r |
403 | else\r |
404 | pcd_event_schedule(0, PCD_EVENT_TIMER3, 0);\r |
d1df8786 |
405 | break;\r |
cc68a136 |
406 | case 0x33: // IRQ mask\r |
ae214f1c |
407 | elprintf(EL_CDREGS|EL_CD, "s68k irq mask: %02x", d);\r |
408 | d &= 0x7e;\r |
409 | if ((d ^ Pico_mcd->s68k_regs[0x33]) & d & PCDS_IEN4) {\r |
274fcc35 |
410 | // XXX: emulate pending irq instead?\r |
411 | if (Pico_mcd->s68k_regs[0x37] & 4) {\r |
412 | elprintf(EL_INTS, "cdd export irq 4 (unmask)");\r |
413 | SekInterruptS68k(4);\r |
414 | }\r |
cc68a136 |
415 | }\r |
416 | break;\r |
417 | case 0x34: // fader\r |
418 | Pico_mcd->s68k_regs[a] = (u8) d & 0x7f;\r |
419 | return;\r |
672ad671 |
420 | case 0x36:\r |
421 | return; // d/m bit is unsetable\r |
422 | case 0x37: {\r |
423 | u32 d_old = Pico_mcd->s68k_regs[0x37];\r |
274fcc35 |
424 | Pico_mcd->s68k_regs[0x37] = d & 7;\r |
672ad671 |
425 | if ((d&4) && !(d_old&4)) {\r |
274fcc35 |
426 | // ??\r |
427 | pcd_event_schedule_s68k(PCD_EVENT_CDC, 12500000/75);\r |
428 | \r |
429 | if (Pico_mcd->s68k_regs[0x33] & PCDS_IEN4) {\r |
430 | elprintf(EL_INTS, "cdd export irq 4");\r |
431 | SekInterruptS68k(4);\r |
432 | }\r |
cc68a136 |
433 | }\r |
672ad671 |
434 | return;\r |
435 | }\r |
cc68a136 |
436 | case 0x4b:\r |
7b3ddc11 |
437 | Pico_mcd->s68k_regs[a] = 0; // (u8) d; ?\r |
274fcc35 |
438 | cdd_process();\r |
7b3ddc11 |
439 | {\r |
440 | static const char *nm[] =\r |
441 | { "stat", "stop", "read_toc", "play",\r |
442 | "seek", "???", "pause", "resume",\r |
443 | "ff", "fr", "tjump", "???",\r |
444 | "close","open", "???", "???" };\r |
445 | u8 *c = &Pico_mcd->s68k_regs[0x42];\r |
446 | u8 *s = &Pico_mcd->s68k_regs[0x38];\r |
447 | elprintf(EL_CD,\r |
448 | "CDD command: %02x %02x %02x %02x %02x %02x %02x %02x %12s",\r |
449 | c[0], c[1], c[2], c[3], c[4], c[5], c[6], c[7], nm[c[0] & 0x0f]);\r |
450 | elprintf(EL_CD,\r |
451 | "CDD status: %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x",\r |
452 | s[0], s[1], s[2], s[3], s[4], s[5], s[6], s[7], s[8], s[9]);\r |
453 | }\r |
cc68a136 |
454 | return;\r |
a93a80de |
455 | case 0x58:\r |
456 | return;\r |
cc68a136 |
457 | }\r |
458 | \r |
08769494 |
459 | if ((a&0x1f0) == 0x20)\r |
460 | goto write_comm;\r |
461 | \r |
1cd356a3 |
462 | if ((a&0x1f0) == 0x10 || (a >= 0x38 && a < 0x42))\r |
cc68a136 |
463 | {\r |
ca61ee42 |
464 | elprintf(EL_UIO, "s68k FIXME: invalid write @ %02x?", a);\r |
cc68a136 |
465 | return;\r |
466 | }\r |
467 | \r |
08769494 |
468 | Pico_mcd->s68k_regs[a] = (u8) d;\r |
469 | return;\r |
bc3c13d3 |
470 | \r |
08769494 |
471 | write_comm:\r |
cc68a136 |
472 | Pico_mcd->s68k_regs[a] = (u8) d;\r |
08769494 |
473 | if (Pico_mcd->m.m68k_poll_cnt)\r |
474 | SekEndRunS68k(0);\r |
475 | Pico_mcd->m.m68k_poll_cnt = 0;\r |
cc68a136 |
476 | }\r |
477 | \r |
a93a80de |
478 | void s68k_reg_write16(u32 a, u32 d)\r |
479 | {\r |
480 | u8 *r = Pico_mcd->s68k_regs;\r |
481 | \r |
482 | if ((a & 0x1f0) == 0x20)\r |
483 | goto write_comm;\r |
484 | \r |
485 | switch (a) {\r |
486 | case 0x0e:\r |
487 | // special case, 2 byte writes would be handled differently\r |
488 | // TODO: verify\r |
489 | r[0xf] = d;\r |
490 | return;\r |
491 | case 0x58: // stamp data size\r |
492 | r[0x59] = d & 7;\r |
493 | return;\r |
494 | case 0x5a: // stamp map base address\r |
495 | r[0x5a] = d >> 8;\r |
496 | r[0x5b] = d & 0xe0;\r |
497 | return;\r |
498 | case 0x5c: // V cell size\r |
499 | r[0x5d] = d & 0x1f;\r |
500 | return;\r |
501 | case 0x5e: // image buffer start address\r |
502 | r[0x5e] = d >> 8;\r |
503 | r[0x5f] = d & 0xf8;\r |
504 | return;\r |
505 | case 0x60: // image buffer offset\r |
506 | r[0x61] = d & 0x3f;\r |
507 | return;\r |
508 | case 0x62: // h dot size\r |
509 | r[0x62] = (d >> 8) & 1;\r |
510 | r[0x63] = d;\r |
511 | return;\r |
512 | case 0x64: // v dot size\r |
513 | r[0x65] = d;\r |
514 | return;\r |
515 | case 0x66: // trace vector base address\r |
516 | d &= 0xfffe;\r |
517 | r[0x66] = d >> 8;\r |
518 | r[0x67] = d;\r |
519 | gfx_start(d);\r |
520 | return;\r |
521 | default:\r |
522 | break;\r |
523 | }\r |
524 | \r |
525 | s68k_reg_write8(a, d >> 8);\r |
526 | s68k_reg_write8(a + 1, d & 0xff);\r |
527 | return;\r |
528 | \r |
529 | write_comm:\r |
530 | r[a] = d >> 8;\r |
531 | r[a + 1] = d;\r |
532 | if (Pico_mcd->m.m68k_poll_cnt)\r |
533 | SekEndRunS68k(0);\r |
534 | Pico_mcd->m.m68k_poll_cnt = 0;\r |
535 | }\r |
536 | \r |
af37bca8 |
537 | // -----------------------------------------------------------------\r |
538 | // Main 68k\r |
539 | // -----------------------------------------------------------------\r |
cc68a136 |
540 | \r |
af37bca8 |
541 | #ifndef _ASM_CD_MEMORY_C\r |
542 | #include "cell_map.c"\r |
af37bca8 |
543 | \r |
544 | // WORD RAM, cell aranged area (220000 - 23ffff)\r |
0ace9b9a |
545 | static u32 PicoReadM68k8_cell0(u32 a)\r |
cc68a136 |
546 | {\r |
af37bca8 |
547 | a = (a&3) | (cell_map(a >> 2) << 2); // cell arranged\r |
0ace9b9a |
548 | return Pico_mcd->word_ram1M[0][a ^ 1];\r |
549 | }\r |
550 | \r |
551 | static u32 PicoReadM68k8_cell1(u32 a)\r |
552 | {\r |
553 | a = (a&3) | (cell_map(a >> 2) << 2);\r |
554 | return Pico_mcd->word_ram1M[1][a ^ 1];\r |
555 | }\r |
556 | \r |
557 | static u32 PicoReadM68k16_cell0(u32 a)\r |
558 | {\r |
559 | a = (a&2) | (cell_map(a >> 2) << 2);\r |
560 | return *(u16 *)(Pico_mcd->word_ram1M[0] + a);\r |
af37bca8 |
561 | }\r |
cc68a136 |
562 | \r |
0ace9b9a |
563 | static u32 PicoReadM68k16_cell1(u32 a)\r |
af37bca8 |
564 | {\r |
af37bca8 |
565 | a = (a&2) | (cell_map(a >> 2) << 2);\r |
0ace9b9a |
566 | return *(u16 *)(Pico_mcd->word_ram1M[1] + a);\r |
af37bca8 |
567 | }\r |
cc68a136 |
568 | \r |
0ace9b9a |
569 | static void PicoWriteM68k8_cell0(u32 a, u32 d)\r |
af37bca8 |
570 | {\r |
af37bca8 |
571 | a = (a&3) | (cell_map(a >> 2) << 2);\r |
0ace9b9a |
572 | Pico_mcd->word_ram1M[0][a ^ 1] = d;\r |
af37bca8 |
573 | }\r |
8022f53d |
574 | \r |
0ace9b9a |
575 | static void PicoWriteM68k8_cell1(u32 a, u32 d)\r |
af37bca8 |
576 | {\r |
af37bca8 |
577 | a = (a&3) | (cell_map(a >> 2) << 2);\r |
0ace9b9a |
578 | Pico_mcd->word_ram1M[1][a ^ 1] = d;\r |
af37bca8 |
579 | }\r |
580 | \r |
0ace9b9a |
581 | static void PicoWriteM68k16_cell0(u32 a, u32 d)\r |
582 | {\r |
583 | a = (a&3) | (cell_map(a >> 2) << 2);\r |
584 | *(u16 *)(Pico_mcd->word_ram1M[0] + a) = d;\r |
585 | }\r |
586 | \r |
587 | static void PicoWriteM68k16_cell1(u32 a, u32 d)\r |
588 | {\r |
589 | a = (a&3) | (cell_map(a >> 2) << 2);\r |
590 | *(u16 *)(Pico_mcd->word_ram1M[1] + a) = d;\r |
591 | }\r |
592 | #endif\r |
593 | \r |
af37bca8 |
594 | // RAM cart (40000 - 7fffff, optional)\r |
595 | static u32 PicoReadM68k8_ramc(u32 a)\r |
596 | {\r |
597 | u32 d = 0;\r |
598 | if (a == 0x400001) {\r |
599 | if (SRam.data != NULL)\r |
600 | d = 3; // 64k cart\r |
601 | return d;\r |
8022f53d |
602 | }\r |
603 | \r |
af37bca8 |
604 | if ((a & 0xfe0000) == 0x600000) {\r |
605 | if (SRam.data != NULL)\r |
606 | d = SRam.data[((a >> 1) & 0xffff) + 0x2000];\r |
607 | return d;\r |
8022f53d |
608 | }\r |
609 | \r |
af37bca8 |
610 | if (a == 0x7fffff)\r |
611 | return Pico_mcd->m.bcram_reg;\r |
cc68a136 |
612 | \r |
af37bca8 |
613 | elprintf(EL_UIO, "m68k unmapped r8 [%06x] @%06x", a, SekPc);\r |
cc68a136 |
614 | return d;\r |
615 | }\r |
616 | \r |
af37bca8 |
617 | static u32 PicoReadM68k16_ramc(u32 a)\r |
cc68a136 |
618 | {\r |
af37bca8 |
619 | elprintf(EL_ANOMALY, "ramcart r16: [%06x] @%06x", a, SekPcS68k);\r |
620 | return PicoReadM68k8_ramc(a + 1);\r |
621 | }\r |
cc68a136 |
622 | \r |
af37bca8 |
623 | static void PicoWriteM68k8_ramc(u32 a, u32 d)\r |
624 | {\r |
625 | if ((a & 0xfe0000) == 0x600000) {\r |
626 | if (SRam.data != NULL && (Pico_mcd->m.bcram_reg & 1)) {\r |
627 | SRam.data[((a>>1) & 0xffff) + 0x2000] = d;\r |
8022f53d |
628 | SRam.changed = 1;\r |
629 | }\r |
630 | return;\r |
631 | }\r |
632 | \r |
af37bca8 |
633 | if (a == 0x7fffff) {\r |
634 | Pico_mcd->m.bcram_reg = d;\r |
8022f53d |
635 | return;\r |
636 | }\r |
637 | \r |
c7fd7bb8 |
638 | elprintf(EL_UIO, "m68k unmapped w8 [%06x] %02x @%06x",\r |
639 | a, d & 0xff, SekPc);\r |
cc68a136 |
640 | }\r |
641 | \r |
af37bca8 |
642 | static void PicoWriteM68k16_ramc(u32 a, u32 d)\r |
cc68a136 |
643 | {\r |
c7fd7bb8 |
644 | elprintf(EL_ANOMALY, "ramcart w16: [%06x] %04x @%06x",\r |
645 | a, d, SekPcS68k);\r |
af37bca8 |
646 | PicoWriteM68k8_ramc(a + 1, d);\r |
cc68a136 |
647 | }\r |
648 | \r |
af37bca8 |
649 | // IO/control/cd registers (a10000 - ...)\r |
0ace9b9a |
650 | #ifndef _ASM_CD_MEMORY_C\r |
fa8fb754 |
651 | u32 PicoRead8_mcd_io(u32 a)\r |
cc68a136 |
652 | {\r |
af37bca8 |
653 | u32 d;\r |
654 | if ((a & 0xff00) == 0x2000) { // a12000 - a120ff\r |
655 | d = m68k_reg_read16(a); // TODO: m68k_reg_read8\r |
656 | if (!(a & 1))\r |
657 | d >>= 8;\r |
658 | d &= 0xff;\r |
c7fd7bb8 |
659 | elprintf(EL_CDREGS, "m68k_regs r8: [%02x] %02x @%06x",\r |
660 | a & 0x3f, d, SekPc);\r |
af37bca8 |
661 | return d;\r |
662 | }\r |
663 | \r |
664 | // fallback to default MD handler\r |
665 | return PicoRead8_io(a);\r |
cc68a136 |
666 | }\r |
667 | \r |
fa8fb754 |
668 | u32 PicoRead16_mcd_io(u32 a)\r |
cc68a136 |
669 | {\r |
af37bca8 |
670 | u32 d;\r |
671 | if ((a & 0xff00) == 0x2000) {\r |
672 | d = m68k_reg_read16(a);\r |
c7fd7bb8 |
673 | elprintf(EL_CDREGS, "m68k_regs r16: [%02x] %04x @%06x",\r |
674 | a & 0x3f, d, SekPc);\r |
af37bca8 |
675 | return d;\r |
b542be46 |
676 | }\r |
cc68a136 |
677 | \r |
af37bca8 |
678 | return PicoRead16_io(a);\r |
cc68a136 |
679 | }\r |
680 | \r |
fa8fb754 |
681 | void PicoWrite8_mcd_io(u32 a, u32 d)\r |
cc68a136 |
682 | {\r |
af37bca8 |
683 | if ((a & 0xff00) == 0x2000) { // a12000 - a120ff\r |
c7fd7bb8 |
684 | elprintf(EL_CDREGS, "m68k_regs w8: [%02x] %02x @%06x",\r |
685 | a & 0x3f, d, SekPc);\r |
2433f409 |
686 | m68k_reg_write8(a, d);\r |
687 | return;\r |
688 | }\r |
672ad671 |
689 | \r |
334d9fb6 |
690 | PicoWrite8_io(a, d);\r |
cc68a136 |
691 | }\r |
ab0607f7 |
692 | \r |
fa8fb754 |
693 | void PicoWrite16_mcd_io(u32 a, u32 d)\r |
cc68a136 |
694 | {\r |
af37bca8 |
695 | if ((a & 0xff00) == 0x2000) { // a12000 - a120ff\r |
c7fd7bb8 |
696 | elprintf(EL_CDREGS, "m68k_regs w16: [%02x] %04x @%06x",\r |
697 | a & 0x3f, d, SekPc);\r |
08769494 |
698 | \r |
334d9fb6 |
699 | m68k_reg_write8(a, d >> 8);\r |
08769494 |
700 | if ((a & 0x3e) != 0x0e) // special case\r |
701 | m68k_reg_write8(a + 1, d & 0xff);\r |
b542be46 |
702 | return;\r |
703 | }\r |
704 | \r |
af37bca8 |
705 | PicoWrite16_io(a, d);\r |
cc68a136 |
706 | }\r |
0ace9b9a |
707 | #endif\r |
cc68a136 |
708 | \r |
721cd396 |
709 | // -----------------------------------------------------------------\r |
af37bca8 |
710 | // Sub 68k\r |
cc68a136 |
711 | // -----------------------------------------------------------------\r |
712 | \r |
af37bca8 |
713 | static u32 s68k_unmapped_read8(u32 a)\r |
cc68a136 |
714 | {\r |
af37bca8 |
715 | elprintf(EL_UIO, "s68k unmapped r8 [%06x] @%06x", a, SekPc);\r |
716 | return 0;\r |
cc68a136 |
717 | }\r |
718 | \r |
af37bca8 |
719 | static u32 s68k_unmapped_read16(u32 a)\r |
cc68a136 |
720 | {\r |
af37bca8 |
721 | elprintf(EL_UIO, "s68k unmapped r16 [%06x] @%06x", a, SekPc);\r |
722 | return 0;\r |
723 | }\r |
4f265db7 |
724 | \r |
af37bca8 |
725 | static void s68k_unmapped_write8(u32 a, u32 d)\r |
726 | {\r |
c7fd7bb8 |
727 | elprintf(EL_UIO, "s68k unmapped w8 [%06x] %02x @%06x",\r |
728 | a, d & 0xff, SekPc);\r |
af37bca8 |
729 | }\r |
cc68a136 |
730 | \r |
af37bca8 |
731 | static void s68k_unmapped_write16(u32 a, u32 d)\r |
732 | {\r |
c7fd7bb8 |
733 | elprintf(EL_UIO, "s68k unmapped w16 [%06x] %04x @%06x",\r |
734 | a, d & 0xffff, SekPc);\r |
af37bca8 |
735 | }\r |
cc68a136 |
736 | \r |
59991f11 |
737 | // PRG RAM protected range (000000 - 01fdff)?\r |
0ace9b9a |
738 | // XXX verify: ff00 or 1fe00 max?\r |
739 | static void PicoWriteS68k8_prgwp(u32 a, u32 d)\r |
740 | {\r |
59991f11 |
741 | if (a >= (Pico_mcd->s68k_regs[2] << 9))\r |
0ace9b9a |
742 | Pico_mcd->prg_ram[a ^ 1] = d;\r |
743 | }\r |
744 | \r |
745 | static void PicoWriteS68k16_prgwp(u32 a, u32 d)\r |
746 | {\r |
59991f11 |
747 | if (a >= (Pico_mcd->s68k_regs[2] << 9))\r |
0ace9b9a |
748 | *(u16 *)(Pico_mcd->prg_ram + a) = d;\r |
749 | }\r |
750 | \r |
751 | #ifndef _ASM_CD_MEMORY_C\r |
752 | \r |
af37bca8 |
753 | // decode (080000 - 0bffff, in 1M mode)\r |
0ace9b9a |
754 | static u32 PicoReadS68k8_dec0(u32 a)\r |
755 | {\r |
756 | u32 d = Pico_mcd->word_ram1M[0][((a >> 1) ^ 1) & 0x1ffff];\r |
757 | if (a & 1)\r |
758 | d &= 0x0f;\r |
759 | else\r |
760 | d >>= 4;\r |
761 | return d;\r |
762 | }\r |
763 | \r |
764 | static u32 PicoReadS68k8_dec1(u32 a)\r |
af37bca8 |
765 | {\r |
0ace9b9a |
766 | u32 d = Pico_mcd->word_ram1M[1][((a >> 1) ^ 1) & 0x1ffff];\r |
af37bca8 |
767 | if (a & 1)\r |
768 | d &= 0x0f;\r |
769 | else\r |
770 | d >>= 4;\r |
cc68a136 |
771 | return d;\r |
772 | }\r |
773 | \r |
0ace9b9a |
774 | static u32 PicoReadS68k16_dec0(u32 a)\r |
cc68a136 |
775 | {\r |
0ace9b9a |
776 | u32 d = Pico_mcd->word_ram1M[0][((a >> 1) ^ 1) & 0x1ffff];\r |
af37bca8 |
777 | d |= d << 4;\r |
778 | d &= ~0xf0;\r |
cc68a136 |
779 | return d;\r |
780 | }\r |
ab0607f7 |
781 | \r |
0ace9b9a |
782 | static u32 PicoReadS68k16_dec1(u32 a)\r |
0a051f55 |
783 | {\r |
0ace9b9a |
784 | u32 d = Pico_mcd->word_ram1M[1][((a >> 1) ^ 1) & 0x1ffff];\r |
785 | d |= d << 4;\r |
786 | d &= ~0xf0;\r |
787 | return d;\r |
0a051f55 |
788 | }\r |
789 | \r |
0ace9b9a |
790 | /* check: jaguar xj 220 (draws entire world using decode) */\r |
791 | #define mk_decode_w8(bank) \\r |
792 | static void PicoWriteS68k8_dec_m0b##bank(u32 a, u32 d) \\r |
793 | { \\r |
794 | u8 *pd = &Pico_mcd->word_ram1M[bank][((a >> 1) ^ 1) & 0x1ffff]; \\r |
795 | \\r |
796 | if (!(a & 1)) \\r |
797 | *pd = (*pd & 0x0f) | (d << 4); \\r |
798 | else \\r |
799 | *pd = (*pd & 0xf0) | (d & 0x0f); \\r |
800 | } \\r |
801 | \\r |
802 | static void PicoWriteS68k8_dec_m1b##bank(u32 a, u32 d) \\r |
803 | { \\r |
804 | u8 *pd = &Pico_mcd->word_ram1M[bank][((a >> 1) ^ 1) & 0x1ffff]; \\r |
805 | u8 mask = (a & 1) ? 0x0f : 0xf0; \\r |
806 | \\r |
807 | if (!(*pd & mask) && (d & 0x0f)) /* underwrite */ \\r |
808 | PicoWriteS68k8_dec_m0b##bank(a, d); \\r |
809 | } \\r |
810 | \\r |
811 | static void PicoWriteS68k8_dec_m2b##bank(u32 a, u32 d) /* ...and m3? */ \\r |
812 | { \\r |
813 | if (d & 0x0f) /* overwrite */ \\r |
814 | PicoWriteS68k8_dec_m0b##bank(a, d); \\r |
815 | }\r |
0a051f55 |
816 | \r |
0ace9b9a |
817 | mk_decode_w8(0)\r |
818 | mk_decode_w8(1)\r |
819 | \r |
820 | #define mk_decode_w16(bank) \\r |
821 | static void PicoWriteS68k16_dec_m0b##bank(u32 a, u32 d) \\r |
822 | { \\r |
823 | u8 *pd = &Pico_mcd->word_ram1M[bank][((a >> 1) ^ 1) & 0x1ffff]; \\r |
824 | \\r |
825 | d &= 0x0f0f; \\r |
826 | *pd = d | (d >> 4); \\r |
827 | } \\r |
828 | \\r |
829 | static void PicoWriteS68k16_dec_m1b##bank(u32 a, u32 d) \\r |
830 | { \\r |
831 | u8 *pd = &Pico_mcd->word_ram1M[bank][((a >> 1) ^ 1) & 0x1ffff]; \\r |
832 | \\r |
833 | d &= 0x0f0f; /* underwrite */ \\r |
834 | if (!(*pd & 0xf0)) *pd |= d >> 4; \\r |
835 | if (!(*pd & 0x0f)) *pd |= d; \\r |
836 | } \\r |
837 | \\r |
838 | static void PicoWriteS68k16_dec_m2b##bank(u32 a, u32 d) \\r |
839 | { \\r |
840 | u8 *pd = &Pico_mcd->word_ram1M[bank][((a >> 1) ^ 1) & 0x1ffff]; \\r |
841 | \\r |
842 | d &= 0x0f0f; /* overwrite */ \\r |
843 | d |= d >> 4; \\r |
844 | \\r |
845 | if (!(d & 0xf0)) d |= *pd & 0xf0; \\r |
846 | if (!(d & 0x0f)) d |= *pd & 0x0f; \\r |
847 | *pd = d; \\r |
848 | }\r |
0a051f55 |
849 | \r |
0ace9b9a |
850 | mk_decode_w16(0)\r |
851 | mk_decode_w16(1)\r |
0a051f55 |
852 | \r |
0ace9b9a |
853 | #endif\r |
0a051f55 |
854 | \r |
af37bca8 |
855 | // backup RAM (fe0000 - feffff)\r |
856 | static u32 PicoReadS68k8_bram(u32 a)\r |
857 | {\r |
858 | return Pico_mcd->bram[(a>>1)&0x1fff];\r |
859 | }\r |
cc68a136 |
860 | \r |
af37bca8 |
861 | static u32 PicoReadS68k16_bram(u32 a)\r |
cc68a136 |
862 | {\r |
af37bca8 |
863 | u32 d;\r |
864 | elprintf(EL_ANOMALY, "FIXME: s68k_bram r16: [%06x] @%06x", a, SekPcS68k);\r |
865 | a = (a >> 1) & 0x1fff;\r |
866 | d = Pico_mcd->bram[a++];\r |
867 | d|= Pico_mcd->bram[a++] << 8; // probably wrong, TODO: verify\r |
868 | return d;\r |
869 | }\r |
cc68a136 |
870 | \r |
af37bca8 |
871 | static void PicoWriteS68k8_bram(u32 a, u32 d)\r |
872 | {\r |
873 | Pico_mcd->bram[(a >> 1) & 0x1fff] = d;\r |
874 | SRam.changed = 1;\r |
875 | }\r |
cc68a136 |
876 | \r |
af37bca8 |
877 | static void PicoWriteS68k16_bram(u32 a, u32 d)\r |
878 | {\r |
879 | elprintf(EL_ANOMALY, "s68k_bram w16: [%06x] %04x @%06x", a, d, SekPcS68k);\r |
880 | a = (a >> 1) & 0x1fff;\r |
881 | Pico_mcd->bram[a++] = d;\r |
882 | Pico_mcd->bram[a++] = d >> 8; // TODO: verify..\r |
883 | SRam.changed = 1;\r |
884 | }\r |
b5e5172d |
885 | \r |
0ace9b9a |
886 | #ifndef _ASM_CD_MEMORY_C\r |
887 | \r |
af37bca8 |
888 | // PCM and registers (ff0000 - ffffff)\r |
889 | static u32 PicoReadS68k8_pr(u32 a)\r |
890 | {\r |
891 | u32 d = 0;\r |
cc68a136 |
892 | \r |
893 | // regs\r |
af37bca8 |
894 | if ((a & 0xfe00) == 0x8000) {\r |
cb4a513a |
895 | a &= 0x1ff;\r |
af37bca8 |
896 | if (a >= 0x0e && a < 0x30) {\r |
897 | d = Pico_mcd->s68k_regs[a];\r |
30e8aac4 |
898 | s68k_poll_detect(a & ~1, d);\r |
ba6e8bfd |
899 | goto regs_done;\r |
d0d47c5b |
900 | }\r |
a93a80de |
901 | d = s68k_reg_read16(a & ~1);\r |
af37bca8 |
902 | if (!(a & 1))\r |
903 | d >>= 8;\r |
ba6e8bfd |
904 | \r |
905 | regs_done:\r |
906 | d &= 0xff;\r |
cc5ffc3c |
907 | elprintf(EL_CDREGS, "s68k_regs r8: [%02x] %02x @%06x",\r |
ba6e8bfd |
908 | a, d, SekPcS68k);\r |
909 | return d;\r |
d0d47c5b |
910 | }\r |
911 | \r |
4f265db7 |
912 | // PCM\r |
0ace9b9a |
913 | // XXX: verify: probably odd addrs only?\r |
af37bca8 |
914 | if ((a & 0x8000) == 0x0000) {\r |
4f265db7 |
915 | a &= 0x7fff;\r |
916 | if (a >= 0x2000)\r |
af37bca8 |
917 | d = Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a >> 1) & 0xfff];\r |
33be04ca |
918 | else if (a >= 0x20)\r |
919 | d = pcd_pcm_read(a >> 1);\r |
920 | \r |
921 | return d;\r |
ab0607f7 |
922 | }\r |
923 | \r |
af37bca8 |
924 | return s68k_unmapped_read8(a);\r |
cc68a136 |
925 | }\r |
926 | \r |
af37bca8 |
927 | static u32 PicoReadS68k16_pr(u32 a)\r |
cc68a136 |
928 | {\r |
af37bca8 |
929 | u32 d = 0;\r |
cc68a136 |
930 | \r |
931 | // regs\r |
af37bca8 |
932 | if ((a & 0xfe00) == 0x8000) {\r |
cb4a513a |
933 | a &= 0x1fe;\r |
a93a80de |
934 | d = s68k_reg_read16(a);\r |
ba6e8bfd |
935 | \r |
cc5ffc3c |
936 | elprintf(EL_CDREGS, "s68k_regs r16: [%02x] %04x @%06x",\r |
ba6e8bfd |
937 | a, d, SekPcS68k);\r |
af37bca8 |
938 | return d;\r |
cc68a136 |
939 | }\r |
940 | \r |
af37bca8 |
941 | // PCM\r |
942 | if ((a & 0x8000) == 0x0000) {\r |
af37bca8 |
943 | a &= 0x7fff;\r |
944 | if (a >= 0x2000)\r |
33be04ca |
945 | d = Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a >> 1) & 0xfff];\r |
946 | else if (a >= 0x20)\r |
947 | d = pcd_pcm_read(a >> 1);\r |
948 | \r |
af37bca8 |
949 | return d;\r |
d0d47c5b |
950 | }\r |
951 | \r |
af37bca8 |
952 | return s68k_unmapped_read16(a);\r |
953 | }\r |
954 | \r |
955 | static void PicoWriteS68k8_pr(u32 a, u32 d)\r |
956 | {\r |
957 | // regs\r |
958 | if ((a & 0xfe00) == 0x8000) {\r |
959 | a &= 0x1ff;\r |
cc5ffc3c |
960 | elprintf(EL_CDREGS, "s68k_regs w8: [%02x] %02x @%06x", a, d, SekPcS68k);\r |
a93a80de |
961 | if (0x59 <= a && a < 0x68) // word regs\r |
962 | s68k_reg_write16(a & ~1, (d << 8) | d);\r |
963 | else\r |
964 | s68k_reg_write8(a, d);\r |
d0d47c5b |
965 | return;\r |
966 | }\r |
967 | \r |
4f265db7 |
968 | // PCM\r |
af37bca8 |
969 | if ((a & 0x8000) == 0x0000) {\r |
4f265db7 |
970 | a &= 0x7fff;\r |
971 | if (a >= 0x2000)\r |
972 | Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff] = d;\r |
973 | else if (a < 0x12)\r |
33be04ca |
974 | pcd_pcm_write(a>>1, d);\r |
ab0607f7 |
975 | return;\r |
976 | }\r |
977 | \r |
af37bca8 |
978 | s68k_unmapped_write8(a, d);\r |
cc68a136 |
979 | }\r |
ab0607f7 |
980 | \r |
af37bca8 |
981 | static void PicoWriteS68k16_pr(u32 a, u32 d)\r |
cc68a136 |
982 | {\r |
cc68a136 |
983 | // regs\r |
af37bca8 |
984 | if ((a & 0xfe00) == 0x8000) {\r |
cb4a513a |
985 | a &= 0x1fe;\r |
cc5ffc3c |
986 | elprintf(EL_CDREGS, "s68k_regs w16: [%02x] %04x @%06x", a, d, SekPcS68k);\r |
a93a80de |
987 | s68k_reg_write16(a, d);\r |
d0d47c5b |
988 | return;\r |
989 | }\r |
990 | \r |
4f265db7 |
991 | // PCM\r |
af37bca8 |
992 | if ((a & 0x8000) == 0x0000) {\r |
4f265db7 |
993 | a &= 0x7fff;\r |
af37bca8 |
994 | if (a >= 0x2000)\r |
995 | Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff] = d;\r |
996 | else if (a < 0x12)\r |
33be04ca |
997 | pcd_pcm_write(a>>1, d & 0xff);\r |
ab0607f7 |
998 | return;\r |
999 | }\r |
1000 | \r |
af37bca8 |
1001 | s68k_unmapped_write16(a, d);\r |
cc68a136 |
1002 | }\r |
cc68a136 |
1003 | \r |
0ace9b9a |
1004 | #endif\r |
1005 | \r |
1006 | static const void *m68k_cell_read8[] = { PicoReadM68k8_cell0, PicoReadM68k8_cell1 };\r |
1007 | static const void *m68k_cell_read16[] = { PicoReadM68k16_cell0, PicoReadM68k16_cell1 };\r |
1008 | static const void *m68k_cell_write8[] = { PicoWriteM68k8_cell0, PicoWriteM68k8_cell1 };\r |
1009 | static const void *m68k_cell_write16[] = { PicoWriteM68k16_cell0, PicoWriteM68k16_cell1 };\r |
1010 | \r |
1011 | static const void *s68k_dec_read8[] = { PicoReadS68k8_dec0, PicoReadS68k8_dec1 };\r |
1012 | static const void *s68k_dec_read16[] = { PicoReadS68k16_dec0, PicoReadS68k16_dec1 };\r |
1013 | \r |
1014 | static const void *s68k_dec_write8[2][4] = {\r |
1015 | { PicoWriteS68k8_dec_m0b0, PicoWriteS68k8_dec_m1b0, PicoWriteS68k8_dec_m2b0, PicoWriteS68k8_dec_m2b0 },\r |
1016 | { PicoWriteS68k8_dec_m0b1, PicoWriteS68k8_dec_m1b1, PicoWriteS68k8_dec_m2b1, PicoWriteS68k8_dec_m2b1 },\r |
1017 | };\r |
1018 | \r |
1019 | static const void *s68k_dec_write16[2][4] = {\r |
1020 | { PicoWriteS68k16_dec_m0b0, PicoWriteS68k16_dec_m1b0, PicoWriteS68k16_dec_m2b0, PicoWriteS68k16_dec_m2b0 },\r |
1021 | { PicoWriteS68k16_dec_m0b1, PicoWriteS68k16_dec_m1b1, PicoWriteS68k16_dec_m2b1, PicoWriteS68k16_dec_m2b1 },\r |
1022 | };\r |
1023 | \r |
cc68a136 |
1024 | // -----------------------------------------------------------------\r |
1025 | \r |
4fb43555 |
1026 | static void remap_prg_window(u32 r1, u32 r3)\r |
3aa1e148 |
1027 | {\r |
af37bca8 |
1028 | // PRG RAM\r |
4fb43555 |
1029 | if (r1 & 2) {\r |
1030 | void *bank = Pico_mcd->prg_ram_b[(r3 >> 6) & 3];\r |
af37bca8 |
1031 | cpu68k_map_all_ram(0x020000, 0x03ffff, bank, 0);\r |
1032 | }\r |
1033 | else {\r |
1034 | m68k_map_unmap(0x020000, 0x03ffff);\r |
1035 | }\r |
0ace9b9a |
1036 | }\r |
1037 | \r |
4fb43555 |
1038 | static void remap_word_ram(u32 r3)\r |
0ace9b9a |
1039 | {\r |
1040 | void *bank;\r |
af37bca8 |
1041 | \r |
1042 | // WORD RAM\r |
1043 | if (!(r3 & 4)) {\r |
1044 | // 2M mode. XXX: allowing access in all cases for simplicity\r |
1045 | bank = Pico_mcd->word_ram2M;\r |
1046 | cpu68k_map_all_ram(0x200000, 0x23ffff, bank, 0);\r |
1047 | cpu68k_map_all_ram(0x080000, 0x0bffff, bank, 1);\r |
1048 | // TODO: handle 0x0c0000\r |
1049 | }\r |
1050 | else {\r |
0ace9b9a |
1051 | int b0 = r3 & 1;\r |
1052 | int m = (r3 & 0x18) >> 3;\r |
1053 | bank = Pico_mcd->word_ram1M[b0];\r |
af37bca8 |
1054 | cpu68k_map_all_ram(0x200000, 0x21ffff, bank, 0);\r |
0ace9b9a |
1055 | bank = Pico_mcd->word_ram1M[b0 ^ 1];\r |
af37bca8 |
1056 | cpu68k_map_all_ram(0x0c0000, 0x0effff, bank, 1);\r |
1057 | // "cell arrange" on m68k\r |
0ace9b9a |
1058 | cpu68k_map_set(m68k_read8_map, 0x220000, 0x23ffff, m68k_cell_read8[b0], 1);\r |
1059 | cpu68k_map_set(m68k_read16_map, 0x220000, 0x23ffff, m68k_cell_read16[b0], 1);\r |
1060 | cpu68k_map_set(m68k_write8_map, 0x220000, 0x23ffff, m68k_cell_write8[b0], 1);\r |
1061 | cpu68k_map_set(m68k_write16_map, 0x220000, 0x23ffff, m68k_cell_write16[b0], 1);\r |
af37bca8 |
1062 | // "decode format" on s68k\r |
0ace9b9a |
1063 | cpu68k_map_set(s68k_read8_map, 0x080000, 0x0bffff, s68k_dec_read8[b0 ^ 1], 1);\r |
1064 | cpu68k_map_set(s68k_read16_map, 0x080000, 0x0bffff, s68k_dec_read16[b0 ^ 1], 1);\r |
1065 | cpu68k_map_set(s68k_write8_map, 0x080000, 0x0bffff, s68k_dec_write8[b0 ^ 1][m], 1);\r |
1066 | cpu68k_map_set(s68k_write16_map, 0x080000, 0x0bffff, s68k_dec_write16[b0 ^ 1][m], 1);\r |
af37bca8 |
1067 | }\r |
1068 | \r |
3aa1e148 |
1069 | #ifdef EMU_F68K\r |
1070 | // update fetchmap..\r |
1071 | int i;\r |
1072 | if (!(r3 & 4))\r |
1073 | {\r |
1074 | for (i = M68K_FETCHBANK1*2/16; (i<<(24-FAMEC_FETCHBITS)) < 0x240000; i++)\r |
be26eb23 |
1075 | PicoCpuFM68k.Fetch[i] = (unsigned long)Pico_mcd->word_ram2M - 0x200000;\r |
3aa1e148 |
1076 | }\r |
1077 | else\r |
1078 | {\r |
1079 | for (i = M68K_FETCHBANK1*2/16; (i<<(24-FAMEC_FETCHBITS)) < 0x220000; i++)\r |
be26eb23 |
1080 | PicoCpuFM68k.Fetch[i] = (unsigned long)Pico_mcd->word_ram1M[r3 & 1] - 0x200000;\r |
3aa1e148 |
1081 | for (i = M68K_FETCHBANK1*0x0c/0x100; (i<<(24-FAMEC_FETCHBITS)) < 0x0e0000; i++)\r |
be26eb23 |
1082 | PicoCpuFS68k.Fetch[i] = (unsigned long)Pico_mcd->word_ram1M[(r3&1)^1] - 0x0c0000;\r |
3aa1e148 |
1083 | }\r |
1084 | #endif\r |
1085 | }\r |
b837b69b |
1086 | \r |
ae214f1c |
1087 | void pcd_state_loaded_mem(void)\r |
0ace9b9a |
1088 | {\r |
4fb43555 |
1089 | u32 r3 = Pico_mcd->s68k_regs[3];\r |
0ace9b9a |
1090 | \r |
1091 | /* after load events */\r |
1092 | if (r3 & 4) // 1M mode?\r |
1093 | wram_2M_to_1M(Pico_mcd->word_ram2M);\r |
1094 | remap_word_ram(r3);\r |
4fb43555 |
1095 | remap_prg_window(Pico_mcd->m.busreq, r3);\r |
ba6e8bfd |
1096 | Pico_mcd->m.dmna_ret_2m &= 3;\r |
0ace9b9a |
1097 | \r |
1098 | // restore hint vector\r |
1099 | *(unsigned short *)(Pico_mcd->bios + 0x72) = Pico_mcd->m.hint_vector;\r |
1100 | }\r |
1101 | \r |
9037e45d |
1102 | #ifdef EMU_M68K\r |
1103 | static void m68k_mem_setup_cd(void);\r |
1104 | #endif\r |
1105 | \r |
eff55556 |
1106 | PICO_INTERNAL void PicoMemSetupCD(void)\r |
b837b69b |
1107 | {\r |
af37bca8 |
1108 | // setup default main68k map\r |
1109 | PicoMemSetup();\r |
1110 | \r |
af37bca8 |
1111 | // main68k map (BIOS mapped by PicoMemSetup()):\r |
1112 | // RAM cart\r |
1113 | if (PicoOpt & POPT_EN_MCD_RAMCART) {\r |
1114 | cpu68k_map_set(m68k_read8_map, 0x400000, 0x7fffff, PicoReadM68k8_ramc, 1);\r |
1115 | cpu68k_map_set(m68k_read16_map, 0x400000, 0x7fffff, PicoReadM68k16_ramc, 1);\r |
1116 | cpu68k_map_set(m68k_write8_map, 0x400000, 0x7fffff, PicoWriteM68k8_ramc, 1);\r |
1117 | cpu68k_map_set(m68k_write16_map, 0x400000, 0x7fffff, PicoWriteM68k16_ramc, 1);\r |
1118 | }\r |
1119 | \r |
1120 | // registers/IO:\r |
fa8fb754 |
1121 | cpu68k_map_set(m68k_read8_map, 0xa10000, 0xa1ffff, PicoRead8_mcd_io, 1);\r |
1122 | cpu68k_map_set(m68k_read16_map, 0xa10000, 0xa1ffff, PicoRead16_mcd_io, 1);\r |
1123 | cpu68k_map_set(m68k_write8_map, 0xa10000, 0xa1ffff, PicoWrite8_mcd_io, 1);\r |
1124 | cpu68k_map_set(m68k_write16_map, 0xa10000, 0xa1ffff, PicoWrite16_mcd_io, 1);\r |
af37bca8 |
1125 | \r |
1126 | // sub68k map\r |
1127 | cpu68k_map_set(s68k_read8_map, 0x000000, 0xffffff, s68k_unmapped_read8, 1);\r |
1128 | cpu68k_map_set(s68k_read16_map, 0x000000, 0xffffff, s68k_unmapped_read16, 1);\r |
1129 | cpu68k_map_set(s68k_write8_map, 0x000000, 0xffffff, s68k_unmapped_write8, 1);\r |
1130 | cpu68k_map_set(s68k_write16_map, 0x000000, 0xffffff, s68k_unmapped_write16, 1);\r |
1131 | \r |
1132 | // PRG RAM\r |
1133 | cpu68k_map_set(s68k_read8_map, 0x000000, 0x07ffff, Pico_mcd->prg_ram, 0);\r |
1134 | cpu68k_map_set(s68k_read16_map, 0x000000, 0x07ffff, Pico_mcd->prg_ram, 0);\r |
1135 | cpu68k_map_set(s68k_write8_map, 0x000000, 0x07ffff, Pico_mcd->prg_ram, 0);\r |
1136 | cpu68k_map_set(s68k_write16_map, 0x000000, 0x07ffff, Pico_mcd->prg_ram, 0);\r |
59991f11 |
1137 | cpu68k_map_set(s68k_write8_map, 0x000000, 0x01ffff, PicoWriteS68k8_prgwp, 1);\r |
1138 | cpu68k_map_set(s68k_write16_map, 0x000000, 0x01ffff, PicoWriteS68k16_prgwp, 1);\r |
af37bca8 |
1139 | \r |
1140 | // BRAM\r |
1141 | cpu68k_map_set(s68k_read8_map, 0xfe0000, 0xfeffff, PicoReadS68k8_bram, 1);\r |
1142 | cpu68k_map_set(s68k_read16_map, 0xfe0000, 0xfeffff, PicoReadS68k16_bram, 1);\r |
1143 | cpu68k_map_set(s68k_write8_map, 0xfe0000, 0xfeffff, PicoWriteS68k8_bram, 1);\r |
1144 | cpu68k_map_set(s68k_write16_map, 0xfe0000, 0xfeffff, PicoWriteS68k16_bram, 1);\r |
1145 | \r |
1146 | // PCM, regs\r |
1147 | cpu68k_map_set(s68k_read8_map, 0xff0000, 0xffffff, PicoReadS68k8_pr, 1);\r |
1148 | cpu68k_map_set(s68k_read16_map, 0xff0000, 0xffffff, PicoReadS68k16_pr, 1);\r |
1149 | cpu68k_map_set(s68k_write8_map, 0xff0000, 0xffffff, PicoWriteS68k8_pr, 1);\r |
1150 | cpu68k_map_set(s68k_write16_map, 0xff0000, 0xffffff, PicoWriteS68k16_pr, 1);\r |
f53f286a |
1151 | \r |
0ace9b9a |
1152 | // RAMs\r |
1153 | remap_word_ram(1);\r |
1154 | \r |
b837b69b |
1155 | #ifdef EMU_C68K\r |
b837b69b |
1156 | // s68k\r |
5e89f0f5 |
1157 | PicoCpuCS68k.read8 = (void *)s68k_read8_map;\r |
1158 | PicoCpuCS68k.read16 = (void *)s68k_read16_map;\r |
1159 | PicoCpuCS68k.read32 = (void *)s68k_read16_map;\r |
1160 | PicoCpuCS68k.write8 = (void *)s68k_write8_map;\r |
1161 | PicoCpuCS68k.write16 = (void *)s68k_write16_map;\r |
1162 | PicoCpuCS68k.write32 = (void *)s68k_write16_map;\r |
1163 | PicoCpuCS68k.checkpc = NULL; /* unused */\r |
1164 | PicoCpuCS68k.fetch8 = NULL;\r |
1165 | PicoCpuCS68k.fetch16 = NULL;\r |
1166 | PicoCpuCS68k.fetch32 = NULL;\r |
b837b69b |
1167 | #endif\r |
3aa1e148 |
1168 | #ifdef EMU_F68K\r |
3aa1e148 |
1169 | // s68k\r |
af37bca8 |
1170 | PicoCpuFS68k.read_byte = s68k_read8;\r |
1171 | PicoCpuFS68k.read_word = s68k_read16;\r |
1172 | PicoCpuFS68k.read_long = s68k_read32;\r |
1173 | PicoCpuFS68k.write_byte = s68k_write8;\r |
1174 | PicoCpuFS68k.write_word = s68k_write16;\r |
1175 | PicoCpuFS68k.write_long = s68k_write32;\r |
3aa1e148 |
1176 | \r |
1177 | // setup FAME fetchmap\r |
1178 | {\r |
1179 | int i;\r |
1180 | // M68k\r |
1181 | // by default, point everything to fitst 64k of ROM (BIOS)\r |
1182 | for (i = 0; i < M68K_FETCHBANK1; i++)\r |
be26eb23 |
1183 | PicoCpuFM68k.Fetch[i] = (unsigned long)Pico.rom - (i<<(24-FAMEC_FETCHBITS));\r |
3aa1e148 |
1184 | // now real ROM (BIOS)\r |
1185 | for (i = 0; i < M68K_FETCHBANK1 && (i<<(24-FAMEC_FETCHBITS)) < Pico.romsize; i++)\r |
be26eb23 |
1186 | PicoCpuFM68k.Fetch[i] = (unsigned long)Pico.rom;\r |
3aa1e148 |
1187 | // .. and RAM\r |
1188 | for (i = M68K_FETCHBANK1*14/16; i < M68K_FETCHBANK1; i++)\r |
be26eb23 |
1189 | PicoCpuFM68k.Fetch[i] = (unsigned long)Pico.ram - (i<<(24-FAMEC_FETCHBITS));\r |
3aa1e148 |
1190 | // S68k\r |
1191 | // PRG RAM is default\r |
1192 | for (i = 0; i < M68K_FETCHBANK1; i++)\r |
be26eb23 |
1193 | PicoCpuFS68k.Fetch[i] = (unsigned long)Pico_mcd->prg_ram - (i<<(24-FAMEC_FETCHBITS));\r |
3aa1e148 |
1194 | // real PRG RAM\r |
1195 | for (i = 0; i < M68K_FETCHBANK1 && (i<<(24-FAMEC_FETCHBITS)) < 0x80000; i++)\r |
be26eb23 |
1196 | PicoCpuFS68k.Fetch[i] = (unsigned long)Pico_mcd->prg_ram;\r |
3aa1e148 |
1197 | // WORD RAM 2M area\r |
1198 | for (i = M68K_FETCHBANK1*0x08/0x100; i < M68K_FETCHBANK1 && (i<<(24-FAMEC_FETCHBITS)) < 0xc0000; i++)\r |
be26eb23 |
1199 | PicoCpuFS68k.Fetch[i] = (unsigned long)Pico_mcd->word_ram2M - 0x80000;\r |
0ace9b9a |
1200 | // remap_word_ram() will setup word ram for both\r |
3aa1e148 |
1201 | }\r |
1202 | #endif\r |
9037e45d |
1203 | #ifdef EMU_M68K\r |
1204 | m68k_mem_setup_cd();\r |
1205 | #endif\r |
b837b69b |
1206 | }\r |
1207 | \r |
1208 | \r |
cc68a136 |
1209 | #ifdef EMU_M68K\r |
af37bca8 |
1210 | u32 m68k_read8(u32 a);\r |
1211 | u32 m68k_read16(u32 a);\r |
1212 | u32 m68k_read32(u32 a);\r |
1213 | void m68k_write8(u32 a, u8 d);\r |
1214 | void m68k_write16(u32 a, u16 d);\r |
1215 | void m68k_write32(u32 a, u32 d);\r |
1216 | \r |
9037e45d |
1217 | static unsigned int PicoReadCD8w (unsigned int a) {\r |
af37bca8 |
1218 | return m68ki_cpu_p == &PicoCpuMS68k ? s68k_read8(a) : m68k_read8(a);\r |
cc68a136 |
1219 | }\r |
9037e45d |
1220 | static unsigned int PicoReadCD16w(unsigned int a) {\r |
af37bca8 |
1221 | return m68ki_cpu_p == &PicoCpuMS68k ? s68k_read16(a) : m68k_read16(a);\r |
cc68a136 |
1222 | }\r |
9037e45d |
1223 | static unsigned int PicoReadCD32w(unsigned int a) {\r |
af37bca8 |
1224 | return m68ki_cpu_p == &PicoCpuMS68k ? s68k_read32(a) : m68k_read32(a);\r |
cc68a136 |
1225 | }\r |
9037e45d |
1226 | static void PicoWriteCD8w (unsigned int a, unsigned char d) {\r |
af37bca8 |
1227 | if (m68ki_cpu_p == &PicoCpuMS68k) s68k_write8(a, d); else m68k_write8(a, d);\r |
cc68a136 |
1228 | }\r |
9037e45d |
1229 | static void PicoWriteCD16w(unsigned int a, unsigned short d) {\r |
af37bca8 |
1230 | if (m68ki_cpu_p == &PicoCpuMS68k) s68k_write16(a, d); else m68k_write16(a, d);\r |
cc68a136 |
1231 | }\r |
9037e45d |
1232 | static void PicoWriteCD32w(unsigned int a, unsigned int d) {\r |
af37bca8 |
1233 | if (m68ki_cpu_p == &PicoCpuMS68k) s68k_write32(a, d); else m68k_write32(a, d);\r |
cc68a136 |
1234 | }\r |
1235 | \r |
9037e45d |
1236 | extern unsigned int (*pm68k_read_memory_8) (unsigned int address);\r |
1237 | extern unsigned int (*pm68k_read_memory_16)(unsigned int address);\r |
1238 | extern unsigned int (*pm68k_read_memory_32)(unsigned int address);\r |
1239 | extern void (*pm68k_write_memory_8) (unsigned int address, unsigned char value);\r |
1240 | extern void (*pm68k_write_memory_16)(unsigned int address, unsigned short value);\r |
1241 | extern void (*pm68k_write_memory_32)(unsigned int address, unsigned int value);\r |
9037e45d |
1242 | \r |
1243 | static void m68k_mem_setup_cd(void)\r |
1244 | {\r |
1245 | pm68k_read_memory_8 = PicoReadCD8w;\r |
1246 | pm68k_read_memory_16 = PicoReadCD16w;\r |
1247 | pm68k_read_memory_32 = PicoReadCD32w;\r |
1248 | pm68k_write_memory_8 = PicoWriteCD8w;\r |
1249 | pm68k_write_memory_16 = PicoWriteCD16w;\r |
1250 | pm68k_write_memory_32 = PicoWriteCD32w;\r |
9037e45d |
1251 | }\r |
cc68a136 |
1252 | #endif // EMU_M68K\r |
1253 | \r |
ae214f1c |
1254 | // vim:shiftwidth=2:ts=2:expandtab\r |