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musashi Cyclone hack fix
[picodrive.git] / Pico / PicoInt.h
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eff55556 1// Pico Library - Internal Header File\r
cc68a136 2\r
3// (c) Copyright 2004 Dave, All rights reserved.\r
6cadc2da 4// (c) Copyright 2006,2007 Grazvydas "notaz" Ignotas, all rights reserved.\r
cc68a136 5// Free for non-commercial use.\r
6\r
7// For commercial use, separate licencing terms must be obtained.\r
8\r
eff55556 9#ifndef PICO_INTERNAL_INCLUDED\r
10#define PICO_INTERNAL_INCLUDED\r
cc68a136 11\r
12#include <stdio.h>\r
13#include <stdlib.h>\r
14#include <string.h>\r
15#include "Pico.h"\r
16\r
89fa852d 17//\r
18#define USE_POLL_DETECT\r
19\r
eff55556 20#ifndef PICO_INTERNAL\r
21#define PICO_INTERNAL\r
22#endif\r
23#ifndef PICO_INTERNAL_ASM\r
24#define PICO_INTERNAL_ASM\r
25#endif\r
cc68a136 26\r
ab0607f7 27// to select core, define EMU_C68K, EMU_M68K or EMU_A68K in your makefile or project\r
cc68a136 28\r
29#ifdef __cplusplus\r
30extern "C" {\r
31#endif\r
32\r
33\r
34// ----------------------- 68000 CPU -----------------------\r
35#ifdef EMU_C68K\r
36#include "../cpu/Cyclone/Cyclone.h"\r
b837b69b 37extern struct Cyclone PicoCpu, PicoCpuS68k;\r
7336a99a 38#define SekCyclesLeftNoMCD PicoCpu.cycles // cycles left for this run\r
39#define SekCyclesLeft \\r
40 (((PicoMCD&1) && (PicoOpt & 0x2000)) ? (SekCycleAim-SekCycleCnt) : SekCyclesLeftNoMCD)\r
7a1f6e45 41#define SekCyclesLeftS68k \\r
42 ((PicoOpt & 0x2000) ? (SekCycleAimS68k-SekCycleCntS68k) : PicoCpuS68k.cycles)\r
7336a99a 43#define SekSetCyclesLeftNoMCD(c) PicoCpu.cycles=c\r
44#define SekSetCyclesLeft(c) { \\r
45 if ((PicoMCD&1) && (PicoOpt & 0x2000)) SekCycleCnt=SekCycleAim-(c); else SekSetCyclesLeftNoMCD(c); \\r
46}\r
cc68a136 47#define SekPc (PicoCpu.pc-PicoCpu.membase)\r
b837b69b 48#define SekPcS68k (PicoCpuS68k.pc-PicoCpuS68k.membase)\r
0af33fe0 49#define SekSetStop(x) { PicoCpu.state_flags&=~1; if (x) { PicoCpu.state_flags|=1; PicoCpu.cycles=0; } }\r
50#define SekSetStopS68k(x) { PicoCpuS68k.state_flags&=~1; if (x) { PicoCpuS68k.state_flags|=1; PicoCpuS68k.cycles=0; } }\r
cc68a136 51#endif\r
52\r
53#ifdef EMU_A68K\r
54void __cdecl M68000_RUN();\r
55// The format of the data in a68k.asm (at the _M68000_regs location)\r
56struct A68KContext\r
57{\r
58 unsigned int d[8],a[8];\r
59 unsigned int isp,srh,ccr,xc,pc,irq,sr;\r
60 int (*IrqCallback) (int nIrq);\r
61 unsigned int ppc;\r
62 void *pResetCallback;\r
63 unsigned int sfc,dfc,usp,vbr;\r
64 unsigned int AsmBank,CpuVersion;\r
65};\r
66struct A68KContext M68000_regs;\r
67extern int m68k_ICount;\r
68#define SekCyclesLeft m68k_ICount\r
69#define SekSetCyclesLeft(c) m68k_ICount=c\r
70#define SekPc M68000_regs.pc\r
71#endif\r
72\r
73#ifdef EMU_M68K\r
74#include "../cpu/musashi/m68kcpu.h"\r
75extern m68ki_cpu_core PicoM68kCPU; // MD's CPU\r
76extern m68ki_cpu_core PicoS68kCPU; // Mega CD's CPU\r
77#ifndef SekCyclesLeft\r
7a1f6e45 78#define SekCyclesLeftNoMCD PicoM68kCPU.cyc_remaining_cycles\r
7336a99a 79#define SekCyclesLeft \\r
80 (((PicoMCD&1) && (PicoOpt & 0x2000)) ? (SekCycleAim-SekCycleCnt) : SekCyclesLeftNoMCD)\r
7a1f6e45 81#define SekCyclesLeftS68k \\r
82 ((PicoOpt & 0x2000) ? (SekCycleAimS68k-SekCycleCntS68k) : PicoS68kCPU.cyc_remaining_cycles)\r
7336a99a 83#define SekSetCyclesLeftNoMCD(c) SET_CYCLES(c)\r
84#define SekSetCyclesLeft(c) { \\r
85 if ((PicoMCD&1) && (PicoOpt & 0x2000)) SekCycleCnt=SekCycleAim-(c); else SET_CYCLES(c); \\r
86}\r
cc68a136 87#define SekPc m68k_get_reg(&PicoM68kCPU, M68K_REG_PC)\r
88#define SekPcS68k m68k_get_reg(&PicoS68kCPU, M68K_REG_PC)\r
7a1f6e45 89#define SekSetStop(x) { \\r
90 if(x) { SET_CYCLES(0); PicoM68kCPU.stopped=STOP_LEVEL_STOP; } \\r
91 else PicoM68kCPU.stopped=0; \\r
92}\r
93#define SekSetStopS68k(x) { \\r
94 if(x) { SET_CYCLES(0); PicoS68kCPU.stopped=STOP_LEVEL_STOP; } \\r
95 else PicoS68kCPU.stopped=0; \\r
96}\r
cc68a136 97#endif\r
98#endif\r
99\r
100extern int SekCycleCnt; // cycles done in this frame\r
101extern int SekCycleAim; // cycle aim\r
102extern unsigned int SekCycleCntT; // total cycle counter, updated once per frame\r
103\r
104#define SekCyclesReset() {SekCycleCntT+=SekCycleCnt;SekCycleCnt=SekCycleAim=0;}\r
105#define SekCyclesBurn(c) SekCycleCnt+=c\r
106#define SekCyclesDone() (SekCycleAim-SekCyclesLeft) // nuber of cycles done in this frame (can be checked anywhere)\r
107#define SekCyclesDoneT() (SekCycleCntT+SekCyclesDone()) // total nuber of cycles done for this rom\r
108\r
109#define SekEndRun(after) { \\r
110 SekCycleCnt -= SekCyclesLeft - after; \\r
111 if(SekCycleCnt < 0) SekCycleCnt = 0; \\r
112 SekSetCyclesLeft(after); \\r
113}\r
114\r
115extern int SekCycleCntS68k;\r
116extern int SekCycleAimS68k;\r
117\r
118#define SekCyclesResetS68k() {SekCycleCntS68k=SekCycleAimS68k=0;}\r
7a1f6e45 119#define SekCyclesDoneS68k() (SekCycleAimS68k-SekCyclesLeftS68k)\r
cc68a136 120\r
2d0b15bb 121// debug cyclone\r
122#if defined(EMU_C68K) && defined(EMU_M68K)\r
123#undef SekSetCyclesLeftNoMCD\r
124#undef SekSetCyclesLeft\r
125#undef SekCyclesBurn\r
126#undef SekEndRun\r
127#define SekSetCyclesLeftNoMCD(c)\r
128#define SekSetCyclesLeft(c)\r
2270612a 129#define SekCyclesBurn(c) c\r
2d0b15bb 130#define SekEndRun(c)\r
131#endif\r
cc68a136 132\r
133extern int PicoMCD;\r
134\r
135// ---------------------------------------------------------\r
136\r
137// main oscillator clock which controls timing\r
138#define OSC_NTSC 53693100\r
139#define OSC_PAL 53203424 // not accurate\r
140\r
141struct PicoVideo\r
142{\r
143 unsigned char reg[0x20];\r
144 unsigned int command; // 32-bit Command\r
145 unsigned char pending; // 1 if waiting for second half of 32-bit command\r
146 unsigned char type; // Command type (v/c/vsram read/write)\r
147 unsigned short addr; // Read/Write address\r
148 int status; // Status bits\r
149 unsigned char pending_ints; // pending interrupts: ??VH????\r
150 unsigned char pad[0x13];\r
151};\r
152\r
153struct PicoMisc\r
154{\r
155 unsigned char rotate;\r
156 unsigned char z80Run;\r
157 unsigned char padTHPhase[2]; // phase of gamepad TH switches\r
158 short scanline; // 0 to 261||311; -1 in fast mode\r
159 char dirtyPal; // Is the palette dirty (1 - change @ this frame, 2 - some time before)\r
160 unsigned char hardware; // Hardware value for country\r
161 unsigned char pal; // 1=PAL 0=NTSC\r
721cd396 162 unsigned char sram_reg; // SRAM mode register. bit0: allow read? bit1: deny write? bit2: EEPROM? bit4: detected? (header or by access)\r
cc68a136 163 unsigned short z80_bank68k;\r
164 unsigned short z80_lastaddr; // this is for Z80 faking\r
165 unsigned char z80_fakeval;\r
166 unsigned char pad0;\r
167 unsigned char padDelay[2]; // gamepad phase time outs, so we count a delay\r
168 unsigned short sram_addr; // EEPROM address register\r
169 unsigned char sram_cycle; // EEPROM SRAM cycle number\r
170 unsigned char sram_slave; // EEPROM slave word for X24C02 and better SRAMs\r
721cd396 171 unsigned char prot_bytes[2]; // simple protection faking\r
4f672280 172 unsigned short dma_bytes; //\r
312e9ce1 173 unsigned char pad[2];\r
174 unsigned int frame_count; // mainly for movies\r
cc68a136 175};\r
176\r
177// some assembly stuff depend on these, do not touch!\r
178struct Pico\r
179{\r
180 unsigned char ram[0x10000]; // 0x00000 scratch ram\r
181 unsigned short vram[0x8000]; // 0x10000\r
182 unsigned char zram[0x2000]; // 0x20000 Z80 ram\r
183 unsigned char ioports[0x10];\r
184 unsigned int pad[0x3c]; // unused\r
185 unsigned short cram[0x40]; // 0x22100\r
186 unsigned short vsram[0x40]; // 0x22180\r
187\r
188 unsigned char *rom; // 0x22200\r
189 unsigned int romsize; // 0x22204\r
190\r
191 struct PicoMisc m;\r
192 struct PicoVideo video;\r
193};\r
194\r
195// sram\r
196struct PicoSRAM\r
197{\r
4ff2d527 198 unsigned char *data; // actual data\r
199 unsigned int start; // start address in 68k address space\r
cc68a136 200 unsigned int end;\r
4ff2d527 201 unsigned char resize; // 0c: 1=SRAM size changed and needs to be reallocated on PicoReset\r
202 unsigned char reg_back; // copy of Pico.m.sram_reg to set after reset\r
cc68a136 203 unsigned char changed;\r
204 unsigned char pad;\r
205};\r
206\r
207// MCD\r
208#include "cd/cd_sys.h"\r
209#include "cd/LC89510.h"\r
d1df8786 210#include "cd/gfx_cd.h"\r
cc68a136 211\r
4f265db7 212struct mcd_pcm\r
213{\r
214 unsigned char control; // reg7\r
215 unsigned char enabled; // reg8\r
216 unsigned char cur_ch;\r
217 unsigned char bank;\r
218 int pad1;\r
219\r
4ff2d527 220 struct pcm_chan // 08, size 0x10\r
4f265db7 221 {\r
222 unsigned char regs[8];\r
4ff2d527 223 unsigned int addr; // .08: played sample address\r
4f265db7 224 int pad;\r
225 } ch[8];\r
226};\r
227\r
c459aefd 228struct mcd_misc\r
229{\r
230 unsigned short hint_vector;\r
231 unsigned char busreq;\r
51a902ae 232 unsigned char s68k_pend_ints;\r
89fa852d 233 unsigned int state_flags; // 04: emu state: reset_pending, dmna_pending\r
51a902ae 234 unsigned int counter75hz;\r
4ff2d527 235 unsigned short audio_offset; // 0c: for savestates: play pointer offset (0-1023)\r
75736070 236 unsigned char audio_track; // playing audio track # (zero based)\r
6cadc2da 237 char pad1;\r
4ff2d527 238 int timer_int3; // 10\r
4f265db7 239 unsigned int timer_stopwatch;\r
6cadc2da 240 unsigned char bcram_reg; // 18: battery-backed RAM cart register\r
241 unsigned char pad2;\r
242 unsigned short pad3;\r
243 int pad[9];\r
c459aefd 244};\r
245\r
cc68a136 246typedef struct\r
247{\r
4ff2d527 248 unsigned char bios[0x20000]; // 000000: 128K\r
249 union { // 020000: 512K\r
fa1e5e29 250 unsigned char prg_ram[0x80000];\r
cc68a136 251 unsigned char prg_ram_b[4][0x20000];\r
252 };\r
4ff2d527 253 union { // 0a0000: 256K\r
fa1e5e29 254 struct {\r
255 unsigned char word_ram2M[0x40000];\r
256 unsigned char unused[0x20000];\r
257 };\r
258 struct {\r
259 unsigned char unused[0x20000];\r
260 unsigned char word_ram1M[2][0x20000];\r
261 };\r
262 };\r
4ff2d527 263 union { // 100000: 64K\r
fa1e5e29 264 unsigned char pcm_ram[0x10000];\r
4f265db7 265 unsigned char pcm_ram_b[0x10][0x1000];\r
266 };\r
4ff2d527 267 unsigned char s68k_regs[0x200]; // 110000: GA, not CPU regs\r
268 unsigned char bram[0x2000]; // 110200: 8K\r
269 struct mcd_misc m; // 112200: misc\r
270 struct mcd_pcm pcm; // 112240:\r
75736070 271 _scd_toc TOC; // not to be saved\r
cc68a136 272 CDD cdd;\r
273 CDC cdc;\r
274 _scd scd;\r
d1df8786 275 Rot_Comp rot_comp;\r
cc68a136 276} mcd_state;\r
277\r
278#define Pico_mcd ((mcd_state *)Pico.rom)\r
279\r
51a902ae 280// Area.c\r
eff55556 281PICO_INTERNAL int PicoAreaPackCpu(unsigned char *cpu, int is_sub);\r
282PICO_INTERNAL int PicoAreaUnpackCpu(unsigned char *cpu, int is_sub);\r
51a902ae 283\r
284// cd/Area.c\r
eff55556 285PICO_INTERNAL int PicoCdSaveState(void *file);\r
286PICO_INTERNAL int PicoCdLoadState(void *file);\r
cc68a136 287\r
288// Draw.c\r
eff55556 289PICO_INTERNAL int PicoLine(int scan);\r
290PICO_INTERNAL void PicoFrameStart(void);\r
cc68a136 291\r
292// Draw2.c\r
eff55556 293PICO_INTERNAL void PicoFrameFull();\r
cc68a136 294\r
295// Memory.c\r
eff55556 296PICO_INTERNAL int PicoInitPc(unsigned int pc);\r
297PICO_INTERNAL_ASM unsigned int CPU_CALL PicoRead32(unsigned int a);\r
298PICO_INTERNAL void PicoMemSetup(void);\r
299PICO_INTERNAL_ASM void PicoMemReset(void);\r
300PICO_INTERNAL unsigned char z80_read(unsigned short a);\r
301PICO_INTERNAL unsigned short z80_read16(unsigned short a);\r
302PICO_INTERNAL_ASM void z80_write(unsigned char data, unsigned short a);\r
303PICO_INTERNAL void z80_write16(unsigned short data, unsigned short a);\r
cc68a136 304\r
305// cd/Memory.c\r
eff55556 306PICO_INTERNAL void PicoMemSetupCD(void);\r
307PICO_INTERNAL_ASM void PicoMemResetCD(int r3);\r
308PICO_INTERNAL_ASM void PicoMemResetCDdecode(int r3);\r
cc68a136 309\r
310// Pico.c\r
311extern struct Pico Pico;\r
312extern struct PicoSRAM SRam;\r
313extern int emustatus;\r
d9153729 314extern int z80startCycle, z80stopCycle; // in 68k cycles\r
eff55556 315PICO_INTERNAL int CheckDMA(void);\r
cc68a136 316\r
317// cd/Pico.c\r
e5f426aa 318PICO_INTERNAL int PicoInitMCD(void);\r
319PICO_INTERNAL void PicoExitMCD(void);\r
eff55556 320PICO_INTERNAL int PicoResetMCD(int hard);\r
321PICO_INTERNAL int PicoFrameMCD(void);\r
cc68a136 322\r
323// Sek.c\r
eff55556 324PICO_INTERNAL int SekInit(void);\r
325PICO_INTERNAL int SekReset(void);\r
326PICO_INTERNAL int SekInterrupt(int irq);\r
327PICO_INTERNAL void SekState(unsigned char *data);\r
328PICO_INTERNAL void SekSetRealTAS(int use_real);\r
cc68a136 329\r
330// cd/Sek.c\r
eff55556 331PICO_INTERNAL int SekInitS68k(void);\r
332PICO_INTERNAL int SekResetS68k(void);\r
333PICO_INTERNAL int SekInterruptS68k(int irq);\r
cc68a136 334\r
7a93adeb 335// sound/sound.c\r
336extern int PsndLen_exc_cnt;\r
337extern int PsndLen_exc_add;\r
338\r
cc68a136 339// VideoPort.c\r
eff55556 340PICO_INTERNAL_ASM void PicoVideoWrite(unsigned int a,unsigned short d);\r
341PICO_INTERNAL_ASM unsigned int PicoVideoRead(unsigned int a);\r
cc68a136 342\r
343// Misc.c\r
eff55556 344PICO_INTERNAL void SRAMWriteEEPROM(unsigned int d);\r
345PICO_INTERNAL void SRAMUpdPending(unsigned int a, unsigned int d);\r
346PICO_INTERNAL_ASM unsigned int SRAMReadEEPROM(void);\r
347PICO_INTERNAL_ASM void memcpy16(unsigned short *dest, unsigned short *src, int count);\r
348PICO_INTERNAL_ASM void memcpy16bswap(unsigned short *dest, void *src, int count);\r
349PICO_INTERNAL_ASM void memcpy32(int *dest, int *src, int count); // 32bit word count\r
350PICO_INTERNAL_ASM void memset32(int *dest, int c, int count);\r
cc68a136 351\r
fa1e5e29 352// cd/Misc.c\r
eff55556 353PICO_INTERNAL_ASM void wram_2M_to_1M(unsigned char *m);\r
354PICO_INTERNAL_ASM void wram_1M_to_2M(unsigned char *m);\r
355\r
356// cd/buffering.c\r
357PICO_INTERNAL void PicoCDBufferRead(void *dest, int lba);\r
358\r
359// sound/sound.c\r
360PICO_INTERNAL void sound_reset(void);\r
361PICO_INTERNAL void sound_timers_and_dac(int raster);\r
362PICO_INTERNAL int sound_render(int offset, int length);\r
363PICO_INTERNAL void sound_clear(void);\r
364// z80 functionality wrappers\r
365PICO_INTERNAL void z80_init(void);\r
366PICO_INTERNAL void z80_resetCycles(void);\r
367PICO_INTERNAL void z80_int(void);\r
368PICO_INTERNAL int z80_run(int cycles);\r
369PICO_INTERNAL void z80_pack(unsigned char *data);\r
370PICO_INTERNAL void z80_unpack(unsigned char *data);\r
371PICO_INTERNAL void z80_reset(void);\r
372PICO_INTERNAL void z80_exit(void);\r
fa1e5e29 373\r
cc68a136 374\r
375#ifdef __cplusplus\r
376} // End of extern "C"\r
377#endif\r
eff55556 378\r
379#endif // PICO_INTERNAL_INCLUDED\r
380\r
fast MegaDrive/MegaCD/32X emulator