make hcnt code friendly with split timeslices
[picodrive.git] / pico / cd / mcd.c
CommitLineData
cff531af 1/*
2 * PicoDrive
ae214f1c 3 * (C) notaz, 2007,2013
cff531af 4 *
5 * This work is licensed under the terms of MAME license.
6 * See COPYING file in the top-level directory.
7 */
cc68a136 8
efcba75f 9#include "../pico_int.h"
43e6eaad 10#include "../sound/ym2612.h"
cc68a136 11
76276b0b 12extern unsigned char formatted_bram[4*0x10];
ae214f1c 13
14static unsigned int m68k_cycle_mult;
89fa852d 15
721cd396 16void (*PicoMCDopenTray)(void) = NULL;
d687ef50 17void (*PicoMCDcloseTray)(void) = NULL;
89fa852d 18
cc68a136 19
2aa27095 20PICO_INTERNAL void PicoInitMCD(void)
cc68a136 21{
22 SekInitS68k();
23 Init_CD_Driver();
cc68a136 24}
25
eff55556 26PICO_INTERNAL void PicoExitMCD(void)
cc68a136 27{
28 End_CD_Driver();
29}
30
1cb1584b 31PICO_INTERNAL void PicoPowerMCD(void)
32{
33 int fmt_size = sizeof(formatted_bram);
34 memset(Pico_mcd->prg_ram, 0, sizeof(Pico_mcd->prg_ram));
35 memset(Pico_mcd->word_ram2M, 0, sizeof(Pico_mcd->word_ram2M));
36 memset(Pico_mcd->pcm_ram, 0, sizeof(Pico_mcd->pcm_ram));
37 memset(Pico_mcd->bram, 0, sizeof(Pico_mcd->bram));
4fb43555 38 memcpy(Pico_mcd->bram + sizeof(Pico_mcd->bram) - fmt_size,
39 formatted_bram, fmt_size);
51a902ae 40 memset(Pico_mcd->s68k_regs, 0, sizeof(Pico_mcd->s68k_regs));
4f265db7 41 memset(&Pico_mcd->pcm, 0, sizeof(Pico_mcd->pcm));
5c69a605 42 memset(&Pico_mcd->m, 0, sizeof(Pico_mcd->m));
51a902ae 43
4fb43555 44 // cold reset state (tested)
45 Pico_mcd->m.state_flags = PCD_ST_S68K_RST;
46 Pico_mcd->m.busreq = 2; // busreq on, s68k in reset
47 Pico_mcd->s68k_regs[3] = 1; // 2M word RAM mode, m68k access
48 Pico_mcd->s68k_regs[6] = 0xff;
49 Pico_mcd->s68k_regs[7] = 0xff;
50 memset(Pico_mcd->bios + 0x70, 0xff, 4);
51}
cc68a136 52
4fb43555 53PICO_INTERNAL int PicoResetMCD(void)
54{
55 // ??
cc68a136 56 Reset_CD();
5c69a605 57 LC89510_Reset();
51a902ae 58 gfx_cd_reset();
3aa1e148 59#ifdef _ASM_CD_MEMORY_C
00bd648e 60 //PicoMemResetCDdecode(1); // don't have to call this in 2M mode
4ff2d527 61#endif
cc68a136 62
6cadc2da 63 // use SRam.data for RAM cart
af37bca8 64 if (PicoOpt & POPT_EN_MCD_RAMCART) {
d6114368 65 if (SRam.data == NULL)
66 SRam.data = calloc(1, 0x12000);
67 }
68 else if (SRam.data != NULL) {
69 free(SRam.data);
70 SRam.data = NULL;
71 }
b542be46 72 SRam.start = SRam.end = 0; // unused
6cadc2da 73
ae214f1c 74 pcd_event_schedule(0, PCD_EVENT_CDC, 12500000/75);
75
cc68a136 76 return 0;
77}
78
ae214f1c 79static __inline void SekRunS68k(unsigned int to)
cc68a136 80{
81 int cyc_do;
ae214f1c 82
83 SekCycleAimS68k = to;
84 if ((cyc_do = SekCycleAimS68k - SekCycleCntS68k) <= 0)
85 return;
86
87 SekCycleCntS68k += cyc_do;
88#if defined(EMU_C68K)
89 PicoCpuCS68k.cycles = cyc_do;
3aa1e148 90 CycloneRun(&PicoCpuCS68k);
ae214f1c 91 SekCycleCntS68k -= PicoCpuCS68k.cycles;
b837b69b 92#elif defined(EMU_M68K)
3aa1e148 93 m68k_set_context(&PicoCpuMS68k);
ae214f1c 94 SekCycleCntS68k += m68k_execute(cyc_do) - cyc_do;
ed4402a7 95 m68k_set_context(&PicoCpuMM68k);
3aa1e148 96#elif defined(EMU_F68K)
ae214f1c 97 g_m68kcontext = &PicoCpuFS68k;
98 SekCycleCntS68k += fm68k_emulate(cyc_do, 0, 0) - cyc_do;
99 g_m68kcontext = &PicoCpuFM68k;
cc68a136 100#endif
101}
102
68cba51e 103
ae214f1c 104unsigned int pcd_cycles_m68k_to_s68k(unsigned int c)
8022f53d 105{
ae214f1c 106 return (long long)c * m68k_cycle_mult >> 16;
8022f53d 107}
ae214f1c 108
109/* events */
110static void pcd_cdc_event(unsigned int now)
68cba51e 111{
ae214f1c 112 // 75Hz CDC update
113 Check_CD_Command();
114 pcd_event_schedule(now, PCD_EVENT_CDC, 12500000/75);
115}
7336a99a 116
ae214f1c 117static void pcd_int3_timer_event(unsigned int now)
118{
119 if (Pico_mcd->s68k_regs[0x33] & PCDS_IEN3) {
120 elprintf(EL_INTS|EL_CD, "s68k: timer irq 3");
121 SekInterruptS68k(3);
122 }
7336a99a 123
ae214f1c 124 if (Pico_mcd->s68k_regs[0x31] != 0)
125 pcd_event_schedule(now, PCD_EVENT_TIMER3,
126 Pico_mcd->s68k_regs[0x31] * 384);
127}
128
129static void pcd_gfx_event(unsigned int now)
130{
131 // update gfx chip
132 if (Pico_mcd->rot_comp.Reg_58 & 0x8000) {
133 Pico_mcd->rot_comp.Reg_58 &= 0x7fff;
134 Pico_mcd->rot_comp.Reg_64 = 0;
135 if (Pico_mcd->s68k_regs[0x33] & PCDS_IEN1) {
136 elprintf(EL_INTS |EL_CD, "s68k: gfx_cd irq 1");
137 SekInterruptS68k(1);
7336a99a 138 }
68cba51e 139 }
68cba51e 140}
141
ae214f1c 142static void pcd_dma_event(unsigned int now)
143{
144 int ddx = Pico_mcd->s68k_regs[4] & 7;
145 Update_CDC_TRansfer(ddx);
146}
68cba51e 147
ae214f1c 148typedef void (event_cb)(unsigned int now);
149
150/* times are in s68k (12.5MHz) cycles */
151unsigned int pcd_event_times[PCD_EVENT_COUNT];
152static unsigned int event_time_next;
153static event_cb *pcd_event_cbs[PCD_EVENT_COUNT] = {
154 [PCD_EVENT_CDC] = pcd_cdc_event,
155 [PCD_EVENT_TIMER3] = pcd_int3_timer_event,
156 [PCD_EVENT_GFX] = pcd_gfx_event,
157 [PCD_EVENT_DMA] = pcd_dma_event,
158};
159
160void pcd_event_schedule(unsigned int now, enum pcd_event event, int after)
bf098bc5 161{
ae214f1c 162 unsigned int when;
163
164 when = now + after;
165 if (when == 0) {
166 // event cancelled
167 pcd_event_times[event] = 0;
168 return;
169 }
bf098bc5 170
ae214f1c 171 when |= 1;
bf098bc5 172
ae214f1c 173 elprintf(EL_CD, "cd: new event #%u %u->%u", event, now, when);
174 pcd_event_times[event] = when;
bf098bc5 175
ae214f1c 176 if (event_time_next == 0 || CYCLES_GT(event_time_next, when))
177 event_time_next = when;
bf098bc5 178}
179
ae214f1c 180void pcd_event_schedule_s68k(enum pcd_event event, int after)
4f265db7 181{
ae214f1c 182 if (SekCyclesLeftS68k > after)
183 SekEndRunS68k(after);
4f265db7 184
ae214f1c 185 pcd_event_schedule(SekCyclesDoneS68k(), event, after);
186}
4f265db7 187
ae214f1c 188static void pcd_run_events(unsigned int until)
189{
190 int oldest, oldest_diff, time;
191 int i, diff;
192
193 while (1) {
194 oldest = -1, oldest_diff = 0x7fffffff;
195
196 for (i = 0; i < PCD_EVENT_COUNT; i++) {
197 if (pcd_event_times[i]) {
198 diff = pcd_event_times[i] - until;
199 if (diff < oldest_diff) {
200 oldest_diff = diff;
201 oldest = i;
202 }
203 }
204 }
205
206 if (oldest_diff <= 0) {
207 time = pcd_event_times[oldest];
208 pcd_event_times[oldest] = 0;
209 elprintf(EL_CD, "cd: run event #%d %u", oldest, time);
210 pcd_event_cbs[oldest](time);
211 }
212 else if (oldest_diff < 0x7fffffff) {
213 event_time_next = pcd_event_times[oldest];
214 break;
215 }
216 else {
217 event_time_next = 0;
218 break;
219 }
220 }
4f265db7 221
ae214f1c 222 if (oldest != -1)
223 elprintf(EL_CD, "cd: next event #%d at %u",
224 oldest, event_time_next);
4f265db7 225}
226
08769494 227int pcd_sync_s68k(unsigned int m68k_target, int m68k_poll_sync)
ae214f1c 228{
229 #define now SekCycleCntS68k
230 unsigned int s68k_target =
231 (unsigned long long)m68k_target * m68k_cycle_mult >> 16;
232 unsigned int target;
b837b69b 233
08769494 234 elprintf(EL_CD, "s68k sync to %u, %u->%u",
235 m68k_target, now, s68k_target);
ae214f1c 236
4fb43555 237 if (Pico_mcd->m.busreq != 1) { /* busreq/reset */
ae214f1c 238 SekCycleCntS68k = SekCycleAimS68k = s68k_target;
239 pcd_run_events(m68k_target);
08769494 240 return 0;
ae214f1c 241 }
242
243 while (CYCLES_GT(s68k_target, now)) {
244 if (event_time_next && CYCLES_GE(now, event_time_next))
245 pcd_run_events(now);
246
247 target = s68k_target;
248 if (event_time_next && CYCLES_GT(target, event_time_next))
249 target = event_time_next;
250
251 SekRunS68k(target);
08769494 252 if (m68k_poll_sync && Pico_mcd->m.m68k_poll_cnt == 0)
253 break;
ae214f1c 254 }
08769494 255
256 return s68k_target - now;
ae214f1c 257 #undef now
c987bb5c 258}
ae214f1c 259
ba6e8bfd 260#define pcd_run_cpus_normal pcd_run_cpus
261//#define pcd_run_cpus_lockstep pcd_run_cpus
262
08769494 263static void SekSyncM68k(void);
264
ba6e8bfd 265static inline void pcd_run_cpus_normal(int m68k_cycles)
08769494 266{
267 SekCycleAim += m68k_cycles;
268 if (Pico_mcd->m.m68k_poll_cnt >= 16 && !SekShouldInterrupt()) {
269 int s68k_left = pcd_sync_s68k(SekCycleAim, 1);
270 if (s68k_left <= 0) {
ba6e8bfd 271 elprintf(EL_CDPOLL, "m68k poll [%02x] x%d @%06x",
08769494 272 Pico_mcd->m.m68k_poll_a, Pico_mcd->m.m68k_poll_cnt, SekPc);
273 SekCycleCnt = SekCycleAim;
274 return;
275 }
276 SekCycleCnt = SekCycleAim - (s68k_left * 40220 >> 16);
277 }
278
279 SekSyncM68k();
280}
281
ba6e8bfd 282static inline void pcd_run_cpus_lockstep(int m68k_cycles)
283{
284 unsigned int target = SekCycleAim + m68k_cycles;
285 do {
286 SekCycleAim += 8;
287 SekSyncM68k();
288 pcd_sync_s68k(SekCycleAim, 0);
289 } while (CYCLES_GT(target, SekCycleAim));
290}
291
ae214f1c 292#define PICO_CD
293#define CPUS_RUN(m68k_cycles) \
08769494 294 pcd_run_cpus(m68k_cycles)
ae214f1c 295
efcba75f 296#include "../pico_cmn.c"
cc68a136 297
298
2aa27095 299PICO_INTERNAL void PicoFrameMCD(void)
cc68a136 300{
602133e1 301 if (!(PicoOpt&POPT_ALT_RENDERER))
cc68a136 302 PicoFrameStart();
303
ae214f1c 304 // ~1.63 for NTSC, ~1.645 for PAL
305 if (Pico.m.pal)
306 m68k_cycle_mult = ((12500000ull << 16) / (50*312*488));
307 else
308 m68k_cycle_mult = ((12500000ull << 16) / (60*262*488)) + 1;
309
bf5fbbb4 310 PicoFrameHints();
cc68a136 311}
312
ae214f1c 313void pcd_state_loaded(void)
314{
315 unsigned int cycles;
316 int diff;
317
318 pcd_state_loaded_mem();
319
320 // old savestates..
321 cycles = pcd_cycles_m68k_to_s68k(SekCycleAim);
322 diff = cycles - SekCycleAimS68k;
323 if (diff < -1000 || diff > 1000) {
324 SekCycleCntS68k = SekCycleAimS68k = cycles;
325 }
326 if (pcd_event_times[PCD_EVENT_CDC] == 0) {
327 pcd_event_schedule(SekCycleAimS68k, PCD_EVENT_CDC, 12500000/75);
328
329 if (Pico_mcd->s68k_regs[0x31])
330 pcd_event_schedule(SekCycleAimS68k, PCD_EVENT_TIMER3,
331 Pico_mcd->s68k_regs[0x31] * 384);
332
333 if (Pico_mcd->rot_comp.Reg_58 & 0x8000) {
334 Pico_mcd->rot_comp.Reg_58 &= 0x7fff;
335 Pico_mcd->rot_comp.Reg_64 = 0;
336 if (Pico_mcd->s68k_regs[0x33] & PCDS_IEN1)
337 SekInterruptS68k(1);
338 }
339 if (Pico_mcd->scd.Status_CDC & 0x08)
340 Update_CDC_TRansfer(Pico_mcd->s68k_regs[4] & 7);
341 }
342}
cc68a136 343
ae214f1c 344// vim:shiftwidth=2:ts=2:expandtab