fix clang build
[picodrive.git] / pico / cd / memory.c
CommitLineData
cff531af 1/*\r
2 * Memory I/O handlers for Sega/Mega CD.\r
3 * (C) notaz, 2007-2009\r
4 *\r
5 * This work is licensed under the terms of MAME license.\r
6 * See COPYING file in the top-level directory.\r
7 */\r
cc68a136 8\r
efcba75f 9#include "../pico_int.h"\r
af37bca8 10#include "../memory.h"\r
cc68a136 11\r
bcf65fd6 12uptr s68k_read8_map [0x1000000 >> M68K_MEM_SHIFT];\r
13uptr s68k_read16_map [0x1000000 >> M68K_MEM_SHIFT];\r
14uptr s68k_write8_map [0x1000000 >> M68K_MEM_SHIFT];\r
15uptr s68k_write16_map[0x1000000 >> M68K_MEM_SHIFT];\r
cc68a136 16\r
af37bca8 17MAKE_68K_READ8(s68k_read8, s68k_read8_map)\r
18MAKE_68K_READ16(s68k_read16, s68k_read16_map)\r
19MAKE_68K_READ32(s68k_read32, s68k_read16_map)\r
20MAKE_68K_WRITE8(s68k_write8, s68k_write8_map)\r
21MAKE_68K_WRITE16(s68k_write16, s68k_write16_map)\r
22MAKE_68K_WRITE32(s68k_write32, s68k_write16_map)\r
b5e5172d 23\r
cc68a136 24// -----------------------------------------------------------------\r
25\r
0ace9b9a 26// provided by ASM code:\r
27#ifdef _ASM_CD_MEMORY_C\r
0ace9b9a 28u32 PicoReadS68k8_pr(u32 a);\r
29u32 PicoReadS68k16_pr(u32 a);\r
30void PicoWriteS68k8_pr(u32 a, u32 d);\r
31void PicoWriteS68k16_pr(u32 a, u32 d);\r
32\r
33u32 PicoReadM68k8_cell0(u32 a);\r
34u32 PicoReadM68k8_cell1(u32 a);\r
35u32 PicoReadM68k16_cell0(u32 a);\r
36u32 PicoReadM68k16_cell1(u32 a);\r
37void PicoWriteM68k8_cell0(u32 a, u32 d);\r
38void PicoWriteM68k8_cell1(u32 a, u32 d);\r
39void PicoWriteM68k16_cell0(u32 a, u32 d);\r
40void PicoWriteM68k16_cell1(u32 a, u32 d);\r
41\r
42u32 PicoReadS68k8_dec0(u32 a);\r
43u32 PicoReadS68k8_dec1(u32 a);\r
44u32 PicoReadS68k16_dec0(u32 a);\r
45u32 PicoReadS68k16_dec1(u32 a);\r
46void PicoWriteS68k8_dec_m0b0(u32 a, u32 d);\r
47void PicoWriteS68k8_dec_m1b0(u32 a, u32 d);\r
48void PicoWriteS68k8_dec_m2b0(u32 a, u32 d);\r
49void PicoWriteS68k8_dec_m0b1(u32 a, u32 d);\r
50void PicoWriteS68k8_dec_m1b1(u32 a, u32 d);\r
51void PicoWriteS68k8_dec_m2b1(u32 a, u32 d);\r
52void PicoWriteS68k16_dec_m0b0(u32 a, u32 d);\r
53void PicoWriteS68k16_dec_m1b0(u32 a, u32 d);\r
54void PicoWriteS68k16_dec_m2b0(u32 a, u32 d);\r
55void PicoWriteS68k16_dec_m0b1(u32 a, u32 d);\r
56void PicoWriteS68k16_dec_m1b1(u32 a, u32 d);\r
57void PicoWriteS68k16_dec_m2b1(u32 a, u32 d);\r
58#endif\r
59\r
4fb43555 60static void remap_prg_window(u32 r1, u32 r3);\r
61static void remap_word_ram(u32 r3);\r
0ace9b9a 62\r
7a1f6e45 63// poller detection\r
7a1f6e45 64#define POLL_LIMIT 16\r
30e8aac4 65#define POLL_CYCLES 64\r
cc68a136 66\r
cc5ffc3c 67void m68k_comm_check(u32 a)\r
bc3c13d3 68{\r
08769494 69 pcd_sync_s68k(SekCyclesDone(), 0);\r
6901d0e4 70 if (a >= 0x0e && !Pico_mcd->m.need_sync) {\r
71 // there are cases when slave updates comm and only switches RAM\r
72 // over after that (mcd1b), so there must be a resync..\r
73 SekEndRun(64);\r
74 Pico_mcd->m.need_sync = 1;\r
75 }\r
ecc8036e 76 if (SekNotPolling || a != Pico_mcd->m.m68k_poll_a) {\r
bc3c13d3 77 Pico_mcd->m.m68k_poll_a = a;\r
78 Pico_mcd->m.m68k_poll_cnt = 0;\r
ecc8036e 79 SekNotPolling = 0;\r
cc5ffc3c 80 return;\r
bc3c13d3 81 }\r
08769494 82 Pico_mcd->m.m68k_poll_cnt++;\r
bc3c13d3 83}\r
84\r
4ff2d527 85#ifndef _ASM_CD_MEMORY_C\r
cb4a513a 86static u32 m68k_reg_read16(u32 a)\r
cc68a136 87{\r
4fb43555 88 u32 d = 0;\r
cc68a136 89 a &= 0x3e;\r
cc68a136 90\r
91 switch (a) {\r
672ad671 92 case 0:\r
4fb43555 93 // here IFL2 is always 0, just like in Gens\r
94 d = ((Pico_mcd->s68k_regs[0x33] << 13) & 0x8000)\r
95 | Pico_mcd->m.busreq;\r
672ad671 96 goto end;\r
cc68a136 97 case 2:\r
cc5ffc3c 98 m68k_comm_check(a);\r
672ad671 99 d = (Pico_mcd->s68k_regs[a]<<8) | (Pico_mcd->s68k_regs[a+1]&0xc7);\r
af37bca8 100 elprintf(EL_CDREG3, "m68k_regs r3: %02x @%06x", (u8)d, SekPc);\r
cc5ffc3c 101 goto end;\r
c459aefd 102 case 4:\r
103 d = Pico_mcd->s68k_regs[4]<<8;\r
104 goto end;\r
105 case 6:\r
913ef4b7 106 d = *(u16 *)(Pico_mcd->bios + 0x72);\r
c459aefd 107 goto end;\r
cc68a136 108 case 8:\r
3f23709e 109 d = cdc_host_r();\r
cc68a136 110 goto end;\r
c459aefd 111 case 0xA:\r
ca61ee42 112 elprintf(EL_UIO, "m68k FIXME: reserved read");\r
c459aefd 113 goto end;\r
ae214f1c 114 case 0xC: // 384 cycle stopwatch timer\r
115 // ugh..\r
116 d = pcd_cycles_m68k_to_s68k(SekCyclesDone());\r
117 d = (d - Pico_mcd->m.stopwatch_base_c) / 384;\r
118 d &= 0x0fff;\r
af37bca8 119 elprintf(EL_CDREGS, "m68k stopwatch timer read (%04x)", d);\r
1cd356a3 120 goto end;\r
cc68a136 121 }\r
122\r
cc68a136 123 if (a < 0x30) {\r
124 // comm flag/cmd/status (0xE-0x2F)\r
cc5ffc3c 125 m68k_comm_check(a);\r
cc68a136 126 d = (Pico_mcd->s68k_regs[a]<<8) | Pico_mcd->s68k_regs[a+1];\r
cc5ffc3c 127 goto end;\r
cc68a136 128 }\r
129\r
ca61ee42 130 elprintf(EL_UIO, "m68k_regs FIXME invalid read @ %02x", a);\r
cc68a136 131\r
132end:\r
cc68a136 133 return d;\r
134}\r
4ff2d527 135#endif\r
cc68a136 136\r
4ff2d527 137#ifndef _ASM_CD_MEMORY_C\r
138static\r
139#endif\r
140void m68k_reg_write8(u32 a, u32 d)\r
cc68a136 141{\r
af37bca8 142 u32 dold;\r
cc68a136 143 a &= 0x3f;\r
cc68a136 144\r
145 switch (a) {\r
146 case 0:\r
672ad671 147 d &= 1;\r
08769494 148 if (d && (Pico_mcd->s68k_regs[0x33] & PCDS_IEN2)) {\r
149 elprintf(EL_INTS, "m68k: s68k irq 2");\r
150 pcd_sync_s68k(SekCyclesDone(), 0);\r
151 SekInterruptS68k(2);\r
152 }\r
c459aefd 153 return;\r
cc68a136 154 case 1:\r
672ad671 155 d &= 3;\r
4fb43555 156 dold = Pico_mcd->m.busreq;\r
157 if (!(d & 1))\r
158 d |= 2; // verified: can't release bus on reset\r
159 if (dold == d)\r
bc3c13d3 160 return;\r
4fb43555 161\r
08769494 162 pcd_sync_s68k(SekCyclesDone(), 0);\r
bc3c13d3 163\r
4fb43555 164 if ((dold ^ d) & 1)\r
bc3c13d3 165 elprintf(EL_INTSW, "m68k: s68k reset %i", !(d&1));\r
4fb43555 166 if (!(d & 1))\r
167 Pico_mcd->m.state_flags |= PCD_ST_S68K_RST;\r
168 else if (d == 1 && (Pico_mcd->m.state_flags & PCD_ST_S68K_RST)) {\r
169 Pico_mcd->m.state_flags &= ~PCD_ST_S68K_RST;\r
170 elprintf(EL_CDREGS, "m68k: resetting s68k");\r
171 SekResetS68k();\r
cc68a136 172 }\r
4fb43555 173 if ((dold ^ d) & 2) {\r
bc3c13d3 174 elprintf(EL_INTSW, "m68k: s68k brq %i", d >> 1);\r
4fb43555 175 remap_prg_window(d, Pico_mcd->s68k_regs[3]);\r
bc3c13d3 176 }\r
c459aefd 177 Pico_mcd->m.busreq = d;\r
178 return;\r
672ad671 179 case 2:\r
af37bca8 180 elprintf(EL_CDREGS, "m68k: prg wp=%02x", d);\r
672ad671 181 Pico_mcd->s68k_regs[2] = d; // really use s68k side register\r
182 return;\r
af37bca8 183 case 3:\r
184 dold = Pico_mcd->s68k_regs[3];\r
185 elprintf(EL_CDREG3, "m68k_regs w3: %02x @%06x", (u8)d, SekPc);\r
af37bca8 186 if ((d ^ dold) & 0xc0) {\r
08769494 187 elprintf(EL_CDREGS, "m68k: prg bank: %i -> %i",\r
188 (Pico_mcd->s68k_regs[a]>>6), ((d>>6)&3));\r
4fb43555 189 remap_prg_window(Pico_mcd->m.busreq, d);\r
7a1f6e45 190 }\r
ba6e8bfd 191\r
192 // 2M mode state is tracked regardless of current mode\r
193 if (d & 2) {\r
194 Pico_mcd->m.dmna_ret_2m |= 2;\r
195 Pico_mcd->m.dmna_ret_2m &= ~1;\r
196 }\r
197 if (dold & 4) { // 1M mode\r
198 d ^= 2; // 0 sets DMNA, 1 does nothing\r
199 d = (d & 0xc2) | (dold & 0x1f);\r
200 }\r
201 else\r
202 d = (d & 0xc0) | (dold & 0x1c) | Pico_mcd->m.dmna_ret_2m;\r
203\r
08769494 204 goto write_comm;\r
c459aefd 205 case 6:\r
d1df8786 206 Pico_mcd->bios[0x72 + 1] = d; // simple hint vector changer\r
c459aefd 207 return;\r
208 case 7:\r
d1df8786 209 Pico_mcd->bios[0x72] = d;\r
af37bca8 210 elprintf(EL_CDREGS, "hint vector set to %04x%04x",\r
211 ((u16 *)Pico_mcd->bios)[0x70/2], ((u16 *)Pico_mcd->bios)[0x72/2]);\r
c459aefd 212 return;\r
08769494 213 case 0x0f:\r
08769494 214 a = 0x0e;\r
215 case 0x0e:\r
216 goto write_comm;\r
672ad671 217 }\r
218\r
08769494 219 if ((a&0xf0) == 0x10)\r
220 goto write_comm;\r
cc68a136 221\r
ca61ee42 222 elprintf(EL_UIO, "m68k FIXME: invalid write? [%02x] %02x", a, d);\r
08769494 223 return;\r
224\r
225write_comm:\r
226 if (d == Pico_mcd->s68k_regs[a])\r
227 return;\r
228\r
08769494 229 pcd_sync_s68k(SekCyclesDone(), 0);\r
30e8aac4 230 Pico_mcd->s68k_regs[a] = d;\r
334d9fb6 231 if (Pico_mcd->m.s68k_poll_a == (a & ~1))\r
30e8aac4 232 {\r
334d9fb6 233 if (Pico_mcd->m.s68k_poll_cnt > POLL_LIMIT) {\r
234 elprintf(EL_CDPOLL, "s68k poll release, a=%02x", a);\r
235 SekSetStopS68k(0);\r
236 }\r
08769494 237 Pico_mcd->m.s68k_poll_a = 0;\r
08769494 238 }\r
cc68a136 239}\r
240\r
2433f409 241u32 s68k_poll_detect(u32 a, u32 d)\r
242{\r
243#ifdef USE_POLL_DETECT\r
08769494 244 u32 cycles, cnt = 0;\r
245 if (SekIsStoppedS68k())\r
246 return d;\r
247\r
248 cycles = SekCyclesDoneS68k();\r
ecc8036e 249 if (!SekNotPolling && a == Pico_mcd->m.s68k_poll_a) {\r
08769494 250 u32 clkdiff = cycles - Pico_mcd->m.s68k_poll_clk;\r
2433f409 251 if (clkdiff <= POLL_CYCLES) {\r
08769494 252 cnt = Pico_mcd->m.s68k_poll_cnt + 1;\r
253 //printf("-- diff: %u, cnt = %i\n", clkdiff, cnt);\r
254 if (Pico_mcd->m.s68k_poll_cnt > POLL_LIMIT) {\r
2433f409 255 SekSetStopS68k(1);\r
cc5ffc3c 256 elprintf(EL_CDPOLL, "s68k poll detected @%06x, a=%02x",\r
08769494 257 SekPcS68k, a);\r
2433f409 258 }\r
2433f409 259 }\r
260 }\r
08769494 261 Pico_mcd->m.s68k_poll_a = a;\r
262 Pico_mcd->m.s68k_poll_clk = cycles;\r
263 Pico_mcd->m.s68k_poll_cnt = cnt;\r
ecc8036e 264 SekNotPollingS68k = 0;\r
2433f409 265#endif\r
266 return d;\r
267}\r
cc68a136 268\r
913ef4b7 269#define READ_FONT_DATA(basemask) \\r
270{ \\r
271 unsigned int fnt = *(unsigned int *)(Pico_mcd->s68k_regs + 0x4c); \\r
272 unsigned int col0 = (fnt >> 8) & 0x0f, col1 = (fnt >> 12) & 0x0f; \\r
273 if (fnt & (basemask << 0)) d = col1 ; else d = col0; \\r
274 if (fnt & (basemask << 1)) d |= col1 << 4; else d |= col0 << 4; \\r
275 if (fnt & (basemask << 2)) d |= col1 << 8; else d |= col0 << 8; \\r
276 if (fnt & (basemask << 3)) d |= col1 << 12; else d |= col0 << 12; \\r
277}\r
278\r
cc68a136 279\r
4ff2d527 280#ifndef _ASM_CD_MEMORY_C\r
281static\r
282#endif\r
283u32 s68k_reg_read16(u32 a)\r
cc68a136 284{\r
285 u32 d=0;\r
cc68a136 286\r
cc68a136 287 switch (a) {\r
288 case 0:\r
7a1f6e45 289 return ((Pico_mcd->s68k_regs[0]&3)<<8) | 1; // ver = 0, not in reset state\r
672ad671 290 case 2:\r
2433f409 291 d = (Pico_mcd->s68k_regs[2]<<8) | (Pico_mcd->s68k_regs[3]&0x1f);\r
af37bca8 292 elprintf(EL_CDREG3, "s68k_regs r3: %02x @%06x", (u8)d, SekPcS68k);\r
2433f409 293 return s68k_poll_detect(a, d);\r
cc68a136 294 case 6:\r
3f23709e 295 return cdc_reg_r();\r
cc68a136 296 case 8:\r
3f23709e 297 return cdc_host_r();\r
cc68a136 298 case 0xC:\r
ae214f1c 299 d = SekCyclesDoneS68k() - Pico_mcd->m.stopwatch_base_c;\r
300 d /= 384;\r
301 d &= 0x0fff;\r
af37bca8 302 elprintf(EL_CDREGS, "s68k stopwatch timer read (%04x)", d);\r
7a1f6e45 303 return d;\r
d1df8786 304 case 0x30:\r
af37bca8 305 elprintf(EL_CDREGS, "s68k int3 timer read (%02x)", Pico_mcd->s68k_regs[31]);\r
7a1f6e45 306 return Pico_mcd->s68k_regs[31];\r
cc68a136 307 case 0x34: // fader\r
7a1f6e45 308 return 0; // no busy bit\r
913ef4b7 309 case 0x50: // font data (check: Lunar 2, Silpheed)\r
310 READ_FONT_DATA(0x00100000);\r
7a1f6e45 311 return d;\r
913ef4b7 312 case 0x52:\r
313 READ_FONT_DATA(0x00010000);\r
7a1f6e45 314 return d;\r
913ef4b7 315 case 0x54:\r
316 READ_FONT_DATA(0x10000000);\r
7a1f6e45 317 return d;\r
913ef4b7 318 case 0x56:\r
319 READ_FONT_DATA(0x01000000);\r
7a1f6e45 320 return d;\r
cc68a136 321 }\r
322\r
323 d = (Pico_mcd->s68k_regs[a]<<8) | Pico_mcd->s68k_regs[a+1];\r
324\r
2433f409 325 if (a >= 0x0e && a < 0x30)\r
326 return s68k_poll_detect(a, d);\r
7a1f6e45 327\r
cc68a136 328 return d;\r
329}\r
330\r
4ff2d527 331#ifndef _ASM_CD_MEMORY_C\r
332static\r
333#endif\r
334void s68k_reg_write8(u32 a, u32 d)\r
cc68a136 335{\r
48e8482f 336 // Warning: d might have upper bits set\r
cc68a136 337 switch (a) {\r
d0132772 338 case 1:\r
339 if (!(d & 1))\r
340 pcd_soft_reset();\r
341 return;\r
672ad671 342 case 2:\r
343 return; // only m68k can change WP\r
fa1e5e29 344 case 3: {\r
345 int dold = Pico_mcd->s68k_regs[3];\r
af37bca8 346 elprintf(EL_CDREG3, "s68k_regs w3: %02x @%06x", (u8)d, SekPcS68k);\r
672ad671 347 d &= 0x1d;\r
af37bca8 348 d |= dold & 0xc2;\r
ba6e8bfd 349\r
350 // 2M mode state\r
351 if (d & 1) {\r
352 Pico_mcd->m.dmna_ret_2m |= 1;\r
353 Pico_mcd->m.dmna_ret_2m &= ~2; // DMNA clears\r
354 }\r
355\r
af37bca8 356 if (d & 4)\r
39230401 357 {\r
fa1e5e29 358 if (!(dold & 4)) {\r
af37bca8 359 elprintf(EL_CDREG3, "wram mode 2M->1M");\r
fa1e5e29 360 wram_2M_to_1M(Pico_mcd->word_ram2M);\r
4ff2d527 361 }\r
ba6e8bfd 362\r
363 if ((d ^ dold) & 0x1d)\r
364 remap_word_ram(d);\r
365\r
366 if ((d ^ dold) & 0x05)\r
367 d &= ~2; // clear DMNA - swap complete\r
39230401 368 }\r
369 else\r
370 {\r
fa1e5e29 371 if (dold & 4) {\r
af37bca8 372 elprintf(EL_CDREG3, "wram mode 1M->2M");\r
fa1e5e29 373 wram_1M_to_2M(Pico_mcd->word_ram2M);\r
0ace9b9a 374 remap_word_ram(d);\r
4ff2d527 375 }\r
ba6e8bfd 376 d = (d & ~3) | Pico_mcd->m.dmna_ret_2m;\r
d0d47c5b 377 }\r
08769494 378 goto write_comm;\r
fa1e5e29 379 }\r
cc68a136 380 case 4:\r
af37bca8 381 elprintf(EL_CDREGS, "s68k CDC dest: %x", d&7);\r
cc68a136 382 Pico_mcd->s68k_regs[4] = (Pico_mcd->s68k_regs[4]&0xC0) | (d&7); // CDC mode\r
383 return;\r
384 case 5:\r
c459aefd 385 //dprintf("s68k CDC reg addr: %x", d&0xf);\r
cc68a136 386 break;\r
387 case 7:\r
f47d0a28 388 cdc_reg_w(d & 0xff);\r
cc68a136 389 return;\r
390 case 0xa:\r
af37bca8 391 elprintf(EL_CDREGS, "s68k set CDC dma addr");\r
cc68a136 392 break;\r
d1df8786 393 case 0xc:\r
ae214f1c 394 case 0xd: // 384 cycle stopwatch timer\r
395 elprintf(EL_CDREGS|EL_CD, "s68k clear stopwatch (%x)", d);\r
396 // does this also reset internal 384 cycle counter?\r
397 Pico_mcd->m.stopwatch_base_c = SekCyclesDoneS68k();\r
4f265db7 398 return;\r
08769494 399 case 0x0e:\r
08769494 400 a = 0x0f;\r
401 case 0x0f:\r
402 goto write_comm;\r
ae214f1c 403 case 0x31: // 384 cycle int3 timer\r
404 d &= 0xff;\r
405 elprintf(EL_CDREGS|EL_CD, "s68k set int3 timer: %02x", d);\r
406 Pico_mcd->s68k_regs[a] = (u8) d;\r
407 if (d) // d or d+1??\r
408 pcd_event_schedule_s68k(PCD_EVENT_TIMER3, d * 384);\r
409 else\r
410 pcd_event_schedule(0, PCD_EVENT_TIMER3, 0);\r
d1df8786 411 break;\r
cc68a136 412 case 0x33: // IRQ mask\r
ae214f1c 413 elprintf(EL_CDREGS|EL_CD, "s68k irq mask: %02x", d);\r
414 d &= 0x7e;\r
415 if ((d ^ Pico_mcd->s68k_regs[0x33]) & d & PCDS_IEN4) {\r
274fcc35 416 // XXX: emulate pending irq instead?\r
417 if (Pico_mcd->s68k_regs[0x37] & 4) {\r
418 elprintf(EL_INTS, "cdd export irq 4 (unmask)");\r
419 SekInterruptS68k(4);\r
420 }\r
cc68a136 421 }\r
422 break;\r
423 case 0x34: // fader\r
424 Pico_mcd->s68k_regs[a] = (u8) d & 0x7f;\r
425 return;\r
672ad671 426 case 0x36:\r
427 return; // d/m bit is unsetable\r
428 case 0x37: {\r
429 u32 d_old = Pico_mcd->s68k_regs[0x37];\r
274fcc35 430 Pico_mcd->s68k_regs[0x37] = d & 7;\r
672ad671 431 if ((d&4) && !(d_old&4)) {\r
274fcc35 432 // ??\r
433 pcd_event_schedule_s68k(PCD_EVENT_CDC, 12500000/75);\r
434\r
435 if (Pico_mcd->s68k_regs[0x33] & PCDS_IEN4) {\r
436 elprintf(EL_INTS, "cdd export irq 4");\r
437 SekInterruptS68k(4);\r
438 }\r
cc68a136 439 }\r
672ad671 440 return;\r
441 }\r
cc68a136 442 case 0x4b:\r
7b3ddc11 443 Pico_mcd->s68k_regs[a] = 0; // (u8) d; ?\r
274fcc35 444 cdd_process();\r
7b3ddc11 445 {\r
446 static const char *nm[] =\r
447 { "stat", "stop", "read_toc", "play",\r
448 "seek", "???", "pause", "resume",\r
449 "ff", "fr", "tjump", "???",\r
450 "close","open", "???", "???" };\r
451 u8 *c = &Pico_mcd->s68k_regs[0x42];\r
452 u8 *s = &Pico_mcd->s68k_regs[0x38];\r
453 elprintf(EL_CD,\r
454 "CDD command: %02x %02x %02x %02x %02x %02x %02x %02x %12s",\r
455 c[0], c[1], c[2], c[3], c[4], c[5], c[6], c[7], nm[c[0] & 0x0f]);\r
456 elprintf(EL_CD,\r
457 "CDD status: %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x",\r
458 s[0], s[1], s[2], s[3], s[4], s[5], s[6], s[7], s[8], s[9]);\r
459 }\r
cc68a136 460 return;\r
a93a80de 461 case 0x58:\r
462 return;\r
cc68a136 463 }\r
464\r
08769494 465 if ((a&0x1f0) == 0x20)\r
466 goto write_comm;\r
467\r
1cd356a3 468 if ((a&0x1f0) == 0x10 || (a >= 0x38 && a < 0x42))\r
cc68a136 469 {\r
ca61ee42 470 elprintf(EL_UIO, "s68k FIXME: invalid write @ %02x?", a);\r
cc68a136 471 return;\r
472 }\r
473\r
08769494 474 Pico_mcd->s68k_regs[a] = (u8) d;\r
475 return;\r
bc3c13d3 476\r
08769494 477write_comm:\r
cc68a136 478 Pico_mcd->s68k_regs[a] = (u8) d;\r
08769494 479 if (Pico_mcd->m.m68k_poll_cnt)\r
480 SekEndRunS68k(0);\r
481 Pico_mcd->m.m68k_poll_cnt = 0;\r
cc68a136 482}\r
483\r
a93a80de 484void s68k_reg_write16(u32 a, u32 d)\r
485{\r
486 u8 *r = Pico_mcd->s68k_regs;\r
487\r
488 if ((a & 0x1f0) == 0x20)\r
489 goto write_comm;\r
490\r
491 switch (a) {\r
492 case 0x0e:\r
493 // special case, 2 byte writes would be handled differently\r
494 // TODO: verify\r
495 r[0xf] = d;\r
496 return;\r
497 case 0x58: // stamp data size\r
498 r[0x59] = d & 7;\r
499 return;\r
500 case 0x5a: // stamp map base address\r
501 r[0x5a] = d >> 8;\r
502 r[0x5b] = d & 0xe0;\r
503 return;\r
504 case 0x5c: // V cell size\r
505 r[0x5d] = d & 0x1f;\r
506 return;\r
507 case 0x5e: // image buffer start address\r
508 r[0x5e] = d >> 8;\r
509 r[0x5f] = d & 0xf8;\r
510 return;\r
511 case 0x60: // image buffer offset\r
512 r[0x61] = d & 0x3f;\r
513 return;\r
514 case 0x62: // h dot size\r
515 r[0x62] = (d >> 8) & 1;\r
516 r[0x63] = d;\r
517 return;\r
518 case 0x64: // v dot size\r
519 r[0x65] = d;\r
520 return;\r
521 case 0x66: // trace vector base address\r
522 d &= 0xfffe;\r
523 r[0x66] = d >> 8;\r
524 r[0x67] = d;\r
525 gfx_start(d);\r
526 return;\r
527 default:\r
528 break;\r
529 }\r
530\r
531 s68k_reg_write8(a, d >> 8);\r
532 s68k_reg_write8(a + 1, d & 0xff);\r
533 return;\r
534\r
535write_comm:\r
536 r[a] = d >> 8;\r
537 r[a + 1] = d;\r
538 if (Pico_mcd->m.m68k_poll_cnt)\r
539 SekEndRunS68k(0);\r
540 Pico_mcd->m.m68k_poll_cnt = 0;\r
541}\r
542\r
af37bca8 543// -----------------------------------------------------------------\r
544// Main 68k\r
545// -----------------------------------------------------------------\r
cc68a136 546\r
af37bca8 547#ifndef _ASM_CD_MEMORY_C\r
548#include "cell_map.c"\r
af37bca8 549\r
550// WORD RAM, cell aranged area (220000 - 23ffff)\r
0ace9b9a 551static u32 PicoReadM68k8_cell0(u32 a)\r
cc68a136 552{\r
af37bca8 553 a = (a&3) | (cell_map(a >> 2) << 2); // cell arranged\r
0ace9b9a 554 return Pico_mcd->word_ram1M[0][a ^ 1];\r
555}\r
556\r
557static u32 PicoReadM68k8_cell1(u32 a)\r
558{\r
559 a = (a&3) | (cell_map(a >> 2) << 2);\r
560 return Pico_mcd->word_ram1M[1][a ^ 1];\r
561}\r
562\r
563static u32 PicoReadM68k16_cell0(u32 a)\r
564{\r
565 a = (a&2) | (cell_map(a >> 2) << 2);\r
566 return *(u16 *)(Pico_mcd->word_ram1M[0] + a);\r
af37bca8 567}\r
cc68a136 568\r
0ace9b9a 569static u32 PicoReadM68k16_cell1(u32 a)\r
af37bca8 570{\r
af37bca8 571 a = (a&2) | (cell_map(a >> 2) << 2);\r
0ace9b9a 572 return *(u16 *)(Pico_mcd->word_ram1M[1] + a);\r
af37bca8 573}\r
cc68a136 574\r
0ace9b9a 575static void PicoWriteM68k8_cell0(u32 a, u32 d)\r
af37bca8 576{\r
af37bca8 577 a = (a&3) | (cell_map(a >> 2) << 2);\r
0ace9b9a 578 Pico_mcd->word_ram1M[0][a ^ 1] = d;\r
af37bca8 579}\r
8022f53d 580\r
0ace9b9a 581static void PicoWriteM68k8_cell1(u32 a, u32 d)\r
af37bca8 582{\r
af37bca8 583 a = (a&3) | (cell_map(a >> 2) << 2);\r
0ace9b9a 584 Pico_mcd->word_ram1M[1][a ^ 1] = d;\r
af37bca8 585}\r
586\r
0ace9b9a 587static void PicoWriteM68k16_cell0(u32 a, u32 d)\r
588{\r
589 a = (a&3) | (cell_map(a >> 2) << 2);\r
590 *(u16 *)(Pico_mcd->word_ram1M[0] + a) = d;\r
591}\r
592\r
593static void PicoWriteM68k16_cell1(u32 a, u32 d)\r
594{\r
595 a = (a&3) | (cell_map(a >> 2) << 2);\r
596 *(u16 *)(Pico_mcd->word_ram1M[1] + a) = d;\r
597}\r
598#endif\r
599\r
af37bca8 600// RAM cart (40000 - 7fffff, optional)\r
601static u32 PicoReadM68k8_ramc(u32 a)\r
602{\r
603 u32 d = 0;\r
604 if (a == 0x400001) {\r
88fd63ad 605 if (Pico.sv.data != NULL)\r
af37bca8 606 d = 3; // 64k cart\r
607 return d;\r
8022f53d 608 }\r
609\r
af37bca8 610 if ((a & 0xfe0000) == 0x600000) {\r
88fd63ad 611 if (Pico.sv.data != NULL)\r
612 d = Pico.sv.data[((a >> 1) & 0xffff) + 0x2000];\r
af37bca8 613 return d;\r
8022f53d 614 }\r
615\r
af37bca8 616 if (a == 0x7fffff)\r
617 return Pico_mcd->m.bcram_reg;\r
cc68a136 618\r
af37bca8 619 elprintf(EL_UIO, "m68k unmapped r8 [%06x] @%06x", a, SekPc);\r
cc68a136 620 return d;\r
621}\r
622\r
af37bca8 623static u32 PicoReadM68k16_ramc(u32 a)\r
cc68a136 624{\r
af37bca8 625 elprintf(EL_ANOMALY, "ramcart r16: [%06x] @%06x", a, SekPcS68k);\r
626 return PicoReadM68k8_ramc(a + 1);\r
627}\r
cc68a136 628\r
af37bca8 629static void PicoWriteM68k8_ramc(u32 a, u32 d)\r
630{\r
631 if ((a & 0xfe0000) == 0x600000) {\r
88fd63ad 632 if (Pico.sv.data != NULL && (Pico_mcd->m.bcram_reg & 1)) {\r
633 Pico.sv.data[((a>>1) & 0xffff) + 0x2000] = d;\r
634 Pico.sv.changed = 1;\r
8022f53d 635 }\r
636 return;\r
637 }\r
638\r
af37bca8 639 if (a == 0x7fffff) {\r
640 Pico_mcd->m.bcram_reg = d;\r
8022f53d 641 return;\r
642 }\r
643\r
c7fd7bb8 644 elprintf(EL_UIO, "m68k unmapped w8 [%06x] %02x @%06x",\r
645 a, d & 0xff, SekPc);\r
cc68a136 646}\r
647\r
af37bca8 648static void PicoWriteM68k16_ramc(u32 a, u32 d)\r
cc68a136 649{\r
c7fd7bb8 650 elprintf(EL_ANOMALY, "ramcart w16: [%06x] %04x @%06x",\r
651 a, d, SekPcS68k);\r
af37bca8 652 PicoWriteM68k8_ramc(a + 1, d);\r
cc68a136 653}\r
654\r
af37bca8 655// IO/control/cd registers (a10000 - ...)\r
0ace9b9a 656#ifndef _ASM_CD_MEMORY_C\r
fa8fb754 657u32 PicoRead8_mcd_io(u32 a)\r
cc68a136 658{\r
af37bca8 659 u32 d;\r
660 if ((a & 0xff00) == 0x2000) { // a12000 - a120ff\r
661 d = m68k_reg_read16(a); // TODO: m68k_reg_read8\r
662 if (!(a & 1))\r
663 d >>= 8;\r
664 d &= 0xff;\r
c7fd7bb8 665 elprintf(EL_CDREGS, "m68k_regs r8: [%02x] %02x @%06x",\r
666 a & 0x3f, d, SekPc);\r
af37bca8 667 return d;\r
668 }\r
669\r
670 // fallback to default MD handler\r
671 return PicoRead8_io(a);\r
cc68a136 672}\r
673\r
fa8fb754 674u32 PicoRead16_mcd_io(u32 a)\r
cc68a136 675{\r
af37bca8 676 u32 d;\r
677 if ((a & 0xff00) == 0x2000) {\r
678 d = m68k_reg_read16(a);\r
c7fd7bb8 679 elprintf(EL_CDREGS, "m68k_regs r16: [%02x] %04x @%06x",\r
680 a & 0x3f, d, SekPc);\r
af37bca8 681 return d;\r
b542be46 682 }\r
cc68a136 683\r
af37bca8 684 return PicoRead16_io(a);\r
cc68a136 685}\r
686\r
fa8fb754 687void PicoWrite8_mcd_io(u32 a, u32 d)\r
cc68a136 688{\r
af37bca8 689 if ((a & 0xff00) == 0x2000) { // a12000 - a120ff\r
c7fd7bb8 690 elprintf(EL_CDREGS, "m68k_regs w8: [%02x] %02x @%06x",\r
691 a & 0x3f, d, SekPc);\r
2433f409 692 m68k_reg_write8(a, d);\r
693 return;\r
694 }\r
672ad671 695\r
334d9fb6 696 PicoWrite8_io(a, d);\r
cc68a136 697}\r
ab0607f7 698\r
fa8fb754 699void PicoWrite16_mcd_io(u32 a, u32 d)\r
cc68a136 700{\r
af37bca8 701 if ((a & 0xff00) == 0x2000) { // a12000 - a120ff\r
c7fd7bb8 702 elprintf(EL_CDREGS, "m68k_regs w16: [%02x] %04x @%06x",\r
703 a & 0x3f, d, SekPc);\r
08769494 704\r
334d9fb6 705 m68k_reg_write8(a, d >> 8);\r
08769494 706 if ((a & 0x3e) != 0x0e) // special case\r
707 m68k_reg_write8(a + 1, d & 0xff);\r
b542be46 708 return;\r
709 }\r
710\r
af37bca8 711 PicoWrite16_io(a, d);\r
cc68a136 712}\r
0ace9b9a 713#endif\r
cc68a136 714\r
721cd396 715// -----------------------------------------------------------------\r
af37bca8 716// Sub 68k\r
cc68a136 717// -----------------------------------------------------------------\r
718\r
af37bca8 719static u32 s68k_unmapped_read8(u32 a)\r
cc68a136 720{\r
af37bca8 721 elprintf(EL_UIO, "s68k unmapped r8 [%06x] @%06x", a, SekPc);\r
722 return 0;\r
cc68a136 723}\r
724\r
af37bca8 725static u32 s68k_unmapped_read16(u32 a)\r
cc68a136 726{\r
af37bca8 727 elprintf(EL_UIO, "s68k unmapped r16 [%06x] @%06x", a, SekPc);\r
728 return 0;\r
729}\r
4f265db7 730\r
af37bca8 731static void s68k_unmapped_write8(u32 a, u32 d)\r
732{\r
c7fd7bb8 733 elprintf(EL_UIO, "s68k unmapped w8 [%06x] %02x @%06x",\r
734 a, d & 0xff, SekPc);\r
af37bca8 735}\r
cc68a136 736\r
af37bca8 737static void s68k_unmapped_write16(u32 a, u32 d)\r
738{\r
c7fd7bb8 739 elprintf(EL_UIO, "s68k unmapped w16 [%06x] %04x @%06x",\r
740 a, d & 0xffff, SekPc);\r
af37bca8 741}\r
cc68a136 742\r
59991f11 743// PRG RAM protected range (000000 - 01fdff)?\r
0ace9b9a 744// XXX verify: ff00 or 1fe00 max?\r
745static void PicoWriteS68k8_prgwp(u32 a, u32 d)\r
746{\r
59991f11 747 if (a >= (Pico_mcd->s68k_regs[2] << 9))\r
0ace9b9a 748 Pico_mcd->prg_ram[a ^ 1] = d;\r
749}\r
750\r
751static void PicoWriteS68k16_prgwp(u32 a, u32 d)\r
752{\r
59991f11 753 if (a >= (Pico_mcd->s68k_regs[2] << 9))\r
0ace9b9a 754 *(u16 *)(Pico_mcd->prg_ram + a) = d;\r
755}\r
756\r
757#ifndef _ASM_CD_MEMORY_C\r
758\r
af37bca8 759// decode (080000 - 0bffff, in 1M mode)\r
0ace9b9a 760static u32 PicoReadS68k8_dec0(u32 a)\r
761{\r
762 u32 d = Pico_mcd->word_ram1M[0][((a >> 1) ^ 1) & 0x1ffff];\r
763 if (a & 1)\r
764 d &= 0x0f;\r
765 else\r
766 d >>= 4;\r
767 return d;\r
768}\r
769\r
770static u32 PicoReadS68k8_dec1(u32 a)\r
af37bca8 771{\r
0ace9b9a 772 u32 d = Pico_mcd->word_ram1M[1][((a >> 1) ^ 1) & 0x1ffff];\r
af37bca8 773 if (a & 1)\r
774 d &= 0x0f;\r
775 else\r
776 d >>= 4;\r
cc68a136 777 return d;\r
778}\r
779\r
0ace9b9a 780static u32 PicoReadS68k16_dec0(u32 a)\r
cc68a136 781{\r
0ace9b9a 782 u32 d = Pico_mcd->word_ram1M[0][((a >> 1) ^ 1) & 0x1ffff];\r
af37bca8 783 d |= d << 4;\r
784 d &= ~0xf0;\r
cc68a136 785 return d;\r
786}\r
ab0607f7 787\r
0ace9b9a 788static u32 PicoReadS68k16_dec1(u32 a)\r
0a051f55 789{\r
0ace9b9a 790 u32 d = Pico_mcd->word_ram1M[1][((a >> 1) ^ 1) & 0x1ffff];\r
791 d |= d << 4;\r
792 d &= ~0xf0;\r
793 return d;\r
0a051f55 794}\r
795\r
0ace9b9a 796/* check: jaguar xj 220 (draws entire world using decode) */\r
797#define mk_decode_w8(bank) \\r
798static void PicoWriteS68k8_dec_m0b##bank(u32 a, u32 d) \\r
799{ \\r
800 u8 *pd = &Pico_mcd->word_ram1M[bank][((a >> 1) ^ 1) & 0x1ffff]; \\r
801 \\r
802 if (!(a & 1)) \\r
803 *pd = (*pd & 0x0f) | (d << 4); \\r
804 else \\r
805 *pd = (*pd & 0xf0) | (d & 0x0f); \\r
806} \\r
807 \\r
808static void PicoWriteS68k8_dec_m1b##bank(u32 a, u32 d) \\r
809{ \\r
810 u8 *pd = &Pico_mcd->word_ram1M[bank][((a >> 1) ^ 1) & 0x1ffff]; \\r
811 u8 mask = (a & 1) ? 0x0f : 0xf0; \\r
812 \\r
813 if (!(*pd & mask) && (d & 0x0f)) /* underwrite */ \\r
814 PicoWriteS68k8_dec_m0b##bank(a, d); \\r
815} \\r
816 \\r
817static void PicoWriteS68k8_dec_m2b##bank(u32 a, u32 d) /* ...and m3? */ \\r
818{ \\r
819 if (d & 0x0f) /* overwrite */ \\r
820 PicoWriteS68k8_dec_m0b##bank(a, d); \\r
821}\r
0a051f55 822\r
0ace9b9a 823mk_decode_w8(0)\r
824mk_decode_w8(1)\r
825\r
826#define mk_decode_w16(bank) \\r
827static void PicoWriteS68k16_dec_m0b##bank(u32 a, u32 d) \\r
828{ \\r
829 u8 *pd = &Pico_mcd->word_ram1M[bank][((a >> 1) ^ 1) & 0x1ffff]; \\r
830 \\r
831 d &= 0x0f0f; \\r
832 *pd = d | (d >> 4); \\r
833} \\r
834 \\r
835static void PicoWriteS68k16_dec_m1b##bank(u32 a, u32 d) \\r
836{ \\r
837 u8 *pd = &Pico_mcd->word_ram1M[bank][((a >> 1) ^ 1) & 0x1ffff]; \\r
838 \\r
839 d &= 0x0f0f; /* underwrite */ \\r
840 if (!(*pd & 0xf0)) *pd |= d >> 4; \\r
841 if (!(*pd & 0x0f)) *pd |= d; \\r
842} \\r
843 \\r
844static void PicoWriteS68k16_dec_m2b##bank(u32 a, u32 d) \\r
845{ \\r
846 u8 *pd = &Pico_mcd->word_ram1M[bank][((a >> 1) ^ 1) & 0x1ffff]; \\r
847 \\r
848 d &= 0x0f0f; /* overwrite */ \\r
849 d |= d >> 4; \\r
850 \\r
851 if (!(d & 0xf0)) d |= *pd & 0xf0; \\r
852 if (!(d & 0x0f)) d |= *pd & 0x0f; \\r
853 *pd = d; \\r
854}\r
0a051f55 855\r
0ace9b9a 856mk_decode_w16(0)\r
857mk_decode_w16(1)\r
0a051f55 858\r
0ace9b9a 859#endif\r
0a051f55 860\r
af37bca8 861// backup RAM (fe0000 - feffff)\r
862static u32 PicoReadS68k8_bram(u32 a)\r
863{\r
864 return Pico_mcd->bram[(a>>1)&0x1fff];\r
865}\r
cc68a136 866\r
af37bca8 867static u32 PicoReadS68k16_bram(u32 a)\r
cc68a136 868{\r
af37bca8 869 u32 d;\r
870 elprintf(EL_ANOMALY, "FIXME: s68k_bram r16: [%06x] @%06x", a, SekPcS68k);\r
871 a = (a >> 1) & 0x1fff;\r
872 d = Pico_mcd->bram[a++];\r
873 d|= Pico_mcd->bram[a++] << 8; // probably wrong, TODO: verify\r
874 return d;\r
875}\r
cc68a136 876\r
af37bca8 877static void PicoWriteS68k8_bram(u32 a, u32 d)\r
878{\r
879 Pico_mcd->bram[(a >> 1) & 0x1fff] = d;\r
88fd63ad 880 Pico.sv.changed = 1;\r
af37bca8 881}\r
cc68a136 882\r
af37bca8 883static void PicoWriteS68k16_bram(u32 a, u32 d)\r
884{\r
885 elprintf(EL_ANOMALY, "s68k_bram w16: [%06x] %04x @%06x", a, d, SekPcS68k);\r
886 a = (a >> 1) & 0x1fff;\r
887 Pico_mcd->bram[a++] = d;\r
888 Pico_mcd->bram[a++] = d >> 8; // TODO: verify..\r
88fd63ad 889 Pico.sv.changed = 1;\r
af37bca8 890}\r
b5e5172d 891\r
0ace9b9a 892#ifndef _ASM_CD_MEMORY_C\r
893\r
af37bca8 894// PCM and registers (ff0000 - ffffff)\r
895static u32 PicoReadS68k8_pr(u32 a)\r
896{\r
897 u32 d = 0;\r
cc68a136 898\r
899 // regs\r
af37bca8 900 if ((a & 0xfe00) == 0x8000) {\r
cb4a513a 901 a &= 0x1ff;\r
af37bca8 902 if (a >= 0x0e && a < 0x30) {\r
903 d = Pico_mcd->s68k_regs[a];\r
30e8aac4 904 s68k_poll_detect(a & ~1, d);\r
ba6e8bfd 905 goto regs_done;\r
d0d47c5b 906 }\r
a93a80de 907 d = s68k_reg_read16(a & ~1);\r
af37bca8 908 if (!(a & 1))\r
909 d >>= 8;\r
ba6e8bfd 910\r
911regs_done:\r
912 d &= 0xff;\r
cc5ffc3c 913 elprintf(EL_CDREGS, "s68k_regs r8: [%02x] %02x @%06x",\r
ba6e8bfd 914 a, d, SekPcS68k);\r
915 return d;\r
d0d47c5b 916 }\r
917\r
4f265db7 918 // PCM\r
0ace9b9a 919 // XXX: verify: probably odd addrs only?\r
af37bca8 920 if ((a & 0x8000) == 0x0000) {\r
4f265db7 921 a &= 0x7fff;\r
922 if (a >= 0x2000)\r
af37bca8 923 d = Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a >> 1) & 0xfff];\r
33be04ca 924 else if (a >= 0x20)\r
925 d = pcd_pcm_read(a >> 1);\r
926\r
927 return d;\r
ab0607f7 928 }\r
929\r
af37bca8 930 return s68k_unmapped_read8(a);\r
cc68a136 931}\r
932\r
af37bca8 933static u32 PicoReadS68k16_pr(u32 a)\r
cc68a136 934{\r
af37bca8 935 u32 d = 0;\r
cc68a136 936\r
937 // regs\r
af37bca8 938 if ((a & 0xfe00) == 0x8000) {\r
cb4a513a 939 a &= 0x1fe;\r
a93a80de 940 d = s68k_reg_read16(a);\r
ba6e8bfd 941\r
cc5ffc3c 942 elprintf(EL_CDREGS, "s68k_regs r16: [%02x] %04x @%06x",\r
ba6e8bfd 943 a, d, SekPcS68k);\r
af37bca8 944 return d;\r
cc68a136 945 }\r
946\r
af37bca8 947 // PCM\r
948 if ((a & 0x8000) == 0x0000) {\r
af37bca8 949 a &= 0x7fff;\r
950 if (a >= 0x2000)\r
33be04ca 951 d = Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a >> 1) & 0xfff];\r
952 else if (a >= 0x20)\r
953 d = pcd_pcm_read(a >> 1);\r
954\r
af37bca8 955 return d;\r
d0d47c5b 956 }\r
957\r
af37bca8 958 return s68k_unmapped_read16(a);\r
959}\r
960\r
961static void PicoWriteS68k8_pr(u32 a, u32 d)\r
962{\r
963 // regs\r
964 if ((a & 0xfe00) == 0x8000) {\r
965 a &= 0x1ff;\r
cc5ffc3c 966 elprintf(EL_CDREGS, "s68k_regs w8: [%02x] %02x @%06x", a, d, SekPcS68k);\r
a93a80de 967 if (0x59 <= a && a < 0x68) // word regs\r
968 s68k_reg_write16(a & ~1, (d << 8) | d);\r
969 else\r
970 s68k_reg_write8(a, d);\r
d0d47c5b 971 return;\r
972 }\r
973\r
4f265db7 974 // PCM\r
af37bca8 975 if ((a & 0x8000) == 0x0000) {\r
4f265db7 976 a &= 0x7fff;\r
977 if (a >= 0x2000)\r
978 Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff] = d;\r
979 else if (a < 0x12)\r
33be04ca 980 pcd_pcm_write(a>>1, d);\r
ab0607f7 981 return;\r
982 }\r
983\r
af37bca8 984 s68k_unmapped_write8(a, d);\r
cc68a136 985}\r
ab0607f7 986\r
af37bca8 987static void PicoWriteS68k16_pr(u32 a, u32 d)\r
cc68a136 988{\r
cc68a136 989 // regs\r
af37bca8 990 if ((a & 0xfe00) == 0x8000) {\r
cb4a513a 991 a &= 0x1fe;\r
cc5ffc3c 992 elprintf(EL_CDREGS, "s68k_regs w16: [%02x] %04x @%06x", a, d, SekPcS68k);\r
a93a80de 993 s68k_reg_write16(a, d);\r
d0d47c5b 994 return;\r
995 }\r
996\r
4f265db7 997 // PCM\r
af37bca8 998 if ((a & 0x8000) == 0x0000) {\r
4f265db7 999 a &= 0x7fff;\r
af37bca8 1000 if (a >= 0x2000)\r
1001 Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff] = d;\r
1002 else if (a < 0x12)\r
33be04ca 1003 pcd_pcm_write(a>>1, d & 0xff);\r
ab0607f7 1004 return;\r
1005 }\r
1006\r
af37bca8 1007 s68k_unmapped_write16(a, d);\r
cc68a136 1008}\r
cc68a136 1009\r
0ace9b9a 1010#endif\r
1011\r
1012static const void *m68k_cell_read8[] = { PicoReadM68k8_cell0, PicoReadM68k8_cell1 };\r
1013static const void *m68k_cell_read16[] = { PicoReadM68k16_cell0, PicoReadM68k16_cell1 };\r
1014static const void *m68k_cell_write8[] = { PicoWriteM68k8_cell0, PicoWriteM68k8_cell1 };\r
1015static const void *m68k_cell_write16[] = { PicoWriteM68k16_cell0, PicoWriteM68k16_cell1 };\r
1016\r
1017static const void *s68k_dec_read8[] = { PicoReadS68k8_dec0, PicoReadS68k8_dec1 };\r
1018static const void *s68k_dec_read16[] = { PicoReadS68k16_dec0, PicoReadS68k16_dec1 };\r
1019\r
1020static const void *s68k_dec_write8[2][4] = {\r
1021 { PicoWriteS68k8_dec_m0b0, PicoWriteS68k8_dec_m1b0, PicoWriteS68k8_dec_m2b0, PicoWriteS68k8_dec_m2b0 },\r
1022 { PicoWriteS68k8_dec_m0b1, PicoWriteS68k8_dec_m1b1, PicoWriteS68k8_dec_m2b1, PicoWriteS68k8_dec_m2b1 },\r
1023};\r
1024\r
1025static const void *s68k_dec_write16[2][4] = {\r
1026 { PicoWriteS68k16_dec_m0b0, PicoWriteS68k16_dec_m1b0, PicoWriteS68k16_dec_m2b0, PicoWriteS68k16_dec_m2b0 },\r
1027 { PicoWriteS68k16_dec_m0b1, PicoWriteS68k16_dec_m1b1, PicoWriteS68k16_dec_m2b1, PicoWriteS68k16_dec_m2b1 },\r
1028};\r
1029\r
cc68a136 1030// -----------------------------------------------------------------\r
1031\r
4fb43555 1032static void remap_prg_window(u32 r1, u32 r3)\r
3aa1e148 1033{\r
af37bca8 1034 // PRG RAM\r
4fb43555 1035 if (r1 & 2) {\r
1036 void *bank = Pico_mcd->prg_ram_b[(r3 >> 6) & 3];\r
af37bca8 1037 cpu68k_map_all_ram(0x020000, 0x03ffff, bank, 0);\r
1038 }\r
1039 else {\r
1040 m68k_map_unmap(0x020000, 0x03ffff);\r
1041 }\r
0ace9b9a 1042}\r
1043\r
4fb43555 1044static void remap_word_ram(u32 r3)\r
0ace9b9a 1045{\r
1046 void *bank;\r
af37bca8 1047\r
1048 // WORD RAM\r
1049 if (!(r3 & 4)) {\r
1050 // 2M mode. XXX: allowing access in all cases for simplicity\r
1051 bank = Pico_mcd->word_ram2M;\r
1052 cpu68k_map_all_ram(0x200000, 0x23ffff, bank, 0);\r
1053 cpu68k_map_all_ram(0x080000, 0x0bffff, bank, 1);\r
1054 // TODO: handle 0x0c0000\r
1055 }\r
1056 else {\r
0ace9b9a 1057 int b0 = r3 & 1;\r
1058 int m = (r3 & 0x18) >> 3;\r
1059 bank = Pico_mcd->word_ram1M[b0];\r
af37bca8 1060 cpu68k_map_all_ram(0x200000, 0x21ffff, bank, 0);\r
0ace9b9a 1061 bank = Pico_mcd->word_ram1M[b0 ^ 1];\r
af37bca8 1062 cpu68k_map_all_ram(0x0c0000, 0x0effff, bank, 1);\r
1063 // "cell arrange" on m68k\r
0ace9b9a 1064 cpu68k_map_set(m68k_read8_map, 0x220000, 0x23ffff, m68k_cell_read8[b0], 1);\r
1065 cpu68k_map_set(m68k_read16_map, 0x220000, 0x23ffff, m68k_cell_read16[b0], 1);\r
1066 cpu68k_map_set(m68k_write8_map, 0x220000, 0x23ffff, m68k_cell_write8[b0], 1);\r
1067 cpu68k_map_set(m68k_write16_map, 0x220000, 0x23ffff, m68k_cell_write16[b0], 1);\r
af37bca8 1068 // "decode format" on s68k\r
0ace9b9a 1069 cpu68k_map_set(s68k_read8_map, 0x080000, 0x0bffff, s68k_dec_read8[b0 ^ 1], 1);\r
1070 cpu68k_map_set(s68k_read16_map, 0x080000, 0x0bffff, s68k_dec_read16[b0 ^ 1], 1);\r
1071 cpu68k_map_set(s68k_write8_map, 0x080000, 0x0bffff, s68k_dec_write8[b0 ^ 1][m], 1);\r
1072 cpu68k_map_set(s68k_write16_map, 0x080000, 0x0bffff, s68k_dec_write16[b0 ^ 1][m], 1);\r
af37bca8 1073 }\r
3aa1e148 1074}\r
b837b69b 1075\r
ae214f1c 1076void pcd_state_loaded_mem(void)\r
0ace9b9a 1077{\r
4fb43555 1078 u32 r3 = Pico_mcd->s68k_regs[3];\r
0ace9b9a 1079\r
1080 /* after load events */\r
1081 if (r3 & 4) // 1M mode?\r
1082 wram_2M_to_1M(Pico_mcd->word_ram2M);\r
1083 remap_word_ram(r3);\r
4fb43555 1084 remap_prg_window(Pico_mcd->m.busreq, r3);\r
ba6e8bfd 1085 Pico_mcd->m.dmna_ret_2m &= 3;\r
0ace9b9a 1086\r
1087 // restore hint vector\r
1088 *(unsigned short *)(Pico_mcd->bios + 0x72) = Pico_mcd->m.hint_vector;\r
1089}\r
1090\r
9037e45d 1091#ifdef EMU_M68K\r
1092static void m68k_mem_setup_cd(void);\r
1093#endif\r
1094\r
eff55556 1095PICO_INTERNAL void PicoMemSetupCD(void)\r
b837b69b 1096{\r
af37bca8 1097 // setup default main68k map\r
1098 PicoMemSetup();\r
1099\r
af37bca8 1100 // main68k map (BIOS mapped by PicoMemSetup()):\r
1101 // RAM cart\r
1102 if (PicoOpt & POPT_EN_MCD_RAMCART) {\r
1103 cpu68k_map_set(m68k_read8_map, 0x400000, 0x7fffff, PicoReadM68k8_ramc, 1);\r
1104 cpu68k_map_set(m68k_read16_map, 0x400000, 0x7fffff, PicoReadM68k16_ramc, 1);\r
1105 cpu68k_map_set(m68k_write8_map, 0x400000, 0x7fffff, PicoWriteM68k8_ramc, 1);\r
1106 cpu68k_map_set(m68k_write16_map, 0x400000, 0x7fffff, PicoWriteM68k16_ramc, 1);\r
1107 }\r
1108\r
1109 // registers/IO:\r
fa8fb754 1110 cpu68k_map_set(m68k_read8_map, 0xa10000, 0xa1ffff, PicoRead8_mcd_io, 1);\r
1111 cpu68k_map_set(m68k_read16_map, 0xa10000, 0xa1ffff, PicoRead16_mcd_io, 1);\r
1112 cpu68k_map_set(m68k_write8_map, 0xa10000, 0xa1ffff, PicoWrite8_mcd_io, 1);\r
1113 cpu68k_map_set(m68k_write16_map, 0xa10000, 0xa1ffff, PicoWrite16_mcd_io, 1);\r
af37bca8 1114\r
1115 // sub68k map\r
1116 cpu68k_map_set(s68k_read8_map, 0x000000, 0xffffff, s68k_unmapped_read8, 1);\r
1117 cpu68k_map_set(s68k_read16_map, 0x000000, 0xffffff, s68k_unmapped_read16, 1);\r
1118 cpu68k_map_set(s68k_write8_map, 0x000000, 0xffffff, s68k_unmapped_write8, 1);\r
1119 cpu68k_map_set(s68k_write16_map, 0x000000, 0xffffff, s68k_unmapped_write16, 1);\r
1120\r
1121 // PRG RAM\r
1122 cpu68k_map_set(s68k_read8_map, 0x000000, 0x07ffff, Pico_mcd->prg_ram, 0);\r
1123 cpu68k_map_set(s68k_read16_map, 0x000000, 0x07ffff, Pico_mcd->prg_ram, 0);\r
1124 cpu68k_map_set(s68k_write8_map, 0x000000, 0x07ffff, Pico_mcd->prg_ram, 0);\r
1125 cpu68k_map_set(s68k_write16_map, 0x000000, 0x07ffff, Pico_mcd->prg_ram, 0);\r
59991f11 1126 cpu68k_map_set(s68k_write8_map, 0x000000, 0x01ffff, PicoWriteS68k8_prgwp, 1);\r
1127 cpu68k_map_set(s68k_write16_map, 0x000000, 0x01ffff, PicoWriteS68k16_prgwp, 1);\r
af37bca8 1128\r
1129 // BRAM\r
1130 cpu68k_map_set(s68k_read8_map, 0xfe0000, 0xfeffff, PicoReadS68k8_bram, 1);\r
1131 cpu68k_map_set(s68k_read16_map, 0xfe0000, 0xfeffff, PicoReadS68k16_bram, 1);\r
1132 cpu68k_map_set(s68k_write8_map, 0xfe0000, 0xfeffff, PicoWriteS68k8_bram, 1);\r
1133 cpu68k_map_set(s68k_write16_map, 0xfe0000, 0xfeffff, PicoWriteS68k16_bram, 1);\r
1134\r
1135 // PCM, regs\r
1136 cpu68k_map_set(s68k_read8_map, 0xff0000, 0xffffff, PicoReadS68k8_pr, 1);\r
1137 cpu68k_map_set(s68k_read16_map, 0xff0000, 0xffffff, PicoReadS68k16_pr, 1);\r
1138 cpu68k_map_set(s68k_write8_map, 0xff0000, 0xffffff, PicoWriteS68k8_pr, 1);\r
1139 cpu68k_map_set(s68k_write16_map, 0xff0000, 0xffffff, PicoWriteS68k16_pr, 1);\r
f53f286a 1140\r
0ace9b9a 1141 // RAMs\r
1142 remap_word_ram(1);\r
1143\r
b837b69b 1144#ifdef EMU_C68K\r
b837b69b 1145 // s68k\r
5e89f0f5 1146 PicoCpuCS68k.read8 = (void *)s68k_read8_map;\r
1147 PicoCpuCS68k.read16 = (void *)s68k_read16_map;\r
1148 PicoCpuCS68k.read32 = (void *)s68k_read16_map;\r
1149 PicoCpuCS68k.write8 = (void *)s68k_write8_map;\r
1150 PicoCpuCS68k.write16 = (void *)s68k_write16_map;\r
1151 PicoCpuCS68k.write32 = (void *)s68k_write16_map;\r
1152 PicoCpuCS68k.checkpc = NULL; /* unused */\r
1153 PicoCpuCS68k.fetch8 = NULL;\r
1154 PicoCpuCS68k.fetch16 = NULL;\r
1155 PicoCpuCS68k.fetch32 = NULL;\r
b837b69b 1156#endif\r
3aa1e148 1157#ifdef EMU_F68K\r
3aa1e148 1158 // s68k\r
af37bca8 1159 PicoCpuFS68k.read_byte = s68k_read8;\r
1160 PicoCpuFS68k.read_word = s68k_read16;\r
1161 PicoCpuFS68k.read_long = s68k_read32;\r
1162 PicoCpuFS68k.write_byte = s68k_write8;\r
1163 PicoCpuFS68k.write_word = s68k_write16;\r
1164 PicoCpuFS68k.write_long = s68k_write32;\r
3aa1e148 1165\r
1166 // setup FAME fetchmap\r
1167 {\r
ba11a481 1168#ifdef __clang__\r
1169 volatile // prevent strange relocs from clang\r
1170#endif\r
1171 unsigned long ptr_ram = (unsigned long)PicoMem.ram;\r
3aa1e148 1172 int i;\r
ba11a481 1173\r
3aa1e148 1174 // M68k\r
1175 // by default, point everything to fitst 64k of ROM (BIOS)\r
1176 for (i = 0; i < M68K_FETCHBANK1; i++)\r
be26eb23 1177 PicoCpuFM68k.Fetch[i] = (unsigned long)Pico.rom - (i<<(24-FAMEC_FETCHBITS));\r
3aa1e148 1178 // now real ROM (BIOS)\r
1179 for (i = 0; i < M68K_FETCHBANK1 && (i<<(24-FAMEC_FETCHBITS)) < Pico.romsize; i++)\r
be26eb23 1180 PicoCpuFM68k.Fetch[i] = (unsigned long)Pico.rom;\r
3aa1e148 1181 // .. and RAM\r
1182 for (i = M68K_FETCHBANK1*14/16; i < M68K_FETCHBANK1; i++)\r
ba11a481 1183 PicoCpuFM68k.Fetch[i] = ptr_ram - (i<<(24-FAMEC_FETCHBITS));\r
3aa1e148 1184 // S68k\r
1185 // PRG RAM is default\r
1186 for (i = 0; i < M68K_FETCHBANK1; i++)\r
be26eb23 1187 PicoCpuFS68k.Fetch[i] = (unsigned long)Pico_mcd->prg_ram - (i<<(24-FAMEC_FETCHBITS));\r
3aa1e148 1188 // real PRG RAM\r
1189 for (i = 0; i < M68K_FETCHBANK1 && (i<<(24-FAMEC_FETCHBITS)) < 0x80000; i++)\r
be26eb23 1190 PicoCpuFS68k.Fetch[i] = (unsigned long)Pico_mcd->prg_ram;\r
3aa1e148 1191 // WORD RAM 2M area\r
1192 for (i = M68K_FETCHBANK1*0x08/0x100; i < M68K_FETCHBANK1 && (i<<(24-FAMEC_FETCHBITS)) < 0xc0000; i++)\r
be26eb23 1193 PicoCpuFS68k.Fetch[i] = (unsigned long)Pico_mcd->word_ram2M - 0x80000;\r
0ace9b9a 1194 // remap_word_ram() will setup word ram for both\r
3aa1e148 1195 }\r
1196#endif\r
9037e45d 1197#ifdef EMU_M68K\r
1198 m68k_mem_setup_cd();\r
1199#endif\r
b837b69b 1200}\r
1201\r
1202\r
cc68a136 1203#ifdef EMU_M68K\r
af37bca8 1204u32 m68k_read8(u32 a);\r
1205u32 m68k_read16(u32 a);\r
1206u32 m68k_read32(u32 a);\r
1207void m68k_write8(u32 a, u8 d);\r
1208void m68k_write16(u32 a, u16 d);\r
1209void m68k_write32(u32 a, u32 d);\r
1210\r
9037e45d 1211static unsigned int PicoReadCD8w (unsigned int a) {\r
af37bca8 1212 return m68ki_cpu_p == &PicoCpuMS68k ? s68k_read8(a) : m68k_read8(a);\r
cc68a136 1213}\r
9037e45d 1214static unsigned int PicoReadCD16w(unsigned int a) {\r
af37bca8 1215 return m68ki_cpu_p == &PicoCpuMS68k ? s68k_read16(a) : m68k_read16(a);\r
cc68a136 1216}\r
9037e45d 1217static unsigned int PicoReadCD32w(unsigned int a) {\r
af37bca8 1218 return m68ki_cpu_p == &PicoCpuMS68k ? s68k_read32(a) : m68k_read32(a);\r
cc68a136 1219}\r
9037e45d 1220static void PicoWriteCD8w (unsigned int a, unsigned char d) {\r
af37bca8 1221 if (m68ki_cpu_p == &PicoCpuMS68k) s68k_write8(a, d); else m68k_write8(a, d);\r
cc68a136 1222}\r
9037e45d 1223static void PicoWriteCD16w(unsigned int a, unsigned short d) {\r
af37bca8 1224 if (m68ki_cpu_p == &PicoCpuMS68k) s68k_write16(a, d); else m68k_write16(a, d);\r
cc68a136 1225}\r
9037e45d 1226static void PicoWriteCD32w(unsigned int a, unsigned int d) {\r
af37bca8 1227 if (m68ki_cpu_p == &PicoCpuMS68k) s68k_write32(a, d); else m68k_write32(a, d);\r
cc68a136 1228}\r
1229\r
9037e45d 1230extern unsigned int (*pm68k_read_memory_8) (unsigned int address);\r
1231extern unsigned int (*pm68k_read_memory_16)(unsigned int address);\r
1232extern unsigned int (*pm68k_read_memory_32)(unsigned int address);\r
1233extern void (*pm68k_write_memory_8) (unsigned int address, unsigned char value);\r
1234extern void (*pm68k_write_memory_16)(unsigned int address, unsigned short value);\r
1235extern void (*pm68k_write_memory_32)(unsigned int address, unsigned int value);\r
9037e45d 1236\r
1237static void m68k_mem_setup_cd(void)\r
1238{\r
1239 pm68k_read_memory_8 = PicoReadCD8w;\r
1240 pm68k_read_memory_16 = PicoReadCD16w;\r
1241 pm68k_read_memory_32 = PicoReadCD32w;\r
1242 pm68k_write_memory_8 = PicoWriteCD8w;\r
1243 pm68k_write_memory_16 = PicoWriteCD16w;\r
1244 pm68k_write_memory_32 = PicoWriteCD32w;\r
9037e45d 1245}\r
cc68a136 1246#endif // EMU_M68K\r
1247\r
ae214f1c 1248// vim:shiftwidth=2:ts=2:expandtab\r