drc: tune invalidation
[picodrive.git] / pico / pico.c
CommitLineData
cff531af 1/*\r
2 * PicoDrive\r
3 * (c) Copyright Dave, 2004\r
4 * (C) notaz, 2006-2010\r
5 *\r
6 * This work is licensed under the terms of MAME license.\r
7 * See COPYING file in the top-level directory.\r
8 */\r
cc68a136 9\r
efcba75f 10#include "pico_int.h"\r
cc68a136 11#include "sound/ym2612.h"\r
12\r
cc68a136 13struct Pico Pico;\r
5e128c6d 14int PicoOpt; \r
15int PicoSkipFrame; // skip rendering frame?\r
2b02d6e5 16int PicoPad[2]; // Joypads, format is MXYZ SACB RLDU\r
5f9a0d16 17int PicoPadInt[2]; // internal copy\r
5e128c6d 18int PicoAHW; // active addon hardware: PAHW_*\r
19int PicoRegionOverride; // override the region detection 0: Auto, 1: Japan NTSC, 2: Japan PAL, 4: US, 8: Europe\r
20int PicoAutoRgnOrder;\r
21\r
22struct PicoSRAM SRam;\r
23int emustatus; // rapid_ym2612, multi_ym_updates\r
24int scanlines_total;\r
602133e1 25\r
f8ef8ff7 26void (*PicoWriteSound)(int len) = NULL; // called at the best time to send sound buffer (PsndOut) to hardware\r
27void (*PicoResetHook)(void) = NULL;\r
b0677887 28void (*PicoLineHook)(void) = NULL;\r
cc68a136 29\r
cc68a136 30// to be called once on emu init\r
2aa27095 31void PicoInit(void)\r
cc68a136 32{\r
33 // Blank space for state:\r
34 memset(&Pico,0,sizeof(Pico));\r
35 memset(&PicoPad,0,sizeof(PicoPad));\r
5f9a0d16 36 memset(&PicoPadInt,0,sizeof(PicoPadInt));\r
cc68a136 37\r
38 // Init CPUs:\r
39 SekInit();\r
40 z80_init(); // init even if we aren't going to use it\r
41\r
cc68a136 42 PicoInitMCD();\r
e807ac75 43 PicoSVPInit();\r
be2c4208 44 Pico32xInit();\r
cc68a136 45}\r
46\r
47// to be called once on emu exit\r
48void PicoExit(void)\r
49{\r
602133e1 50 if (PicoAHW & PAHW_MCD)\r
4f265db7 51 PicoExitMCD();\r
ca482e5d 52 PicoCartUnload();\r
cc68a136 53 z80_exit();\r
54\r
45f2f245 55 if (SRam.data)\r
56 free(SRam.data);\r
cc68a136 57}\r
58\r
1cb1584b 59void PicoPower(void)\r
60{\r
053fd9b4 61 Pico.m.frame_count = 0;\r
62\r
1cb1584b 63 // clear all memory of the emulated machine\r
b8a1c09a 64 memset(&Pico.ram,0,(unsigned char *)&Pico.rom - Pico.ram);\r
1cb1584b 65\r
66 memset(&Pico.video,0,sizeof(Pico.video));\r
67 memset(&Pico.m,0,sizeof(Pico.m));\r
68\r
69 Pico.video.pending_ints=0;\r
70 z80_reset();\r
71\r
72 // default VDP register values (based on Fusion)\r
73 Pico.video.reg[0] = Pico.video.reg[1] = 0x04;\r
74 Pico.video.reg[0xc] = 0x81;\r
75 Pico.video.reg[0xf] = 0x02;\r
76\r
602133e1 77 if (PicoAHW & PAHW_MCD)\r
1cb1584b 78 PicoPowerMCD();\r
79\r
db1d3564 80 if (PicoOpt & POPT_EN_32X)\r
974fdb5b 81 PicoPower32x();\r
82\r
1cb1584b 83 PicoReset();\r
84}\r
85\r
1e6b5e39 86PICO_INTERNAL void PicoDetectRegion(void)\r
cc68a136 87{\r
1e6b5e39 88 int support=0, hw=0, i;\r
cc68a136 89 unsigned char pal=0;\r
cc68a136 90\r
1e6b5e39 91 if (PicoRegionOverride)\r
cc68a136 92 {\r
93 support = PicoRegionOverride;\r
94 }\r
95 else\r
96 {\r
97 // Read cartridge region data:\r
af37bca8 98 unsigned short *rd = (unsigned short *)(Pico.rom + 0x1f0);\r
99 int region = (rd[0] << 16) | rd[1];\r
cc68a136 100\r
af37bca8 101 for (i = 0; i < 4; i++)\r
cc68a136 102 {\r
af37bca8 103 int c;\r
cc68a136 104\r
af37bca8 105 c = region >> (i<<3);\r
106 c &= 0xff;\r
107 if (c <= ' ') continue;\r
cc68a136 108\r
51a902ae 109 if (c=='J') support|=1;\r
110 else if (c=='U') support|=4;\r
111 else if (c=='E') support|=8;\r
112 else if (c=='j') {support|=1; break; }\r
113 else if (c=='u') {support|=4; break; }\r
114 else if (c=='e') {support|=8; break; }\r
cc68a136 115 else\r
116 {\r
117 // New style code:\r
118 char s[2]={0,0};\r
119 s[0]=(char)c;\r
120 support|=strtol(s,NULL,16);\r
121 }\r
122 }\r
123 }\r
124\r
51a902ae 125 // auto detection order override\r
126 if (PicoAutoRgnOrder) {\r
127 if (((PicoAutoRgnOrder>>0)&0xf) & support) support = (PicoAutoRgnOrder>>0)&0xf;\r
128 else if (((PicoAutoRgnOrder>>4)&0xf) & support) support = (PicoAutoRgnOrder>>4)&0xf;\r
129 else if (((PicoAutoRgnOrder>>8)&0xf) & support) support = (PicoAutoRgnOrder>>8)&0xf;\r
130 }\r
131\r
cc68a136 132 // Try to pick the best hardware value for English/50hz:\r
133 if (support&8) { hw=0xc0; pal=1; } // Europe\r
134 else if (support&4) hw=0x80; // USA\r
135 else if (support&2) { hw=0x40; pal=1; } // Japan PAL\r
136 else if (support&1) hw=0x00; // Japan NTSC\r
137 else hw=0x80; // USA\r
138\r
139 Pico.m.hardware=(unsigned char)(hw|0x20); // No disk attached\r
140 Pico.m.pal=pal;\r
1e6b5e39 141}\r
142\r
143int PicoReset(void)\r
144{\r
2ec9bec5 145 if (Pico.romsize <= 0)\r
146 return 1;\r
1e6b5e39 147\r
6d797957 148#ifdef DRC_CMP\r
149 PicoOpt |= POPT_DIS_VDP_FIFO|POPT_DIS_IDLE_DET;\r
150#endif\r
151\r
1e6b5e39 152 /* must call now, so that banking is reset, and correct vectors get fetched */\r
2ec9bec5 153 if (PicoResetHook)\r
154 PicoResetHook();\r
1e6b5e39 155\r
5f9a0d16 156 memset(&PicoPadInt,0,sizeof(PicoPadInt));\r
2ec9bec5 157 emustatus = 0;\r
158\r
159 if (PicoAHW & PAHW_SMS) {\r
160 PicoResetMS();\r
161 return 0;\r
162 }\r
163\r
164 SekReset();\r
1e6b5e39 165 // s68k doesn't have the TAS quirk, so we just globally set normal TAS handler in MCD mode (used by Batman games).\r
166 SekSetRealTAS(PicoAHW & PAHW_MCD);\r
167 SekCycleCntT=0;\r
168\r
169 if (PicoAHW & PAHW_MCD)\r
170 // needed for MCD to reset properly, probably some bug hides behind this..\r
171 memset(Pico.ioports,0,sizeof(Pico.ioports));\r
1e6b5e39 172\r
173 Pico.m.dirtyPal = 1;\r
174\r
1832075e 175 Pico.m.z80_bank68k = 0;\r
af37bca8 176 Pico.m.z80_reset = 1;\r
1832075e 177 memset(Pico.zram, 0, sizeof(Pico.zram)); // ??\r
178\r
1e6b5e39 179 PicoDetectRegion();\r
e5fa9817 180 Pico.video.status = 0x3428 | Pico.m.pal; // 'always set' bits | vblank | collision | pal\r
cc68a136 181\r
9d917eea 182 PsndReset(); // pal must be known here\r
cc68a136 183\r
1cb1584b 184 // create an empty "dma" to cause 68k exec start at random frame location\r
2ec9bec5 185 if (Pico.m.dma_xfers == 0 && !(PicoOpt & POPT_DIS_VDP_FIFO))\r
1cb1584b 186 Pico.m.dma_xfers = rand() & 0x1fff;\r
187\r
5ed2a20e 188 SekFinishIdleDet();\r
189\r
602133e1 190 if (PicoAHW & PAHW_MCD) {\r
1cb1584b 191 PicoResetMCD();\r
cc68a136 192 return 0;\r
193 }\r
5ed2a20e 194\r
195 // reinit, so that checksum checks pass\r
196 if (!(PicoOpt & POPT_DIS_IDLE_DET))\r
197 SekInitIdleDet();\r
cc68a136 198\r
1f1ff763 199 if (PicoOpt & POPT_EN_32X)\r
be2c4208 200 PicoReset32x();\r
be2c4208 201\r
1dceadae 202 // reset sram state; enable sram access by default if it doesn't overlap with ROM\r
45f2f245 203 Pico.m.sram_reg = 0;\r
204 if ((SRam.flags & SRF_EEPROM) || Pico.romsize <= SRam.start)\r
205 Pico.m.sram_reg |= SRR_MAPPED;\r
cc68a136 206\r
45f2f245 207 if (SRam.flags & SRF_ENABLED)\r
208 elprintf(EL_STATUS, "sram: %06x - %06x; eeprom: %i", SRam.start, SRam.end,\r
209 !!(SRam.flags & SRF_EEPROM));\r
cc68a136 210\r
211 return 0;\r
212}\r
213\r
46bcb899 214// flush config changes before emu loop starts\r
5e128c6d 215void PicoLoopPrepare(void)\r
216{\r
217 if (PicoRegionOverride)\r
218 // force setting possibly changed..\r
219 Pico.m.pal = (PicoRegionOverride == 2 || PicoRegionOverride == 8) ? 1 : 0;\r
220\r
221 // FIXME: PAL has 313 scanlines..\r
222 scanlines_total = Pico.m.pal ? 312 : 262;\r
db1d3564 223\r
2446536b 224 Pico.m.dirtyPal = 1;\r
225 rendstatus_old = -1;\r
5e128c6d 226}\r
227\r
1dceadae 228\r
69996cb7 229// dma2vram settings are just hacks to unglitch Legend of Galahad (needs <= 104 to work)\r
230// same for Outrunners (92-121, when active is set to 24)\r
48df6e9e 231// 96 is VR hack\r
69996cb7 232static const int dma_timings[] = {\r
053fd9b4 233 96, 167, 166, 83, // vblank: 32cell: dma2vram dma2[vs|c]ram vram_fill vram_copy\r
234 102, 205, 204, 102, // vblank: 40cell:\r
235 16, 16, 15, 8, // active: 32cell:\r
236 24, 18, 17, 9 // ...\r
4f672280 237};\r
238\r
69996cb7 239static const int dma_bsycles[] = {\r
053fd9b4 240 (488<<8)/96, (488<<8)/167, (488<<8)/166, (488<<8)/83,\r
241 (488<<8)/102, (488<<8)/205, (488<<8)/204, (488<<8)/102,\r
242 (488<<8)/16, (488<<8)/16, (488<<8)/15, (488<<8)/8,\r
243 (488<<8)/24, (488<<8)/18, (488<<8)/17, (488<<8)/9\r
312e9ce1 244};\r
245\r
eff55556 246PICO_INTERNAL int CheckDMA(void)\r
4f672280 247{\r
69996cb7 248 int burn = 0, xfers_can, dma_op = Pico.video.reg[0x17]>>6; // see gens for 00 and 01 modes\r
249 int xfers = Pico.m.dma_xfers;\r
312e9ce1 250 int dma_op1;\r
4f672280 251\r
312e9ce1 252 if(!(dma_op&2)) dma_op = (Pico.video.type==1) ? 0 : 1; // setting dma_timings offset here according to Gens\r
253 dma_op1 = dma_op;\r
254 if(Pico.video.reg[12] & 1) dma_op |= 4; // 40 cell mode?\r
255 if(!(Pico.video.status&8)&&(Pico.video.reg[1]&0x40)) dma_op|=8; // active display?\r
69996cb7 256 xfers_can = dma_timings[dma_op];\r
9761a7d0 257 if(xfers <= xfers_can)\r
258 {\r
4f672280 259 if(dma_op&2) Pico.video.status&=~2; // dma no longer busy\r
260 else {\r
69996cb7 261 burn = xfers * dma_bsycles[dma_op] >> 8; // have to be approximate because can't afford division..\r
4f672280 262 }\r
69996cb7 263 Pico.m.dma_xfers = 0;\r
4f672280 264 } else {\r
265 if(!(dma_op&2)) burn = 488;\r
69996cb7 266 Pico.m.dma_xfers -= xfers_can;\r
4f672280 267 }\r
268\r
69996cb7 269 elprintf(EL_VDPDMA, "~Dma %i op=%i can=%i burn=%i [%i]", Pico.m.dma_xfers, dma_op1, xfers_can, burn, SekCyclesDone());\r
312e9ce1 270 //dprintf("~aim: %i, cnt: %i", SekCycleAim, SekCycleCnt);\r
271 return burn;\r
4f672280 272}\r
273\r
efcba75f 274#include "pico_cmn.c"\r
4b9c5888 275\r
276int z80stopCycle;\r
277int z80_cycle_cnt; /* 'done' z80 cycles before z80_run() */\r
278int z80_cycle_aim;\r
279int z80_scanline;\r
280int z80_scanline_cycles; /* cycles done until z80_scanline */\r
281\r
282/* sync z80 to 68k */\r
283PICO_INTERNAL void PicoSyncZ80(int m68k_cycles_done)\r
cc68a136 284{\r
4b9c5888 285 int cnt;\r
286 z80_cycle_aim = cycles_68k_to_z80(m68k_cycles_done);\r
287 cnt = z80_cycle_aim - z80_cycle_cnt;\r
cc68a136 288\r
f6c49d38 289 pprof_start(z80);\r
290\r
e5fa9817 291 elprintf(EL_BUSREQ, "z80 sync %i (%i|%i -> %i|%i)", cnt, z80_cycle_cnt, z80_cycle_cnt / 228,\r
4b9c5888 292 z80_cycle_aim, z80_cycle_aim / 228);\r
293\r
294 if (cnt > 0)\r
295 z80_cycle_cnt += z80_run(cnt);\r
f6c49d38 296\r
297 pprof_end(z80);\r
cc68a136 298}\r
299\r
4b9c5888 300\r
2aa27095 301void PicoFrame(void)\r
cc68a136 302{\r
f6c49d38 303 pprof_start(frame);\r
304\r
8c1952f0 305 Pico.m.frame_count++;\r
306\r
19954be1 307 if (PicoAHW & PAHW_SMS) {\r
308 PicoFrameMS();\r
f6c49d38 309 goto end;\r
cc68a136 310 }\r
19954be1 311\r
974fdb5b 312 // TODO: MCD+32X\r
19954be1 313 if (PicoAHW & PAHW_MCD) {\r
314 PicoFrameMCD();\r
f6c49d38 315 goto end;\r
3e49ffd0 316 }\r
cc68a136 317\r
974fdb5b 318 if (PicoAHW & PAHW_32X) {\r
319 PicoFrame32x();\r
f6c49d38 320 goto end;\r
974fdb5b 321 }\r
322\r
cc68a136 323 //if(Pico.video.reg[12]&0x2) Pico.video.status ^= 0x10; // change odd bit in interlace mode\r
324\r
19954be1 325 PicoFrameStart();\r
2aa27095 326 PicoFrameHints();\r
f6c49d38 327\r
328end:\r
329 pprof_end(frame);\r
cc68a136 330}\r
331\r
a12e0116 332void PicoFrameDrawOnly(void)\r
333{\r
87b0845f 334 if (!(PicoAHW & PAHW_SMS)) {\r
335 PicoFrameStart();\r
336 PicoDrawSync(223, 0);\r
337 } else {\r
338 PicoFrameDrawOnlyMS();\r
339 }\r
a12e0116 340}\r
341\r
4609d0cd 342void PicoGetInternal(pint_t which, pint_ret_t *r)\r
8e5427a0 343{\r
344 switch (which)\r
345 {\r
4609d0cd 346 case PI_ROM: r->vptr = Pico.rom; break;\r
347 case PI_ISPAL: r->vint = Pico.m.pal; break;\r
348 case PI_IS40_CELL: r->vint = Pico.video.reg[12]&1; break;\r
349 case PI_IS240_LINES: r->vint = Pico.m.pal && (Pico.video.reg[1]&8); break;\r
8e5427a0 350 }\r
8e5427a0 351}\r
352\r
66fdc0f0 353// callback to output message from emu\r
354void (*PicoMessage)(const char *msg)=NULL;\r
cc68a136 355\r