cff531af |
1 | /* |
2 | * PicoDrive |
ae214f1c |
3 | * (C) notaz, 2007,2013 |
cff531af |
4 | * |
5 | * This work is licensed under the terms of MAME license. |
6 | * See COPYING file in the top-level directory. |
7 | */ |
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8 | |
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9 | #include "../pico_int.h" |
43e6eaad |
10 | #include "../sound/ym2612.h" |
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11 | |
76276b0b |
12 | extern unsigned char formatted_bram[4*0x10]; |
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13 | |
14 | static unsigned int m68k_cycle_mult; |
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15 | |
721cd396 |
16 | void (*PicoMCDopenTray)(void) = NULL; |
d687ef50 |
17 | void (*PicoMCDcloseTray)(void) = NULL; |
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18 | |
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19 | |
2aa27095 |
20 | PICO_INTERNAL void PicoInitMCD(void) |
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21 | { |
22 | SekInitS68k(); |
23 | Init_CD_Driver(); |
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24 | } |
25 | |
eff55556 |
26 | PICO_INTERNAL void PicoExitMCD(void) |
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27 | { |
28 | End_CD_Driver(); |
29 | } |
30 | |
1cb1584b |
31 | PICO_INTERNAL void PicoPowerMCD(void) |
32 | { |
33 | int fmt_size = sizeof(formatted_bram); |
34 | memset(Pico_mcd->prg_ram, 0, sizeof(Pico_mcd->prg_ram)); |
35 | memset(Pico_mcd->word_ram2M, 0, sizeof(Pico_mcd->word_ram2M)); |
36 | memset(Pico_mcd->pcm_ram, 0, sizeof(Pico_mcd->pcm_ram)); |
37 | memset(Pico_mcd->bram, 0, sizeof(Pico_mcd->bram)); |
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38 | memcpy(Pico_mcd->bram + sizeof(Pico_mcd->bram) - fmt_size, |
39 | formatted_bram, fmt_size); |
51a902ae |
40 | memset(Pico_mcd->s68k_regs, 0, sizeof(Pico_mcd->s68k_regs)); |
4f265db7 |
41 | memset(&Pico_mcd->pcm, 0, sizeof(Pico_mcd->pcm)); |
5c69a605 |
42 | memset(&Pico_mcd->m, 0, sizeof(Pico_mcd->m)); |
51a902ae |
43 | |
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44 | // cold reset state (tested) |
45 | Pico_mcd->m.state_flags = PCD_ST_S68K_RST; |
46 | Pico_mcd->m.busreq = 2; // busreq on, s68k in reset |
47 | Pico_mcd->s68k_regs[3] = 1; // 2M word RAM mode, m68k access |
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48 | memset(Pico_mcd->bios + 0x70, 0xff, 4); |
49 | } |
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50 | |
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51 | PICO_INTERNAL int PicoResetMCD(void) |
52 | { |
53 | // ?? |
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54 | Reset_CD(); |
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55 | LC89510_Reset(); |
51a902ae |
56 | gfx_cd_reset(); |
3aa1e148 |
57 | #ifdef _ASM_CD_MEMORY_C |
00bd648e |
58 | //PicoMemResetCDdecode(1); // don't have to call this in 2M mode |
4ff2d527 |
59 | #endif |
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60 | |
6cadc2da |
61 | // use SRam.data for RAM cart |
af37bca8 |
62 | if (PicoOpt & POPT_EN_MCD_RAMCART) { |
d6114368 |
63 | if (SRam.data == NULL) |
64 | SRam.data = calloc(1, 0x12000); |
65 | } |
66 | else if (SRam.data != NULL) { |
67 | free(SRam.data); |
68 | SRam.data = NULL; |
69 | } |
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70 | SRam.start = SRam.end = 0; // unused |
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71 | |
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72 | pcd_event_schedule(0, PCD_EVENT_CDC, 12500000/75); |
73 | |
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74 | return 0; |
75 | } |
76 | |
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77 | static __inline void SekRunS68k(unsigned int to) |
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78 | { |
79 | int cyc_do; |
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80 | |
81 | SekCycleAimS68k = to; |
82 | if ((cyc_do = SekCycleAimS68k - SekCycleCntS68k) <= 0) |
83 | return; |
84 | |
30e8aac4 |
85 | if (SekShouldInterrupt()) |
86 | Pico_mcd->m.s68k_poll_a = 0; |
87 | |
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88 | SekCycleCntS68k += cyc_do; |
89 | #if defined(EMU_C68K) |
90 | PicoCpuCS68k.cycles = cyc_do; |
3aa1e148 |
91 | CycloneRun(&PicoCpuCS68k); |
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92 | SekCycleCntS68k -= PicoCpuCS68k.cycles; |
b837b69b |
93 | #elif defined(EMU_M68K) |
3aa1e148 |
94 | m68k_set_context(&PicoCpuMS68k); |
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95 | SekCycleCntS68k += m68k_execute(cyc_do) - cyc_do; |
ed4402a7 |
96 | m68k_set_context(&PicoCpuMM68k); |
3aa1e148 |
97 | #elif defined(EMU_F68K) |
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98 | g_m68kcontext = &PicoCpuFS68k; |
99 | SekCycleCntS68k += fm68k_emulate(cyc_do, 0, 0) - cyc_do; |
100 | g_m68kcontext = &PicoCpuFM68k; |
cc68a136 |
101 | #endif |
102 | } |
103 | |
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104 | |
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105 | unsigned int pcd_cycles_m68k_to_s68k(unsigned int c) |
8022f53d |
106 | { |
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107 | return (long long)c * m68k_cycle_mult >> 16; |
8022f53d |
108 | } |
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109 | |
110 | /* events */ |
111 | static void pcd_cdc_event(unsigned int now) |
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112 | { |
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113 | // 75Hz CDC update |
114 | Check_CD_Command(); |
115 | pcd_event_schedule(now, PCD_EVENT_CDC, 12500000/75); |
116 | } |
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117 | |
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118 | static void pcd_int3_timer_event(unsigned int now) |
119 | { |
120 | if (Pico_mcd->s68k_regs[0x33] & PCDS_IEN3) { |
121 | elprintf(EL_INTS|EL_CD, "s68k: timer irq 3"); |
122 | SekInterruptS68k(3); |
123 | } |
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124 | |
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125 | if (Pico_mcd->s68k_regs[0x31] != 0) |
126 | pcd_event_schedule(now, PCD_EVENT_TIMER3, |
127 | Pico_mcd->s68k_regs[0x31] * 384); |
128 | } |
129 | |
130 | static void pcd_gfx_event(unsigned int now) |
131 | { |
132 | // update gfx chip |
133 | if (Pico_mcd->rot_comp.Reg_58 & 0x8000) { |
134 | Pico_mcd->rot_comp.Reg_58 &= 0x7fff; |
135 | Pico_mcd->rot_comp.Reg_64 = 0; |
136 | if (Pico_mcd->s68k_regs[0x33] & PCDS_IEN1) { |
137 | elprintf(EL_INTS |EL_CD, "s68k: gfx_cd irq 1"); |
138 | SekInterruptS68k(1); |
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139 | } |
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140 | } |
68cba51e |
141 | } |
142 | |
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143 | static void pcd_dma_event(unsigned int now) |
144 | { |
145 | int ddx = Pico_mcd->s68k_regs[4] & 7; |
146 | Update_CDC_TRansfer(ddx); |
147 | } |
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148 | |
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149 | typedef void (event_cb)(unsigned int now); |
150 | |
151 | /* times are in s68k (12.5MHz) cycles */ |
152 | unsigned int pcd_event_times[PCD_EVENT_COUNT]; |
153 | static unsigned int event_time_next; |
154 | static event_cb *pcd_event_cbs[PCD_EVENT_COUNT] = { |
155 | [PCD_EVENT_CDC] = pcd_cdc_event, |
156 | [PCD_EVENT_TIMER3] = pcd_int3_timer_event, |
157 | [PCD_EVENT_GFX] = pcd_gfx_event, |
158 | [PCD_EVENT_DMA] = pcd_dma_event, |
159 | }; |
160 | |
161 | void pcd_event_schedule(unsigned int now, enum pcd_event event, int after) |
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162 | { |
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163 | unsigned int when; |
164 | |
165 | when = now + after; |
166 | if (when == 0) { |
167 | // event cancelled |
168 | pcd_event_times[event] = 0; |
169 | return; |
170 | } |
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171 | |
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172 | when |= 1; |
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173 | |
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174 | elprintf(EL_CD, "cd: new event #%u %u->%u", event, now, when); |
175 | pcd_event_times[event] = when; |
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176 | |
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177 | if (event_time_next == 0 || CYCLES_GT(event_time_next, when)) |
178 | event_time_next = when; |
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179 | } |
180 | |
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181 | void pcd_event_schedule_s68k(enum pcd_event event, int after) |
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182 | { |
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183 | if (SekCyclesLeftS68k > after) |
184 | SekEndRunS68k(after); |
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185 | |
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186 | pcd_event_schedule(SekCyclesDoneS68k(), event, after); |
187 | } |
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188 | |
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189 | static void pcd_run_events(unsigned int until) |
190 | { |
191 | int oldest, oldest_diff, time; |
192 | int i, diff; |
193 | |
194 | while (1) { |
195 | oldest = -1, oldest_diff = 0x7fffffff; |
196 | |
197 | for (i = 0; i < PCD_EVENT_COUNT; i++) { |
198 | if (pcd_event_times[i]) { |
199 | diff = pcd_event_times[i] - until; |
200 | if (diff < oldest_diff) { |
201 | oldest_diff = diff; |
202 | oldest = i; |
203 | } |
204 | } |
205 | } |
206 | |
207 | if (oldest_diff <= 0) { |
208 | time = pcd_event_times[oldest]; |
209 | pcd_event_times[oldest] = 0; |
210 | elprintf(EL_CD, "cd: run event #%d %u", oldest, time); |
211 | pcd_event_cbs[oldest](time); |
212 | } |
213 | else if (oldest_diff < 0x7fffffff) { |
214 | event_time_next = pcd_event_times[oldest]; |
215 | break; |
216 | } |
217 | else { |
218 | event_time_next = 0; |
219 | break; |
220 | } |
221 | } |
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222 | |
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223 | if (oldest != -1) |
224 | elprintf(EL_CD, "cd: next event #%d at %u", |
225 | oldest, event_time_next); |
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226 | } |
227 | |
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228 | int pcd_sync_s68k(unsigned int m68k_target, int m68k_poll_sync) |
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229 | { |
230 | #define now SekCycleCntS68k |
231 | unsigned int s68k_target = |
232 | (unsigned long long)m68k_target * m68k_cycle_mult >> 16; |
233 | unsigned int target; |
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234 | |
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235 | elprintf(EL_CD, "s68k sync to %u, %u->%u", |
236 | m68k_target, now, s68k_target); |
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237 | |
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238 | if (Pico_mcd->m.busreq != 1) { /* busreq/reset */ |
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239 | SekCycleCntS68k = SekCycleAimS68k = s68k_target; |
240 | pcd_run_events(m68k_target); |
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241 | return 0; |
ae214f1c |
242 | } |
243 | |
244 | while (CYCLES_GT(s68k_target, now)) { |
245 | if (event_time_next && CYCLES_GE(now, event_time_next)) |
246 | pcd_run_events(now); |
247 | |
248 | target = s68k_target; |
249 | if (event_time_next && CYCLES_GT(target, event_time_next)) |
250 | target = event_time_next; |
251 | |
252 | SekRunS68k(target); |
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253 | if (m68k_poll_sync && Pico_mcd->m.m68k_poll_cnt == 0) |
254 | break; |
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255 | } |
08769494 |
256 | |
257 | return s68k_target - now; |
ae214f1c |
258 | #undef now |
c987bb5c |
259 | } |
ae214f1c |
260 | |
ba6e8bfd |
261 | #define pcd_run_cpus_normal pcd_run_cpus |
262 | //#define pcd_run_cpus_lockstep pcd_run_cpus |
263 | |
08769494 |
264 | static void SekSyncM68k(void); |
265 | |
ba6e8bfd |
266 | static inline void pcd_run_cpus_normal(int m68k_cycles) |
08769494 |
267 | { |
268 | SekCycleAim += m68k_cycles; |
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269 | if (SekShouldInterrupt() || Pico_mcd->m.m68k_poll_cnt < 12) |
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270 | Pico_mcd->m.m68k_poll_cnt = 0; |
271 | else if (Pico_mcd->m.m68k_poll_cnt >= 16) { |
08769494 |
272 | int s68k_left = pcd_sync_s68k(SekCycleAim, 1); |
273 | if (s68k_left <= 0) { |
ba6e8bfd |
274 | elprintf(EL_CDPOLL, "m68k poll [%02x] x%d @%06x", |
08769494 |
275 | Pico_mcd->m.m68k_poll_a, Pico_mcd->m.m68k_poll_cnt, SekPc); |
276 | SekCycleCnt = SekCycleAim; |
277 | return; |
278 | } |
279 | SekCycleCnt = SekCycleAim - (s68k_left * 40220 >> 16); |
280 | } |
281 | |
282 | SekSyncM68k(); |
283 | } |
284 | |
ba6e8bfd |
285 | static inline void pcd_run_cpus_lockstep(int m68k_cycles) |
286 | { |
287 | unsigned int target = SekCycleAim + m68k_cycles; |
288 | do { |
289 | SekCycleAim += 8; |
290 | SekSyncM68k(); |
291 | pcd_sync_s68k(SekCycleAim, 0); |
292 | } while (CYCLES_GT(target, SekCycleAim)); |
cc5ffc3c |
293 | |
294 | SekCycleAim = target; |
ba6e8bfd |
295 | } |
296 | |
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297 | #define PICO_CD |
298 | #define CPUS_RUN(m68k_cycles) \ |
08769494 |
299 | pcd_run_cpus(m68k_cycles) |
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300 | |
efcba75f |
301 | #include "../pico_cmn.c" |
cc68a136 |
302 | |
303 | |
2aa27095 |
304 | PICO_INTERNAL void PicoFrameMCD(void) |
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305 | { |
602133e1 |
306 | if (!(PicoOpt&POPT_ALT_RENDERER)) |
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307 | PicoFrameStart(); |
308 | |
ae214f1c |
309 | // ~1.63 for NTSC, ~1.645 for PAL |
310 | if (Pico.m.pal) |
311 | m68k_cycle_mult = ((12500000ull << 16) / (50*312*488)); |
312 | else |
313 | m68k_cycle_mult = ((12500000ull << 16) / (60*262*488)) + 1; |
314 | |
bf5fbbb4 |
315 | PicoFrameHints(); |
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316 | } |
317 | |
ae214f1c |
318 | void pcd_state_loaded(void) |
319 | { |
320 | unsigned int cycles; |
321 | int diff; |
322 | |
323 | pcd_state_loaded_mem(); |
324 | |
325 | // old savestates.. |
326 | cycles = pcd_cycles_m68k_to_s68k(SekCycleAim); |
327 | diff = cycles - SekCycleAimS68k; |
328 | if (diff < -1000 || diff > 1000) { |
329 | SekCycleCntS68k = SekCycleAimS68k = cycles; |
330 | } |
331 | if (pcd_event_times[PCD_EVENT_CDC] == 0) { |
332 | pcd_event_schedule(SekCycleAimS68k, PCD_EVENT_CDC, 12500000/75); |
333 | |
334 | if (Pico_mcd->s68k_regs[0x31]) |
335 | pcd_event_schedule(SekCycleAimS68k, PCD_EVENT_TIMER3, |
336 | Pico_mcd->s68k_regs[0x31] * 384); |
337 | |
338 | if (Pico_mcd->rot_comp.Reg_58 & 0x8000) { |
339 | Pico_mcd->rot_comp.Reg_58 &= 0x7fff; |
340 | Pico_mcd->rot_comp.Reg_64 = 0; |
341 | if (Pico_mcd->s68k_regs[0x33] & PCDS_IEN1) |
342 | SekInterruptS68k(1); |
343 | } |
344 | if (Pico_mcd->scd.Status_CDC & 0x08) |
345 | Update_CDC_TRansfer(Pico_mcd->s68k_regs[4] & 7); |
346 | } |
347 | } |
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348 | |
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349 | // vim:shiftwidth=2:ts=2:expandtab |