cff531af |
1 | /*\r |
2 | * memory handling\r |
3 | * (c) Copyright Dave, 2004\r |
4 | * (C) notaz, 2006-2010\r |
5 | *\r |
6 | * This work is licensed under the terms of MAME license.\r |
7 | * See COPYING file in the top-level directory.\r |
8 | */\r |
cc68a136 |
9 | \r |
efcba75f |
10 | #include "pico_int.h"\r |
af37bca8 |
11 | #include "memory.h"\r |
cc68a136 |
12 | \r |
cc68a136 |
13 | #include "sound/ym2612.h"\r |
14 | #include "sound/sn76496.h"\r |
15 | \r |
c8d1e9b6 |
16 | extern unsigned int lastSSRamWrite; // used by serial eeprom code\r |
cc68a136 |
17 | \r |
bcf65fd6 |
18 | uptr m68k_read8_map [0x1000000 >> M68K_MEM_SHIFT];\r |
19 | uptr m68k_read16_map [0x1000000 >> M68K_MEM_SHIFT];\r |
20 | uptr m68k_write8_map [0x1000000 >> M68K_MEM_SHIFT];\r |
21 | uptr m68k_write16_map[0x1000000 >> M68K_MEM_SHIFT];\r |
af37bca8 |
22 | \r |
bcf65fd6 |
23 | static void xmap_set(uptr *map, int shift, int start_addr, int end_addr,\r |
0ace9b9a |
24 | const void *func_or_mh, int is_func)\r |
af37bca8 |
25 | {\r |
faf543ce |
26 | #ifdef __clang__\r |
27 | // workaround bug (segfault) in \r |
28 | // Apple LLVM version 4.2 (clang-425.0.27) (based on LLVM 3.2svn)\r |
29 | volatile \r |
30 | #endif\r |
bcf65fd6 |
31 | uptr addr = (uptr)func_or_mh;\r |
af37bca8 |
32 | int mask = (1 << shift) - 1;\r |
33 | int i;\r |
34 | \r |
35 | if ((start_addr & mask) != 0 || (end_addr & mask) != mask) {\r |
36 | elprintf(EL_STATUS|EL_ANOMALY, "xmap_set: tried to map bad range: %06x-%06x",\r |
37 | start_addr, end_addr);\r |
38 | return;\r |
39 | }\r |
40 | \r |
41 | if (addr & 1) {\r |
42 | elprintf(EL_STATUS|EL_ANOMALY, "xmap_set: ptr is not aligned: %08lx", addr);\r |
43 | return;\r |
44 | }\r |
45 | \r |
46 | if (!is_func)\r |
47 | addr -= start_addr;\r |
48 | \r |
49 | for (i = start_addr >> shift; i <= end_addr >> shift; i++) {\r |
50 | map[i] = addr >> 1;\r |
51 | if (is_func)\r |
b8a1c09a |
52 | map[i] |= (uptr)1 << (sizeof(addr) * 8 - 1);\r |
af37bca8 |
53 | }\r |
54 | }\r |
55 | \r |
bcf65fd6 |
56 | void z80_map_set(uptr *map, int start_addr, int end_addr,\r |
0ace9b9a |
57 | const void *func_or_mh, int is_func)\r |
af37bca8 |
58 | {\r |
59 | xmap_set(map, Z80_MEM_SHIFT, start_addr, end_addr, func_or_mh, is_func);\r |
60 | }\r |
61 | \r |
bcf65fd6 |
62 | void cpu68k_map_set(uptr *map, int start_addr, int end_addr,\r |
0ace9b9a |
63 | const void *func_or_mh, int is_func)\r |
af37bca8 |
64 | {\r |
65 | xmap_set(map, M68K_MEM_SHIFT, start_addr, end_addr, func_or_mh, is_func);\r |
66 | }\r |
67 | \r |
68 | // more specialized/optimized function (does same as above)\r |
69 | void cpu68k_map_all_ram(int start_addr, int end_addr, void *ptr, int is_sub)\r |
70 | {\r |
bcf65fd6 |
71 | uptr *r8map, *r16map, *w8map, *w16map;\r |
72 | uptr addr = (uptr)ptr;\r |
af37bca8 |
73 | int shift = M68K_MEM_SHIFT;\r |
74 | int i;\r |
75 | \r |
76 | if (!is_sub) {\r |
77 | r8map = m68k_read8_map;\r |
78 | r16map = m68k_read16_map;\r |
79 | w8map = m68k_write8_map;\r |
80 | w16map = m68k_write16_map;\r |
81 | } else {\r |
82 | r8map = s68k_read8_map;\r |
83 | r16map = s68k_read16_map;\r |
84 | w8map = s68k_write8_map;\r |
85 | w16map = s68k_write16_map;\r |
86 | }\r |
87 | \r |
88 | addr -= start_addr;\r |
89 | addr >>= 1;\r |
90 | for (i = start_addr >> shift; i <= end_addr >> shift; i++)\r |
91 | r8map[i] = r16map[i] = w8map[i] = w16map[i] = addr;\r |
92 | }\r |
93 | \r |
94 | static u32 m68k_unmapped_read8(u32 a)\r |
95 | {\r |
96 | elprintf(EL_UIO, "m68k unmapped r8 [%06x] @%06x", a, SekPc);\r |
97 | return 0; // assume pulldown, as if MegaCD2 was attached\r |
98 | }\r |
99 | \r |
100 | static u32 m68k_unmapped_read16(u32 a)\r |
101 | {\r |
102 | elprintf(EL_UIO, "m68k unmapped r16 [%06x] @%06x", a, SekPc);\r |
103 | return 0;\r |
104 | }\r |
105 | \r |
106 | static void m68k_unmapped_write8(u32 a, u32 d)\r |
107 | {\r |
108 | elprintf(EL_UIO, "m68k unmapped w8 [%06x] %02x @%06x", a, d & 0xff, SekPc);\r |
109 | }\r |
110 | \r |
111 | static void m68k_unmapped_write16(u32 a, u32 d)\r |
112 | {\r |
113 | elprintf(EL_UIO, "m68k unmapped w16 [%06x] %04x @%06x", a, d & 0xffff, SekPc);\r |
114 | }\r |
115 | \r |
116 | void m68k_map_unmap(int start_addr, int end_addr)\r |
117 | {\r |
faf543ce |
118 | #ifdef __clang__\r |
119 | // workaround bug (segfault) in \r |
120 | // Apple LLVM version 4.2 (clang-425.0.27) (based on LLVM 3.2svn)\r |
121 | volatile \r |
122 | #endif\r |
bcf65fd6 |
123 | uptr addr;\r |
af37bca8 |
124 | int shift = M68K_MEM_SHIFT;\r |
125 | int i;\r |
126 | \r |
bcf65fd6 |
127 | addr = (uptr)m68k_unmapped_read8;\r |
af37bca8 |
128 | for (i = start_addr >> shift; i <= end_addr >> shift; i++)\r |
129 | m68k_read8_map[i] = (addr >> 1) | (1 << 31);\r |
130 | \r |
bcf65fd6 |
131 | addr = (uptr)m68k_unmapped_read16;\r |
af37bca8 |
132 | for (i = start_addr >> shift; i <= end_addr >> shift; i++)\r |
133 | m68k_read16_map[i] = (addr >> 1) | (1 << 31);\r |
134 | \r |
bcf65fd6 |
135 | addr = (uptr)m68k_unmapped_write8;\r |
af37bca8 |
136 | for (i = start_addr >> shift; i <= end_addr >> shift; i++)\r |
137 | m68k_write8_map[i] = (addr >> 1) | (1 << 31);\r |
138 | \r |
bcf65fd6 |
139 | addr = (uptr)m68k_unmapped_write16;\r |
af37bca8 |
140 | for (i = start_addr >> shift; i <= end_addr >> shift; i++)\r |
141 | m68k_write16_map[i] = (addr >> 1) | (1 << 31);\r |
142 | }\r |
143 | \r |
144 | MAKE_68K_READ8(m68k_read8, m68k_read8_map)\r |
145 | MAKE_68K_READ16(m68k_read16, m68k_read16_map)\r |
146 | MAKE_68K_READ32(m68k_read32, m68k_read16_map)\r |
147 | MAKE_68K_WRITE8(m68k_write8, m68k_write8_map)\r |
148 | MAKE_68K_WRITE16(m68k_write16, m68k_write16_map)\r |
149 | MAKE_68K_WRITE32(m68k_write32, m68k_write16_map)\r |
150 | \r |
151 | // -----------------------------------------------------------------\r |
152 | \r |
153 | static u32 ym2612_read_local_68k(void);\r |
154 | static int ym2612_write_local(u32 a, u32 d, int is_from_z80);\r |
155 | static void z80_mem_setup(void);\r |
cc68a136 |
156 | \r |
0ace9b9a |
157 | #ifdef _ASM_MEMORY_C\r |
158 | u32 PicoRead8_sram(u32 a);\r |
159 | u32 PicoRead16_sram(u32 a);\r |
160 | #endif\r |
cc68a136 |
161 | \r |
03e4f2a3 |
162 | #ifdef EMU_CORE_DEBUG\r |
cc68a136 |
163 | u32 lastread_a, lastread_d[16]={0,}, lastwrite_cyc_d[16]={0,}, lastwrite_mus_d[16]={0,};\r |
164 | int lrp_cyc=0, lrp_mus=0, lwp_cyc=0, lwp_mus=0;\r |
165 | extern unsigned int ppop;\r |
166 | #endif\r |
167 | \r |
4f65685b |
168 | #ifdef IO_STATS\r |
169 | void log_io(unsigned int addr, int bits, int rw);\r |
dca310c4 |
170 | #elif defined(_MSC_VER)\r |
171 | #define log_io\r |
4f65685b |
172 | #else\r |
173 | #define log_io(...)\r |
174 | #endif\r |
175 | \r |
70357ce5 |
176 | #if defined(EMU_C68K)\r |
5e89f0f5 |
177 | void cyclone_crashed(u32 pc, struct Cyclone *context)\r |
cc68a136 |
178 | {\r |
bf61bea0 |
179 | elprintf(EL_STATUS|EL_ANOMALY, "%c68k crash detected @ %06x",\r |
5e89f0f5 |
180 | context == &PicoCpuCM68k ? 'm' : 's', pc);\r |
181 | context->membase = (u32)Pico.rom;\r |
182 | context->pc = (u32)Pico.rom + Pico.romsize;\r |
cc68a136 |
183 | }\r |
184 | #endif\r |
185 | \r |
cc68a136 |
186 | // -----------------------------------------------------------------\r |
af37bca8 |
187 | // memmap helpers\r |
cc68a136 |
188 | \r |
531a8f38 |
189 | static u32 read_pad_3btn(int i, u32 out_bits)\r |
e5503e2f |
190 | {\r |
531a8f38 |
191 | u32 pad = ~PicoPadInt[i]; // Get inverse of pad MXYZ SACB RLDU\r |
192 | u32 value;\r |
e5503e2f |
193 | \r |
531a8f38 |
194 | if (out_bits & 0x40) // TH\r |
195 | value = pad & 0x3f; // ?1CB RLDU\r |
196 | else\r |
197 | value = ((pad & 0xc0) >> 2) | (pad & 3); // ?0SA 00DU\r |
e5503e2f |
198 | \r |
531a8f38 |
199 | value |= out_bits & 0x40;\r |
200 | return value;\r |
201 | }\r |
202 | \r |
203 | static u32 read_pad_6btn(int i, u32 out_bits)\r |
204 | {\r |
205 | u32 pad = ~PicoPadInt[i]; // Get inverse of pad MXYZ SACB RLDU\r |
206 | int phase = Pico.m.padTHPhase[i];\r |
207 | u32 value;\r |
208 | \r |
209 | if (phase == 2 && !(out_bits & 0x40)) {\r |
210 | value = (pad & 0xc0) >> 2; // ?0SA 0000\r |
211 | goto out;\r |
212 | }\r |
213 | else if(phase == 3) {\r |
214 | if (out_bits & 0x40)\r |
215 | return (pad & 0x30) | ((pad >> 8) & 0xf); // ?1CB MXYZ\r |
216 | else\r |
217 | return ((pad & 0xc0) >> 2) | 0x0f; // ?0SA 1111\r |
218 | goto out;\r |
e5503e2f |
219 | }\r |
220 | \r |
531a8f38 |
221 | if (out_bits & 0x40) // TH\r |
222 | value = pad & 0x3f; // ?1CB RLDU\r |
223 | else\r |
224 | value = ((pad & 0xc0) >> 2) | (pad & 3); // ?0SA 00DU\r |
e5503e2f |
225 | \r |
531a8f38 |
226 | out:\r |
227 | value |= out_bits & 0x40;\r |
228 | return value;\r |
e5503e2f |
229 | }\r |
230 | \r |
531a8f38 |
231 | static u32 read_nothing(int i, u32 out_bits)\r |
232 | {\r |
233 | return 0xff;\r |
234 | }\r |
235 | \r |
236 | typedef u32 (port_read_func)(int index, u32 out_bits);\r |
237 | \r |
238 | static port_read_func *port_readers[3] = {\r |
239 | read_pad_3btn,\r |
240 | read_pad_3btn,\r |
241 | read_nothing\r |
242 | };\r |
0ace9b9a |
243 | \r |
531a8f38 |
244 | static NOINLINE u32 port_read(int i)\r |
245 | {\r |
246 | u32 data_reg = Pico.ioports[i + 1];\r |
247 | u32 ctrl_reg = Pico.ioports[i + 4] | 0x80;\r |
248 | u32 in, out;\r |
249 | \r |
250 | out = data_reg & ctrl_reg;\r |
251 | out |= 0x7f & ~ctrl_reg; // pull-ups\r |
252 | \r |
253 | in = port_readers[i](i, out);\r |
254 | \r |
255 | return (in & ~ctrl_reg) | (data_reg & ctrl_reg);\r |
256 | }\r |
257 | \r |
258 | void PicoSetInputDevice(int port, enum input_device device)\r |
259 | {\r |
260 | port_read_func *func;\r |
261 | \r |
262 | if (port < 0 || port > 2)\r |
263 | return;\r |
264 | \r |
265 | switch (device) {\r |
266 | case PICO_INPUT_PAD_3BTN:\r |
267 | func = read_pad_3btn;\r |
268 | break;\r |
269 | \r |
270 | case PICO_INPUT_PAD_6BTN:\r |
271 | func = read_pad_6btn;\r |
272 | break;\r |
273 | \r |
274 | default:\r |
275 | func = read_nothing;\r |
276 | break;\r |
277 | }\r |
278 | \r |
279 | port_readers[port] = func;\r |
280 | }\r |
281 | \r |
282 | NOINLINE u32 io_ports_read(u32 a)\r |
cc68a136 |
283 | {\r |
af37bca8 |
284 | u32 d;\r |
285 | a = (a>>1) & 0xf;\r |
286 | switch (a) {\r |
287 | case 0: d = Pico.m.hardware; break; // Hardware value (Version register)\r |
531a8f38 |
288 | case 1: d = port_read(0); break;\r |
289 | case 2: d = port_read(1); break;\r |
290 | case 3: d = port_read(2); break;\r |
af37bca8 |
291 | default: d = Pico.ioports[a]; break; // IO ports can be used as RAM\r |
7969166e |
292 | }\r |
af37bca8 |
293 | return d;\r |
cc68a136 |
294 | }\r |
cc68a136 |
295 | \r |
531a8f38 |
296 | NOINLINE void io_ports_write(u32 a, u32 d)\r |
9dc09829 |
297 | {\r |
af37bca8 |
298 | a = (a>>1) & 0xf;\r |
299 | \r |
300 | // 6 button gamepad: if TH went from 0 to 1, gamepad changes state\r |
531a8f38 |
301 | if (1 <= a && a <= 2)\r |
af37bca8 |
302 | {\r |
303 | Pico.m.padDelay[a - 1] = 0;\r |
304 | if (!(Pico.ioports[a] & 0x40) && (d & 0x40))\r |
305 | Pico.m.padTHPhase[a - 1]++;\r |
9dc09829 |
306 | }\r |
af37bca8 |
307 | \r |
5e89f0f5 |
308 | // certain IO ports can be used as RAM\r |
af37bca8 |
309 | Pico.ioports[a] = d;\r |
9dc09829 |
310 | }\r |
311 | \r |
0ace9b9a |
312 | void NOINLINE ctl_write_z80busreq(u32 d)\r |
7969166e |
313 | {\r |
af37bca8 |
314 | d&=1; d^=1;\r |
315 | elprintf(EL_BUSREQ, "set_zrun: %i->%i [%i] @%06x", Pico.m.z80Run, d, SekCyclesDone(), SekPc);\r |
316 | if (d ^ Pico.m.z80Run)\r |
317 | {\r |
318 | if (d)\r |
319 | {\r |
320 | z80_cycle_cnt = cycles_68k_to_z80(SekCyclesDone());\r |
321 | }\r |
322 | else\r |
323 | {\r |
324 | z80stopCycle = SekCyclesDone();\r |
f6c49d38 |
325 | if ((PicoOpt&POPT_EN_Z80) && !Pico.m.z80_reset) {\r |
326 | pprof_start(m68k);\r |
af37bca8 |
327 | PicoSyncZ80(z80stopCycle);\r |
f6c49d38 |
328 | pprof_end_sub(m68k);\r |
329 | }\r |
af37bca8 |
330 | }\r |
331 | Pico.m.z80Run = d;\r |
7969166e |
332 | }\r |
af37bca8 |
333 | }\r |
334 | \r |
0ace9b9a |
335 | void NOINLINE ctl_write_z80reset(u32 d)\r |
af37bca8 |
336 | {\r |
337 | d&=1; d^=1;\r |
338 | elprintf(EL_BUSREQ, "set_zreset: %i->%i [%i] @%06x", Pico.m.z80_reset, d, SekCyclesDone(), SekPc);\r |
339 | if (d ^ Pico.m.z80_reset)\r |
340 | {\r |
341 | if (d)\r |
342 | {\r |
f6c49d38 |
343 | if ((PicoOpt&POPT_EN_Z80) && Pico.m.z80Run) {\r |
344 | pprof_start(m68k);\r |
af37bca8 |
345 | PicoSyncZ80(SekCyclesDone());\r |
f6c49d38 |
346 | pprof_end_sub(m68k);\r |
347 | }\r |
af37bca8 |
348 | YM2612ResetChip();\r |
349 | timers_reset();\r |
7969166e |
350 | }\r |
af37bca8 |
351 | else\r |
352 | {\r |
353 | z80_cycle_cnt = cycles_68k_to_z80(SekCyclesDone());\r |
354 | z80_reset();\r |
7969166e |
355 | }\r |
af37bca8 |
356 | Pico.m.z80_reset = d;\r |
7969166e |
357 | }\r |
358 | }\r |
cc68a136 |
359 | \r |
af37bca8 |
360 | // -----------------------------------------------------------------\r |
fa1e5e29 |
361 | \r |
0ace9b9a |
362 | #ifndef _ASM_MEMORY_C\r |
363 | \r |
af37bca8 |
364 | // cart (save) RAM area (usually 0x200000 - ...)\r |
365 | static u32 PicoRead8_sram(u32 a)\r |
366 | {\r |
af37bca8 |
367 | u32 d;\r |
45f2f245 |
368 | if (SRam.start <= a && a <= SRam.end && (Pico.m.sram_reg & SRR_MAPPED))\r |
af37bca8 |
369 | {\r |
45f2f245 |
370 | if (SRam.flags & SRF_EEPROM) {\r |
af37bca8 |
371 | d = EEPROM_read();\r |
45f2f245 |
372 | if (!(a & 1))\r |
373 | d >>= 8;\r |
374 | } else\r |
af37bca8 |
375 | d = *(u8 *)(SRam.data - SRam.start + a);\r |
45f2f245 |
376 | elprintf(EL_SRAMIO, "sram r8 [%06x] %02x @ %06x", a, d, SekPc);\r |
af37bca8 |
377 | return d;\r |
378 | }\r |
cc68a136 |
379 | \r |
45f2f245 |
380 | // XXX: this is banking unfriendly\r |
af37bca8 |
381 | if (a < Pico.romsize)\r |
382 | return Pico.rom[a ^ 1];\r |
383 | \r |
384 | return m68k_unmapped_read8(a);\r |
385 | }\r |
cc68a136 |
386 | \r |
af37bca8 |
387 | static u32 PicoRead16_sram(u32 a)\r |
cc68a136 |
388 | {\r |
af37bca8 |
389 | u32 d;\r |
b4db550e |
390 | if (SRam.start <= a && a <= SRam.end && (Pico.m.sram_reg & SRR_MAPPED))\r |
af37bca8 |
391 | {\r |
45f2f245 |
392 | if (SRam.flags & SRF_EEPROM)\r |
af37bca8 |
393 | d = EEPROM_read();\r |
45f2f245 |
394 | else {\r |
af37bca8 |
395 | u8 *pm = (u8 *)(SRam.data - SRam.start + a);\r |
396 | d = pm[0] << 8;\r |
397 | d |= pm[1];\r |
398 | }\r |
399 | elprintf(EL_SRAMIO, "sram r16 [%06x] %04x @ %06x", a, d, SekPc);\r |
400 | return d;\r |
401 | }\r |
cc68a136 |
402 | \r |
af37bca8 |
403 | if (a < Pico.romsize)\r |
404 | return *(u16 *)(Pico.rom + a);\r |
cc68a136 |
405 | \r |
af37bca8 |
406 | return m68k_unmapped_read16(a);\r |
407 | }\r |
cc68a136 |
408 | \r |
0ace9b9a |
409 | #endif // _ASM_MEMORY_C\r |
410 | \r |
af37bca8 |
411 | static void PicoWrite8_sram(u32 a, u32 d)\r |
412 | {\r |
45f2f245 |
413 | if (a > SRam.end || a < SRam.start || !(Pico.m.sram_reg & SRR_MAPPED)) {\r |
414 | m68k_unmapped_write8(a, d);\r |
415 | return;\r |
416 | }\r |
417 | \r |
418 | elprintf(EL_SRAMIO, "sram w8 [%06x] %02x @ %06x", a, d & 0xff, SekPc);\r |
419 | if (SRam.flags & SRF_EEPROM)\r |
af37bca8 |
420 | {\r |
45f2f245 |
421 | EEPROM_write8(a, d);\r |
cc68a136 |
422 | }\r |
45f2f245 |
423 | else {\r |
424 | u8 *pm = (u8 *)(SRam.data - SRam.start + a);\r |
af37bca8 |
425 | if (*pm != (u8)d) {\r |
426 | SRam.changed = 1;\r |
427 | *pm = (u8)d;\r |
428 | }\r |
429 | }\r |
430 | }\r |
cc68a136 |
431 | \r |
af37bca8 |
432 | static void PicoWrite16_sram(u32 a, u32 d)\r |
433 | {\r |
45f2f245 |
434 | if (a > SRam.end || a < SRam.start || !(Pico.m.sram_reg & SRR_MAPPED)) {\r |
435 | m68k_unmapped_write16(a, d);\r |
436 | return;\r |
437 | }\r |
438 | \r |
439 | elprintf(EL_SRAMIO, "sram w16 [%06x] %04x @ %06x", a, d & 0xffff, SekPc);\r |
440 | if (SRam.flags & SRF_EEPROM)\r |
441 | {\r |
442 | EEPROM_write16(d);\r |
443 | }\r |
444 | else {\r |
445 | // XXX: hardware could easily use MSB too..\r |
446 | u8 *pm = (u8 *)(SRam.data - SRam.start + a);\r |
447 | if (*pm != (u8)d) {\r |
448 | SRam.changed = 1;\r |
449 | *pm = (u8)d;\r |
450 | }\r |
451 | }\r |
af37bca8 |
452 | }\r |
cc68a136 |
453 | \r |
af37bca8 |
454 | // z80 area (0xa00000 - 0xa0ffff)\r |
455 | // TODO: verify mirrors VDP and bank reg (bank area mirroring verified)\r |
456 | static u32 PicoRead8_z80(u32 a)\r |
457 | {\r |
458 | u32 d = 0xff;\r |
459 | if ((Pico.m.z80Run & 1) || Pico.m.z80_reset) {\r |
460 | elprintf(EL_ANOMALY, "68k z80 read with no bus! [%06x] @ %06x", a, SekPc);\r |
461 | // open bus. Pulled down if MegaCD2 is attached.\r |
462 | return 0;\r |
463 | }\r |
c060a9ab |
464 | \r |
af37bca8 |
465 | if ((a & 0x4000) == 0x0000)\r |
466 | d = Pico.zram[a & 0x1fff];\r |
467 | else if ((a & 0x6000) == 0x4000) // 0x4000-0x5fff\r |
468 | d = ym2612_read_local_68k(); \r |
469 | else\r |
470 | elprintf(EL_UIO|EL_ANOMALY, "68k bad read [%06x] @%06x", a, SekPc);\r |
471 | return d;\r |
472 | }\r |
b542be46 |
473 | \r |
af37bca8 |
474 | static u32 PicoRead16_z80(u32 a)\r |
475 | {\r |
476 | u32 d = PicoRead8_z80(a);\r |
477 | return d | (d << 8);\r |
478 | }\r |
479 | \r |
480 | static void PicoWrite8_z80(u32 a, u32 d)\r |
481 | {\r |
482 | if ((Pico.m.z80Run & 1) || Pico.m.z80_reset) {\r |
483 | // verified on real hw\r |
484 | elprintf(EL_ANOMALY, "68k z80 write with no bus or reset! [%06x] %02x @ %06x", a, d&0xff, SekPc);\r |
485 | return;\r |
486 | }\r |
487 | \r |
488 | if ((a & 0x4000) == 0x0000) { // z80 RAM\r |
489 | SekCyclesBurn(2); // hack\r |
490 | Pico.zram[a & 0x1fff] = (u8)d;\r |
491 | return;\r |
492 | }\r |
493 | if ((a & 0x6000) == 0x4000) { // FM Sound\r |
494 | if (PicoOpt & POPT_EN_FM)\r |
495 | emustatus |= ym2612_write_local(a&3, d&0xff, 0)&1;\r |
496 | return;\r |
497 | }\r |
498 | // TODO: probably other VDP access too? Maybe more mirrors?\r |
499 | if ((a & 0x7ff9) == 0x7f11) { // PSG Sound\r |
500 | if (PicoOpt & POPT_EN_PSG)\r |
501 | SN76496Write(d);\r |
502 | return;\r |
503 | }\r |
af37bca8 |
504 | if ((a & 0x7f00) == 0x6000) // Z80 BANK register\r |
505 | {\r |
506 | Pico.m.z80_bank68k >>= 1;\r |
507 | Pico.m.z80_bank68k |= d << 8;\r |
508 | Pico.m.z80_bank68k &= 0x1ff; // 9 bits and filled in the new top one\r |
509 | elprintf(EL_Z80BNK, "z80 bank=%06x", Pico.m.z80_bank68k << 15);\r |
510 | return;\r |
cc68a136 |
511 | }\r |
af37bca8 |
512 | elprintf(EL_UIO|EL_ANOMALY, "68k bad write [%06x] %02x @ %06x", a, d&0xff, SekPc);\r |
cc68a136 |
513 | }\r |
514 | \r |
af37bca8 |
515 | static void PicoWrite16_z80(u32 a, u32 d)\r |
cc68a136 |
516 | {\r |
af37bca8 |
517 | // for RAM, only most significant byte is sent\r |
518 | // TODO: verify remaining accesses\r |
519 | PicoWrite8_z80(a, d >> 8);\r |
520 | }\r |
cc68a136 |
521 | \r |
0ace9b9a |
522 | #ifndef _ASM_MEMORY_C\r |
523 | \r |
af37bca8 |
524 | // IO/control area (0xa10000 - 0xa1ffff)\r |
525 | u32 PicoRead8_io(u32 a)\r |
526 | {\r |
527 | u32 d;\r |
cc68a136 |
528 | \r |
af37bca8 |
529 | if ((a & 0xffe0) == 0x0000) { // I/O ports\r |
530 | d = io_ports_read(a);\r |
cc68a136 |
531 | goto end;\r |
532 | }\r |
cc68a136 |
533 | \r |
af37bca8 |
534 | // faking open bus (MegaCD pulldowns don't work here curiously)\r |
535 | d = Pico.m.rotate++;\r |
536 | d ^= d << 6;\r |
cc68a136 |
537 | \r |
5e89f0f5 |
538 | if ((a & 0xfc00) == 0x1000) {\r |
539 | // bit8 seems to be readable in this range\r |
540 | if (!(a & 1))\r |
541 | d &= ~0x01;\r |
cc68a136 |
542 | \r |
5e89f0f5 |
543 | if ((a & 0xff01) == 0x1100) { // z80 busreq (verified)\r |
544 | d |= (Pico.m.z80Run | Pico.m.z80_reset) & 1;\r |
545 | elprintf(EL_BUSREQ, "get_zrun: %02x [%i] @%06x", d, SekCyclesDone(), SekPc);\r |
546 | }\r |
af37bca8 |
547 | goto end;\r |
cc68a136 |
548 | }\r |
af37bca8 |
549 | \r |
db1d3564 |
550 | if (PicoOpt & POPT_EN_32X) {\r |
be2c4208 |
551 | d = PicoRead8_32x(a);\r |
552 | goto end;\r |
553 | }\r |
554 | \r |
af37bca8 |
555 | d = m68k_unmapped_read8(a);\r |
556 | end:\r |
cc68a136 |
557 | return d;\r |
558 | }\r |
559 | \r |
af37bca8 |
560 | u32 PicoRead16_io(u32 a)\r |
cc68a136 |
561 | {\r |
af37bca8 |
562 | u32 d;\r |
cc68a136 |
563 | \r |
af37bca8 |
564 | if ((a & 0xffe0) == 0x0000) { // I/O ports\r |
565 | d = io_ports_read(a);\r |
bdd6a009 |
566 | d |= d << 8;\r |
cc68a136 |
567 | goto end;\r |
568 | }\r |
569 | \r |
af37bca8 |
570 | // faking open bus\r |
571 | d = (Pico.m.rotate += 0x41);\r |
572 | d ^= (d << 5) ^ (d << 8);\r |
cc68a136 |
573 | \r |
af37bca8 |
574 | // bit8 seems to be readable in this range\r |
5e89f0f5 |
575 | if ((a & 0xfc00) == 0x1000) {\r |
af37bca8 |
576 | d &= ~0x0100;\r |
cc68a136 |
577 | \r |
5e89f0f5 |
578 | if ((a & 0xff00) == 0x1100) { // z80 busreq\r |
579 | d |= ((Pico.m.z80Run | Pico.m.z80_reset) & 1) << 8;\r |
580 | elprintf(EL_BUSREQ, "get_zrun: %04x [%i] @%06x", d, SekCyclesDone(), SekPc);\r |
581 | }\r |
af37bca8 |
582 | goto end;\r |
cc68a136 |
583 | }\r |
af37bca8 |
584 | \r |
db1d3564 |
585 | if (PicoOpt & POPT_EN_32X) {\r |
be2c4208 |
586 | d = PicoRead16_32x(a);\r |
587 | goto end;\r |
588 | }\r |
589 | \r |
af37bca8 |
590 | d = m68k_unmapped_read16(a);\r |
591 | end:\r |
cc68a136 |
592 | return d;\r |
593 | }\r |
cc68a136 |
594 | \r |
af37bca8 |
595 | void PicoWrite8_io(u32 a, u32 d)\r |
596 | {\r |
597 | if ((a & 0xffe1) == 0x0001) { // I/O ports (verified: only LSB!)\r |
598 | io_ports_write(a, d);\r |
599 | return;\r |
600 | }\r |
601 | if ((a & 0xff01) == 0x1100) { // z80 busreq\r |
602 | ctl_write_z80busreq(d);\r |
603 | return;\r |
604 | }\r |
605 | if ((a & 0xff01) == 0x1200) { // z80 reset\r |
606 | ctl_write_z80reset(d);\r |
607 | return;\r |
608 | }\r |
609 | if (a == 0xa130f1) { // sram access register\r |
610 | elprintf(EL_SRAMIO, "sram reg=%02x", d);\r |
45f2f245 |
611 | Pico.m.sram_reg &= ~(SRR_MAPPED|SRR_READONLY);\r |
612 | Pico.m.sram_reg |= (u8)(d & 3);\r |
af37bca8 |
613 | return;\r |
614 | }\r |
db1d3564 |
615 | if (PicoOpt & POPT_EN_32X) {\r |
be2c4208 |
616 | PicoWrite8_32x(a, d);\r |
617 | return;\r |
618 | }\r |
619 | \r |
af37bca8 |
620 | m68k_unmapped_write8(a, d);\r |
621 | }\r |
cc68a136 |
622 | \r |
af37bca8 |
623 | void PicoWrite16_io(u32 a, u32 d)\r |
cc68a136 |
624 | {\r |
af37bca8 |
625 | if ((a & 0xffe0) == 0x0000) { // I/O ports (verified: only LSB!)\r |
626 | io_ports_write(a, d);\r |
627 | return;\r |
628 | }\r |
629 | if ((a & 0xff00) == 0x1100) { // z80 busreq\r |
630 | ctl_write_z80busreq(d >> 8);\r |
631 | return;\r |
632 | }\r |
633 | if ((a & 0xff00) == 0x1200) { // z80 reset\r |
634 | ctl_write_z80reset(d >> 8);\r |
635 | return;\r |
636 | }\r |
637 | if (a == 0xa130f0) { // sram access register\r |
638 | elprintf(EL_SRAMIO, "sram reg=%02x", d);\r |
45f2f245 |
639 | Pico.m.sram_reg &= ~(SRR_MAPPED|SRR_READONLY);\r |
640 | Pico.m.sram_reg |= (u8)(d & 3);\r |
af37bca8 |
641 | return;\r |
642 | }\r |
db1d3564 |
643 | if (PicoOpt & POPT_EN_32X) {\r |
be2c4208 |
644 | PicoWrite16_32x(a, d);\r |
645 | return;\r |
646 | }\r |
af37bca8 |
647 | m68k_unmapped_write16(a, d);\r |
648 | }\r |
cc68a136 |
649 | \r |
0ace9b9a |
650 | #endif // _ASM_MEMORY_C\r |
651 | \r |
af37bca8 |
652 | // VDP area (0xc00000 - 0xdfffff)\r |
653 | // TODO: verify if lower byte goes to PSG on word writes\r |
654 | static u32 PicoRead8_vdp(u32 a)\r |
655 | {\r |
656 | if ((a & 0x00e0) == 0x0000)\r |
657 | return PicoVideoRead8(a);\r |
cc68a136 |
658 | \r |
af37bca8 |
659 | elprintf(EL_UIO|EL_ANOMALY, "68k bad read [%06x] @%06x", a, SekPc);\r |
660 | return 0;\r |
cc68a136 |
661 | }\r |
662 | \r |
af37bca8 |
663 | static u32 PicoRead16_vdp(u32 a)\r |
cc68a136 |
664 | {\r |
af37bca8 |
665 | if ((a & 0x00e0) == 0x0000)\r |
666 | return PicoVideoRead(a);\r |
cc68a136 |
667 | \r |
af37bca8 |
668 | elprintf(EL_UIO|EL_ANOMALY, "68k bad read [%06x] @%06x", a, SekPc);\r |
669 | return 0;\r |
cc68a136 |
670 | }\r |
671 | \r |
af37bca8 |
672 | static void PicoWrite8_vdp(u32 a, u32 d)\r |
cc68a136 |
673 | {\r |
af37bca8 |
674 | if ((a & 0x00f9) == 0x0011) { // PSG Sound\r |
675 | if (PicoOpt & POPT_EN_PSG)\r |
676 | SN76496Write(d);\r |
cc68a136 |
677 | return;\r |
678 | }\r |
af37bca8 |
679 | if ((a & 0x00e0) == 0x0000) {\r |
680 | d &= 0xff;\r |
681 | PicoVideoWrite(a, d | (d << 8));\r |
b542be46 |
682 | return;\r |
683 | }\r |
684 | \r |
af37bca8 |
685 | elprintf(EL_UIO|EL_ANOMALY, "68k bad write [%06x] %02x @%06x", a, d & 0xff, SekPc);\r |
cc68a136 |
686 | }\r |
687 | \r |
af37bca8 |
688 | static void PicoWrite16_vdp(u32 a, u32 d)\r |
689 | {\r |
690 | if ((a & 0x00f9) == 0x0010) { // PSG Sound\r |
691 | if (PicoOpt & POPT_EN_PSG)\r |
692 | SN76496Write(d);\r |
693 | return;\r |
694 | }\r |
695 | if ((a & 0x00e0) == 0x0000) {\r |
696 | PicoVideoWrite(a, d);\r |
697 | return;\r |
698 | }\r |
699 | \r |
700 | elprintf(EL_UIO|EL_ANOMALY, "68k bad write [%06x] %04x @%06x", a, d & 0xffff, SekPc);\r |
701 | }\r |
cc68a136 |
702 | \r |
703 | // -----------------------------------------------------------------\r |
f53f286a |
704 | \r |
9037e45d |
705 | #ifdef EMU_M68K\r |
706 | static void m68k_mem_setup(void);\r |
707 | #endif\r |
708 | \r |
f8ef8ff7 |
709 | PICO_INTERNAL void PicoMemSetup(void)\r |
710 | {\r |
af37bca8 |
711 | int mask, rs, a;\r |
712 | \r |
713 | // setup the memory map\r |
714 | cpu68k_map_set(m68k_read8_map, 0x000000, 0xffffff, m68k_unmapped_read8, 1);\r |
715 | cpu68k_map_set(m68k_read16_map, 0x000000, 0xffffff, m68k_unmapped_read16, 1);\r |
716 | cpu68k_map_set(m68k_write8_map, 0x000000, 0xffffff, m68k_unmapped_write8, 1);\r |
717 | cpu68k_map_set(m68k_write16_map, 0x000000, 0xffffff, m68k_unmapped_write16, 1);\r |
718 | \r |
719 | // ROM\r |
720 | // align to bank size. We know ROM loader allocated enough for this\r |
721 | mask = (1 << M68K_MEM_SHIFT) - 1;\r |
722 | rs = (Pico.romsize + mask) & ~mask;\r |
723 | cpu68k_map_set(m68k_read8_map, 0x000000, rs - 1, Pico.rom, 0);\r |
724 | cpu68k_map_set(m68k_read16_map, 0x000000, rs - 1, Pico.rom, 0);\r |
725 | \r |
726 | // Common case of on-cart (save) RAM, usually at 0x200000-...\r |
45f2f245 |
727 | if ((SRam.flags & SRF_ENABLED) && SRam.data != NULL) {\r |
728 | rs = SRam.end - SRam.start;\r |
af37bca8 |
729 | rs = (rs + mask) & ~mask;\r |
730 | if (SRam.start + rs >= 0x1000000)\r |
731 | rs = 0x1000000 - SRam.start;\r |
732 | cpu68k_map_set(m68k_read8_map, SRam.start, SRam.start + rs - 1, PicoRead8_sram, 1);\r |
733 | cpu68k_map_set(m68k_read16_map, SRam.start, SRam.start + rs - 1, PicoRead16_sram, 1);\r |
734 | cpu68k_map_set(m68k_write8_map, SRam.start, SRam.start + rs - 1, PicoWrite8_sram, 1);\r |
735 | cpu68k_map_set(m68k_write16_map, SRam.start, SRam.start + rs - 1, PicoWrite16_sram, 1);\r |
736 | }\r |
737 | \r |
738 | // Z80 region\r |
739 | cpu68k_map_set(m68k_read8_map, 0xa00000, 0xa0ffff, PicoRead8_z80, 1);\r |
740 | cpu68k_map_set(m68k_read16_map, 0xa00000, 0xa0ffff, PicoRead16_z80, 1);\r |
741 | cpu68k_map_set(m68k_write8_map, 0xa00000, 0xa0ffff, PicoWrite8_z80, 1);\r |
742 | cpu68k_map_set(m68k_write16_map, 0xa00000, 0xa0ffff, PicoWrite16_z80, 1);\r |
743 | \r |
744 | // IO/control region\r |
745 | cpu68k_map_set(m68k_read8_map, 0xa10000, 0xa1ffff, PicoRead8_io, 1);\r |
746 | cpu68k_map_set(m68k_read16_map, 0xa10000, 0xa1ffff, PicoRead16_io, 1);\r |
747 | cpu68k_map_set(m68k_write8_map, 0xa10000, 0xa1ffff, PicoWrite8_io, 1);\r |
748 | cpu68k_map_set(m68k_write16_map, 0xa10000, 0xa1ffff, PicoWrite16_io, 1);\r |
749 | \r |
750 | // VDP region\r |
751 | for (a = 0xc00000; a < 0xe00000; a += 0x010000) {\r |
752 | if ((a & 0xe700e0) != 0xc00000)\r |
753 | continue;\r |
754 | cpu68k_map_set(m68k_read8_map, a, a + 0xffff, PicoRead8_vdp, 1);\r |
755 | cpu68k_map_set(m68k_read16_map, a, a + 0xffff, PicoRead16_vdp, 1);\r |
756 | cpu68k_map_set(m68k_write8_map, a, a + 0xffff, PicoWrite8_vdp, 1);\r |
757 | cpu68k_map_set(m68k_write16_map, a, a + 0xffff, PicoWrite16_vdp, 1);\r |
758 | }\r |
759 | \r |
760 | // RAM and it's mirrors\r |
761 | for (a = 0xe00000; a < 0x1000000; a += 0x010000) {\r |
762 | cpu68k_map_set(m68k_read8_map, a, a + 0xffff, Pico.ram, 0);\r |
763 | cpu68k_map_set(m68k_read16_map, a, a + 0xffff, Pico.ram, 0);\r |
764 | cpu68k_map_set(m68k_write8_map, a, a + 0xffff, Pico.ram, 0);\r |
765 | cpu68k_map_set(m68k_write16_map, a, a + 0xffff, Pico.ram, 0);\r |
766 | }\r |
767 | \r |
cc68a136 |
768 | // Setup memory callbacks:\r |
70357ce5 |
769 | #ifdef EMU_C68K\r |
5e89f0f5 |
770 | PicoCpuCM68k.read8 = (void *)m68k_read8_map;\r |
771 | PicoCpuCM68k.read16 = (void *)m68k_read16_map;\r |
772 | PicoCpuCM68k.read32 = (void *)m68k_read16_map;\r |
773 | PicoCpuCM68k.write8 = (void *)m68k_write8_map;\r |
774 | PicoCpuCM68k.write16 = (void *)m68k_write16_map;\r |
775 | PicoCpuCM68k.write32 = (void *)m68k_write16_map;\r |
776 | PicoCpuCM68k.checkpc = NULL; /* unused */\r |
777 | PicoCpuCM68k.fetch8 = NULL;\r |
778 | PicoCpuCM68k.fetch16 = NULL;\r |
779 | PicoCpuCM68k.fetch32 = NULL;\r |
cc68a136 |
780 | #endif\r |
70357ce5 |
781 | #ifdef EMU_F68K\r |
af37bca8 |
782 | PicoCpuFM68k.read_byte = m68k_read8;\r |
783 | PicoCpuFM68k.read_word = m68k_read16;\r |
784 | PicoCpuFM68k.read_long = m68k_read32;\r |
785 | PicoCpuFM68k.write_byte = m68k_write8;\r |
786 | PicoCpuFM68k.write_word = m68k_write16;\r |
787 | PicoCpuFM68k.write_long = m68k_write32;\r |
3aa1e148 |
788 | \r |
789 | // setup FAME fetchmap\r |
790 | {\r |
791 | int i;\r |
9037e45d |
792 | // by default, point everything to first 64k of ROM\r |
3aa1e148 |
793 | for (i = 0; i < M68K_FETCHBANK1; i++)\r |
be26eb23 |
794 | PicoCpuFM68k.Fetch[i] = (unsigned long)Pico.rom - (i<<(24-FAMEC_FETCHBITS));\r |
3aa1e148 |
795 | // now real ROM\r |
796 | for (i = 0; i < M68K_FETCHBANK1 && (i<<(24-FAMEC_FETCHBITS)) < Pico.romsize; i++)\r |
be26eb23 |
797 | PicoCpuFM68k.Fetch[i] = (unsigned long)Pico.rom;\r |
3aa1e148 |
798 | // .. and RAM\r |
799 | for (i = M68K_FETCHBANK1*14/16; i < M68K_FETCHBANK1; i++)\r |
be26eb23 |
800 | PicoCpuFM68k.Fetch[i] = (unsigned long)Pico.ram - (i<<(24-FAMEC_FETCHBITS));\r |
3aa1e148 |
801 | }\r |
70357ce5 |
802 | #endif\r |
9037e45d |
803 | #ifdef EMU_M68K\r |
804 | m68k_mem_setup();\r |
805 | #endif\r |
c8d1e9b6 |
806 | \r |
807 | z80_mem_setup();\r |
cc68a136 |
808 | }\r |
809 | \r |
cc68a136 |
810 | #ifdef EMU_M68K\r |
9037e45d |
811 | unsigned int (*pm68k_read_memory_8) (unsigned int address) = NULL;\r |
812 | unsigned int (*pm68k_read_memory_16)(unsigned int address) = NULL;\r |
813 | unsigned int (*pm68k_read_memory_32)(unsigned int address) = NULL;\r |
814 | void (*pm68k_write_memory_8) (unsigned int address, unsigned char value) = NULL;\r |
815 | void (*pm68k_write_memory_16)(unsigned int address, unsigned short value) = NULL;\r |
816 | void (*pm68k_write_memory_32)(unsigned int address, unsigned int value) = NULL;\r |
cc68a136 |
817 | \r |
9037e45d |
818 | /* it appears that Musashi doesn't always mask the unused bits */\r |
819 | unsigned int m68k_read_memory_8 (unsigned int address) { return pm68k_read_memory_8 (address) & 0xff; }\r |
820 | unsigned int m68k_read_memory_16(unsigned int address) { return pm68k_read_memory_16(address) & 0xffff; }\r |
821 | unsigned int m68k_read_memory_32(unsigned int address) { return pm68k_read_memory_32(address); }\r |
822 | void m68k_write_memory_8 (unsigned int address, unsigned int value) { pm68k_write_memory_8 (address, (u8)value); }\r |
823 | void m68k_write_memory_16(unsigned int address, unsigned int value) { pm68k_write_memory_16(address,(u16)value); }\r |
824 | void m68k_write_memory_32(unsigned int address, unsigned int value) { pm68k_write_memory_32(address, value); }\r |
9037e45d |
825 | \r |
826 | static void m68k_mem_setup(void)\r |
827 | {\r |
af37bca8 |
828 | pm68k_read_memory_8 = m68k_read8;\r |
829 | pm68k_read_memory_16 = m68k_read16;\r |
830 | pm68k_read_memory_32 = m68k_read32;\r |
831 | pm68k_write_memory_8 = m68k_write8;\r |
832 | pm68k_write_memory_16 = m68k_write16;\r |
833 | pm68k_write_memory_32 = m68k_write32;\r |
cc68a136 |
834 | }\r |
cc68a136 |
835 | #endif // EMU_M68K\r |
836 | \r |
837 | \r |
4b9c5888 |
838 | // -----------------------------------------------------------------\r |
839 | \r |
4b9c5888 |
840 | static int get_scanline(int is_from_z80)\r |
841 | {\r |
842 | if (is_from_z80) {\r |
843 | int cycles = z80_cyclesDone();\r |
844 | while (cycles - z80_scanline_cycles >= 228)\r |
845 | z80_scanline++, z80_scanline_cycles += 228;\r |
846 | return z80_scanline;\r |
847 | }\r |
848 | \r |
2aa27095 |
849 | return Pico.m.scanline;\r |
4b9c5888 |
850 | }\r |
851 | \r |
48dc74f2 |
852 | /* probably should not be in this file, but it's near related code here */\r |
43e6eaad |
853 | void ym2612_sync_timers(int z80_cycles, int mode_old, int mode_new)\r |
854 | {\r |
855 | int xcycles = z80_cycles << 8;\r |
856 | \r |
857 | /* check for overflows */\r |
858 | if ((mode_old & 4) && xcycles > timer_a_next_oflow)\r |
859 | ym2612.OPN.ST.status |= 1;\r |
860 | \r |
861 | if ((mode_old & 8) && xcycles > timer_b_next_oflow)\r |
862 | ym2612.OPN.ST.status |= 2;\r |
863 | \r |
864 | /* update timer a */\r |
865 | if (mode_old & 1)\r |
e53704e6 |
866 | while (xcycles > timer_a_next_oflow)\r |
43e6eaad |
867 | timer_a_next_oflow += timer_a_step;\r |
868 | \r |
869 | if ((mode_old ^ mode_new) & 1) // turning on/off\r |
870 | {\r |
48dc74f2 |
871 | if (mode_old & 1)\r |
e53704e6 |
872 | timer_a_next_oflow = TIMER_NO_OFLOW;\r |
43e6eaad |
873 | else\r |
48dc74f2 |
874 | timer_a_next_oflow = xcycles + timer_a_step;\r |
43e6eaad |
875 | }\r |
876 | if (mode_new & 1)\r |
877 | elprintf(EL_YMTIMER, "timer a upd to %i @ %i", timer_a_next_oflow>>8, z80_cycles);\r |
878 | \r |
879 | /* update timer b */\r |
880 | if (mode_old & 2)\r |
e53704e6 |
881 | while (xcycles > timer_b_next_oflow)\r |
43e6eaad |
882 | timer_b_next_oflow += timer_b_step;\r |
883 | \r |
884 | if ((mode_old ^ mode_new) & 2)\r |
885 | {\r |
48dc74f2 |
886 | if (mode_old & 2)\r |
e53704e6 |
887 | timer_b_next_oflow = TIMER_NO_OFLOW;\r |
43e6eaad |
888 | else\r |
48dc74f2 |
889 | timer_b_next_oflow = xcycles + timer_b_step;\r |
43e6eaad |
890 | }\r |
891 | if (mode_new & 2)\r |
892 | elprintf(EL_YMTIMER, "timer b upd to %i @ %i", timer_b_next_oflow>>8, z80_cycles);\r |
893 | }\r |
894 | \r |
4b9c5888 |
895 | // ym2612 DAC and timer I/O handlers for z80\r |
af37bca8 |
896 | static int ym2612_write_local(u32 a, u32 d, int is_from_z80)\r |
4b9c5888 |
897 | {\r |
898 | int addr;\r |
899 | \r |
900 | a &= 3;\r |
901 | if (a == 1 && ym2612.OPN.ST.address == 0x2a) /* DAC data */\r |
902 | {\r |
903 | int scanline = get_scanline(is_from_z80);\r |
904 | //elprintf(EL_STATUS, "%03i -> %03i dac w %08x z80 %i", PsndDacLine, scanline, d, is_from_z80);\r |
905 | ym2612.dacout = ((int)d - 0x80) << 6;\r |
906 | if (PsndOut && ym2612.dacen && scanline >= PsndDacLine)\r |
907 | PsndDoDAC(scanline);\r |
908 | return 0;\r |
909 | }\r |
910 | \r |
911 | switch (a)\r |
912 | {\r |
913 | case 0: /* address port 0 */\r |
914 | ym2612.OPN.ST.address = d;\r |
915 | ym2612.addr_A1 = 0;\r |
916 | #ifdef __GP2X__\r |
917 | if (PicoOpt & POPT_EXT_FM) YM2612Write_940(a, d, -1);\r |
918 | #endif\r |
919 | return 0;\r |
920 | \r |
921 | case 1: /* data port 0 */\r |
922 | if (ym2612.addr_A1 != 0)\r |
923 | return 0;\r |
924 | \r |
925 | addr = ym2612.OPN.ST.address;\r |
926 | ym2612.REGS[addr] = d;\r |
927 | \r |
928 | switch (addr)\r |
929 | {\r |
930 | case 0x24: // timer A High 8\r |
931 | case 0x25: { // timer A Low 2\r |
932 | int TAnew = (addr == 0x24) ? ((ym2612.OPN.ST.TA & 0x03)|(((int)d)<<2))\r |
933 | : ((ym2612.OPN.ST.TA & 0x3fc)|(d&3));\r |
934 | if (ym2612.OPN.ST.TA != TAnew)\r |
935 | {\r |
936 | //elprintf(EL_STATUS, "timer a set %i", TAnew);\r |
937 | ym2612.OPN.ST.TA = TAnew;\r |
e53704e6 |
938 | //ym2612.OPN.ST.TAC = (1024-TAnew)*18;\r |
4b9c5888 |
939 | //ym2612.OPN.ST.TAT = 0;\r |
48dc74f2 |
940 | timer_a_step = TIMER_A_TICK_ZCYCLES * (1024 - TAnew);\r |
43e6eaad |
941 | if (ym2612.OPN.ST.mode & 1) {\r |
48dc74f2 |
942 | // this is not right, should really be done on overflow only\r |
4b9c5888 |
943 | int cycles = is_from_z80 ? z80_cyclesDone() : cycles_68k_to_z80(SekCyclesDone());\r |
944 | timer_a_next_oflow = (cycles << 8) + timer_a_step;\r |
4b9c5888 |
945 | }\r |
43e6eaad |
946 | elprintf(EL_YMTIMER, "timer a set to %i, %i", 1024 - TAnew, timer_a_next_oflow>>8);\r |
4b9c5888 |
947 | }\r |
948 | return 0;\r |
949 | }\r |
950 | case 0x26: // timer B\r |
951 | if (ym2612.OPN.ST.TB != d) {\r |
952 | //elprintf(EL_STATUS, "timer b set %i", d);\r |
953 | ym2612.OPN.ST.TB = d;\r |
e53704e6 |
954 | //ym2612.OPN.ST.TBC = (256-d) * 288;\r |
4b9c5888 |
955 | //ym2612.OPN.ST.TBT = 0;\r |
48dc74f2 |
956 | timer_b_step = TIMER_B_TICK_ZCYCLES * (256 - d); // 262800\r |
43e6eaad |
957 | if (ym2612.OPN.ST.mode & 2) {\r |
958 | int cycles = is_from_z80 ? z80_cyclesDone() : cycles_68k_to_z80(SekCyclesDone());\r |
959 | timer_b_next_oflow = (cycles << 8) + timer_b_step;\r |
960 | }\r |
961 | elprintf(EL_YMTIMER, "timer b set to %i, %i", 256 - d, timer_b_next_oflow>>8);\r |
4b9c5888 |
962 | }\r |
963 | return 0;\r |
964 | case 0x27: { /* mode, timer control */\r |
965 | int old_mode = ym2612.OPN.ST.mode;\r |
43e6eaad |
966 | int cycles = is_from_z80 ? z80_cyclesDone() : cycles_68k_to_z80(SekCyclesDone());\r |
967 | ym2612.OPN.ST.mode = d;\r |
4b9c5888 |
968 | \r |
43e6eaad |
969 | elprintf(EL_YMTIMER, "st mode %02x", d);\r |
970 | ym2612_sync_timers(cycles, old_mode, d);\r |
4b9c5888 |
971 | \r |
43e6eaad |
972 | /* reset Timer a flag */\r |
973 | if (d & 0x10)\r |
974 | ym2612.OPN.ST.status &= ~1;\r |
4b9c5888 |
975 | \r |
976 | /* reset Timer b flag */\r |
977 | if (d & 0x20)\r |
978 | ym2612.OPN.ST.status &= ~2;\r |
979 | \r |
43e6eaad |
980 | if ((d ^ old_mode) & 0xc0) {\r |
4b9c5888 |
981 | #ifdef __GP2X__\r |
52250671 |
982 | if (PicoOpt & POPT_EXT_FM) return YM2612Write_940(a, d, get_scanline(is_from_z80));\r |
4b9c5888 |
983 | #endif\r |
43e6eaad |
984 | return 1;\r |
985 | }\r |
4b9c5888 |
986 | return 0;\r |
987 | }\r |
988 | case 0x2b: { /* DAC Sel (YM2612) */\r |
989 | int scanline = get_scanline(is_from_z80);\r |
990 | ym2612.dacen = d & 0x80;\r |
991 | if (d & 0x80) PsndDacLine = scanline;\r |
992 | #ifdef __GP2X__\r |
993 | if (PicoOpt & POPT_EXT_FM) YM2612Write_940(a, d, scanline);\r |
994 | #endif\r |
995 | return 0;\r |
996 | }\r |
997 | }\r |
998 | break;\r |
999 | \r |
1000 | case 2: /* address port 1 */\r |
1001 | ym2612.OPN.ST.address = d;\r |
1002 | ym2612.addr_A1 = 1;\r |
1003 | #ifdef __GP2X__\r |
1004 | if (PicoOpt & POPT_EXT_FM) YM2612Write_940(a, d, -1);\r |
1005 | #endif\r |
1006 | return 0;\r |
1007 | \r |
1008 | case 3: /* data port 1 */\r |
1009 | if (ym2612.addr_A1 != 1)\r |
1010 | return 0;\r |
1011 | \r |
1012 | addr = ym2612.OPN.ST.address | 0x100;\r |
1013 | ym2612.REGS[addr] = d;\r |
1014 | break;\r |
1015 | }\r |
1016 | \r |
1017 | #ifdef __GP2X__\r |
1018 | if (PicoOpt & POPT_EXT_FM)\r |
1019 | return YM2612Write_940(a, d, get_scanline(is_from_z80));\r |
1020 | #endif\r |
1021 | return YM2612Write_(a, d);\r |
1022 | }\r |
1023 | \r |
453d2a6e |
1024 | \r |
43e6eaad |
1025 | #define ym2612_read_local() \\r |
1026 | if (xcycles >= timer_a_next_oflow) \\r |
1027 | ym2612.OPN.ST.status |= (ym2612.OPN.ST.mode >> 2) & 1; \\r |
1028 | if (xcycles >= timer_b_next_oflow) \\r |
1029 | ym2612.OPN.ST.status |= (ym2612.OPN.ST.mode >> 2) & 2\r |
1030 | \r |
553c3eaa |
1031 | static u32 ym2612_read_local_z80(void)\r |
4b9c5888 |
1032 | {\r |
1033 | int xcycles = z80_cyclesDone() << 8;\r |
4b9c5888 |
1034 | \r |
43e6eaad |
1035 | ym2612_read_local();\r |
1036 | \r |
1037 | elprintf(EL_YMTIMER, "timer z80 read %i, sched %i, %i @ %i|%i", ym2612.OPN.ST.status,\r |
1038 | timer_a_next_oflow>>8, timer_b_next_oflow>>8, xcycles >> 8, (xcycles >> 8) / 228);\r |
1039 | return ym2612.OPN.ST.status;\r |
1040 | }\r |
1041 | \r |
af37bca8 |
1042 | static u32 ym2612_read_local_68k(void)\r |
43e6eaad |
1043 | {\r |
1044 | int xcycles = cycles_68k_to_z80(SekCyclesDone()) << 8;\r |
1045 | \r |
1046 | ym2612_read_local();\r |
1047 | \r |
1048 | elprintf(EL_YMTIMER, "timer 68k read %i, sched %i, %i @ %i|%i", ym2612.OPN.ST.status,\r |
1049 | timer_a_next_oflow>>8, timer_b_next_oflow>>8, xcycles >> 8, (xcycles >> 8) / 228);\r |
4b9c5888 |
1050 | return ym2612.OPN.ST.status;\r |
1051 | }\r |
1052 | \r |
d2721b08 |
1053 | void ym2612_pack_state(void)\r |
1054 | {\r |
e53704e6 |
1055 | // timers are saved as tick counts, in 16.16 int format\r |
1056 | int tac, tat = 0, tbc, tbt = 0;\r |
1057 | tac = 1024 - ym2612.OPN.ST.TA;\r |
1058 | tbc = 256 - ym2612.OPN.ST.TB;\r |
1059 | if (timer_a_next_oflow != TIMER_NO_OFLOW)\r |
1060 | tat = (int)((double)(timer_a_step - timer_a_next_oflow) / (double)timer_a_step * tac * 65536);\r |
1061 | if (timer_b_next_oflow != TIMER_NO_OFLOW)\r |
1062 | tbt = (int)((double)(timer_b_step - timer_b_next_oflow) / (double)timer_b_step * tbc * 65536);\r |
1063 | elprintf(EL_YMTIMER, "save: timer a %i/%i", tat >> 16, tac);\r |
1064 | elprintf(EL_YMTIMER, "save: timer b %i/%i", tbt >> 16, tbc);\r |
1065 | \r |
d2721b08 |
1066 | #ifdef __GP2X__\r |
1067 | if (PicoOpt & POPT_EXT_FM)\r |
e4fb433c |
1068 | YM2612PicoStateSave2_940(tat, tbt);\r |
d2721b08 |
1069 | else\r |
1070 | #endif\r |
e53704e6 |
1071 | YM2612PicoStateSave2(tat, tbt);\r |
d2721b08 |
1072 | }\r |
1073 | \r |
453d2a6e |
1074 | void ym2612_unpack_state(void)\r |
1075 | {\r |
e53704e6 |
1076 | int i, ret, tac, tat, tbc, tbt;\r |
453d2a6e |
1077 | YM2612PicoStateLoad();\r |
1078 | \r |
1079 | // feed all the registers and update internal state\r |
db49317b |
1080 | for (i = 0x20; i < 0xA0; i++) {\r |
453d2a6e |
1081 | ym2612_write_local(0, i, 0);\r |
1082 | ym2612_write_local(1, ym2612.REGS[i], 0);\r |
1083 | }\r |
db49317b |
1084 | for (i = 0x30; i < 0xA0; i++) {\r |
1085 | ym2612_write_local(2, i, 0);\r |
1086 | ym2612_write_local(3, ym2612.REGS[i|0x100], 0);\r |
1087 | }\r |
1088 | for (i = 0xAF; i >= 0xA0; i--) { // must apply backwards\r |
1089 | ym2612_write_local(2, i, 0);\r |
1090 | ym2612_write_local(3, ym2612.REGS[i|0x100], 0);\r |
1091 | ym2612_write_local(0, i, 0);\r |
1092 | ym2612_write_local(1, ym2612.REGS[i], 0);\r |
1093 | }\r |
1094 | for (i = 0xB0; i < 0xB8; i++) {\r |
1095 | ym2612_write_local(0, i, 0);\r |
1096 | ym2612_write_local(1, ym2612.REGS[i], 0);\r |
453d2a6e |
1097 | ym2612_write_local(2, i, 0);\r |
1098 | ym2612_write_local(3, ym2612.REGS[i|0x100], 0);\r |
1099 | }\r |
d2721b08 |
1100 | \r |
1101 | #ifdef __GP2X__\r |
1102 | if (PicoOpt & POPT_EXT_FM)\r |
e4fb433c |
1103 | ret = YM2612PicoStateLoad2_940(&tat, &tbt);\r |
d2721b08 |
1104 | else\r |
1105 | #endif\r |
1106 | ret = YM2612PicoStateLoad2(&tat, &tbt);\r |
db49317b |
1107 | if (ret != 0) {\r |
1108 | elprintf(EL_STATUS, "old ym2612 state");\r |
1109 | return; // no saved timers\r |
1110 | }\r |
e53704e6 |
1111 | \r |
1112 | tac = (1024 - ym2612.OPN.ST.TA) << 16;\r |
1113 | tbc = (256 - ym2612.OPN.ST.TB) << 16;\r |
1114 | if (ym2612.OPN.ST.mode & 1)\r |
48dc74f2 |
1115 | timer_a_next_oflow = (int)((double)(tac - tat) / (double)tac * timer_a_step);\r |
e53704e6 |
1116 | else\r |
1117 | timer_a_next_oflow = TIMER_NO_OFLOW;\r |
1118 | if (ym2612.OPN.ST.mode & 2)\r |
48dc74f2 |
1119 | timer_b_next_oflow = (int)((double)(tbc - tbt) / (double)tbc * timer_b_step);\r |
e53704e6 |
1120 | else\r |
1121 | timer_b_next_oflow = TIMER_NO_OFLOW;\r |
1122 | elprintf(EL_YMTIMER, "load: %i/%i, timer_a_next_oflow %i", tat>>16, tac>>16, timer_a_next_oflow >> 8);\r |
1123 | elprintf(EL_YMTIMER, "load: %i/%i, timer_b_next_oflow %i", tbt>>16, tbc>>16, timer_b_next_oflow >> 8);\r |
453d2a6e |
1124 | }\r |
1125 | \r |
f3a57b2d |
1126 | #if defined(NO_32X) && defined(_ASM_MEMORY_C)\r |
1127 | // referenced by asm code\r |
1128 | u32 PicoRead8_32x(u32 a) { return 0; }\r |
1129 | u32 PicoRead16_32x(u32 a) { return 0; }\r |
1130 | void PicoWrite8_32x(u32 a, u32 d) {}\r |
1131 | void PicoWrite16_32x(u32 a, u32 d) {}\r |
1132 | #endif\r |
1133 | \r |
cc68a136 |
1134 | // -----------------------------------------------------------------\r |
1135 | // z80 memhandlers\r |
1136 | \r |
553c3eaa |
1137 | static unsigned char z80_md_vdp_read(unsigned short a)\r |
cc68a136 |
1138 | {\r |
c8d1e9b6 |
1139 | // TODO?\r |
1140 | elprintf(EL_ANOMALY, "z80 invalid r8 [%06x] %02x", a, 0xff);\r |
1141 | return 0xff;\r |
1142 | }\r |
cc68a136 |
1143 | \r |
553c3eaa |
1144 | static unsigned char z80_md_bank_read(unsigned short a)\r |
c8d1e9b6 |
1145 | {\r |
c8d1e9b6 |
1146 | unsigned int addr68k;\r |
1147 | unsigned char ret;\r |
cc68a136 |
1148 | \r |
c8d1e9b6 |
1149 | addr68k = Pico.m.z80_bank68k<<15;\r |
1150 | addr68k += a & 0x7fff;\r |
1151 | \r |
af37bca8 |
1152 | ret = m68k_read8(addr68k);\r |
cc68a136 |
1153 | \r |
c8d1e9b6 |
1154 | elprintf(EL_Z80BNK, "z80->68k r8 [%06x] %02x", addr68k, ret);\r |
cc68a136 |
1155 | return ret;\r |
1156 | }\r |
1157 | \r |
553c3eaa |
1158 | static void z80_md_ym2612_write(unsigned int a, unsigned char data)\r |
cc68a136 |
1159 | {\r |
c8d1e9b6 |
1160 | if (PicoOpt & POPT_EN_FM)\r |
1161 | emustatus |= ym2612_write_local(a, data, 1) & 1;\r |
1162 | }\r |
cc68a136 |
1163 | \r |
553c3eaa |
1164 | static void z80_md_vdp_br_write(unsigned int a, unsigned char data)\r |
c8d1e9b6 |
1165 | {\r |
1166 | // TODO: allow full VDP access\r |
1167 | if ((a&0xfff9) == 0x7f11) // 7f11 7f13 7f15 7f17\r |
cc68a136 |
1168 | {\r |
c8d1e9b6 |
1169 | if (PicoOpt & POPT_EN_PSG)\r |
1170 | SN76496Write(data);\r |
cc68a136 |
1171 | return;\r |
1172 | }\r |
1173 | \r |
c8d1e9b6 |
1174 | if ((a>>8) == 0x60)\r |
cc68a136 |
1175 | {\r |
c8d1e9b6 |
1176 | Pico.m.z80_bank68k >>= 1;\r |
1177 | Pico.m.z80_bank68k |= data << 8;\r |
1178 | Pico.m.z80_bank68k &= 0x1ff; // 9 bits and filled in the new top one\r |
cc68a136 |
1179 | return;\r |
1180 | }\r |
1181 | \r |
c8d1e9b6 |
1182 | elprintf(EL_ANOMALY, "z80 invalid w8 [%06x] %02x", a, data);\r |
1183 | }\r |
cc68a136 |
1184 | \r |
553c3eaa |
1185 | static void z80_md_bank_write(unsigned int a, unsigned char data)\r |
c8d1e9b6 |
1186 | {\r |
c8d1e9b6 |
1187 | unsigned int addr68k;\r |
69996cb7 |
1188 | \r |
c8d1e9b6 |
1189 | addr68k = Pico.m.z80_bank68k << 15;\r |
1190 | addr68k += a & 0x7fff;\r |
1191 | \r |
1192 | elprintf(EL_Z80BNK, "z80->68k w8 [%06x] %02x", addr68k, data);\r |
af37bca8 |
1193 | m68k_write8(addr68k, data);\r |
cc68a136 |
1194 | }\r |
1195 | \r |
c8d1e9b6 |
1196 | // -----------------------------------------------------------------\r |
1197 | \r |
1198 | static unsigned char z80_md_in(unsigned short p)\r |
a4221917 |
1199 | {\r |
c8d1e9b6 |
1200 | elprintf(EL_ANOMALY, "Z80 port %04x read", p);\r |
1201 | return 0xff;\r |
a4221917 |
1202 | }\r |
1203 | \r |
c8d1e9b6 |
1204 | static void z80_md_out(unsigned short p, unsigned char d)\r |
cc68a136 |
1205 | {\r |
c8d1e9b6 |
1206 | elprintf(EL_ANOMALY, "Z80 port %04x write %02x", p, d);\r |
cc68a136 |
1207 | }\r |
c8d1e9b6 |
1208 | \r |
af37bca8 |
1209 | static void z80_mem_setup(void)\r |
c8d1e9b6 |
1210 | {\r |
1211 | z80_map_set(z80_read_map, 0x0000, 0x1fff, Pico.zram, 0);\r |
1212 | z80_map_set(z80_read_map, 0x2000, 0x3fff, Pico.zram, 0);\r |
1213 | z80_map_set(z80_read_map, 0x4000, 0x5fff, ym2612_read_local_z80, 1);\r |
1214 | z80_map_set(z80_read_map, 0x6000, 0x7fff, z80_md_vdp_read, 1);\r |
1215 | z80_map_set(z80_read_map, 0x8000, 0xffff, z80_md_bank_read, 1);\r |
1216 | \r |
1217 | z80_map_set(z80_write_map, 0x0000, 0x1fff, Pico.zram, 0);\r |
1218 | z80_map_set(z80_write_map, 0x2000, 0x3fff, Pico.zram, 0);\r |
1219 | z80_map_set(z80_write_map, 0x4000, 0x5fff, z80_md_ym2612_write, 1);\r |
1220 | z80_map_set(z80_write_map, 0x6000, 0x7fff, z80_md_vdp_br_write, 1);\r |
1221 | z80_map_set(z80_write_map, 0x8000, 0xffff, z80_md_bank_write, 1);\r |
1222 | \r |
1223 | #ifdef _USE_DRZ80\r |
1224 | drZ80.z80_in = z80_md_in;\r |
1225 | drZ80.z80_out = z80_md_out;\r |
1226 | #endif\r |
1227 | #ifdef _USE_CZ80\r |
b8a1c09a |
1228 | Cz80_Set_Fetch(&CZ80, 0x0000, 0x1fff, (FPTR)Pico.zram); // main RAM\r |
1229 | Cz80_Set_Fetch(&CZ80, 0x2000, 0x3fff, (FPTR)Pico.zram); // mirror\r |
c8d1e9b6 |
1230 | Cz80_Set_INPort(&CZ80, z80_md_in);\r |
1231 | Cz80_Set_OUTPort(&CZ80, z80_md_out);\r |
a4221917 |
1232 | #endif\r |
c8d1e9b6 |
1233 | }\r |
cc68a136 |
1234 | \r |
531a8f38 |
1235 | // vim:shiftwidth=2:ts=2:expandtab\r |