cd: fix cycle overflow issue
[picodrive.git] / pico / cd / mcd.c
CommitLineData
cff531af 1/*
2 * PicoDrive
ae214f1c 3 * (C) notaz, 2007,2013
cff531af 4 *
5 * This work is licensed under the terms of MAME license.
6 * See COPYING file in the top-level directory.
7 */
cc68a136 8
efcba75f 9#include "../pico_int.h"
43e6eaad 10#include "../sound/ym2612.h"
cc68a136 11
76276b0b 12extern unsigned char formatted_bram[4*0x10];
ae214f1c 13
a6523294 14static unsigned int mcd_m68k_cycle_mult;
15static unsigned int mcd_m68k_cycle_base;
16static unsigned int mcd_s68k_cycle_base;
89fa852d 17
721cd396 18void (*PicoMCDopenTray)(void) = NULL;
d687ef50 19void (*PicoMCDcloseTray)(void) = NULL;
89fa852d 20
cc68a136 21
2aa27095 22PICO_INTERNAL void PicoInitMCD(void)
cc68a136 23{
24 SekInitS68k();
25 Init_CD_Driver();
a93a80de 26 gfx_init();
cc68a136 27}
28
eff55556 29PICO_INTERNAL void PicoExitMCD(void)
cc68a136 30{
31 End_CD_Driver();
32}
33
1cb1584b 34PICO_INTERNAL void PicoPowerMCD(void)
35{
8e4e84c2 36 SekCycleCntS68k = SekCycleAimS68k = 0;
37
1cb1584b 38 int fmt_size = sizeof(formatted_bram);
39 memset(Pico_mcd->prg_ram, 0, sizeof(Pico_mcd->prg_ram));
40 memset(Pico_mcd->word_ram2M, 0, sizeof(Pico_mcd->word_ram2M));
41 memset(Pico_mcd->pcm_ram, 0, sizeof(Pico_mcd->pcm_ram));
42 memset(Pico_mcd->bram, 0, sizeof(Pico_mcd->bram));
4fb43555 43 memcpy(Pico_mcd->bram + sizeof(Pico_mcd->bram) - fmt_size,
44 formatted_bram, fmt_size);
51a902ae 45 memset(Pico_mcd->s68k_regs, 0, sizeof(Pico_mcd->s68k_regs));
4f265db7 46 memset(&Pico_mcd->pcm, 0, sizeof(Pico_mcd->pcm));
5c69a605 47 memset(&Pico_mcd->m, 0, sizeof(Pico_mcd->m));
51a902ae 48
d0132772 49 Reset_CD();
50
4fb43555 51 // cold reset state (tested)
52 Pico_mcd->m.state_flags = PCD_ST_S68K_RST;
53 Pico_mcd->m.busreq = 2; // busreq on, s68k in reset
54 Pico_mcd->s68k_regs[3] = 1; // 2M word RAM mode, m68k access
4fb43555 55 memset(Pico_mcd->bios + 0x70, 0xff, 4);
56}
cc68a136 57
d0132772 58void pcd_soft_reset(void)
4fb43555 59{
d0132772 60 // Reset_CD(); // breaks Fahrenheit CD swap
61
5c69a605 62 LC89510_Reset();
3aa1e148 63#ifdef _ASM_CD_MEMORY_C
00bd648e 64 //PicoMemResetCDdecode(1); // don't have to call this in 2M mode
4ff2d527 65#endif
cc68a136 66
d0132772 67 pcd_event_schedule_s68k(PCD_EVENT_CDC, 12500000/75);
68
69 // TODO: test if register state/timers change
70}
71
72PICO_INTERNAL int PicoResetMCD(void)
73{
74 // reset button doesn't affect MCD hardware
75
6cadc2da 76 // use SRam.data for RAM cart
af37bca8 77 if (PicoOpt & POPT_EN_MCD_RAMCART) {
d6114368 78 if (SRam.data == NULL)
79 SRam.data = calloc(1, 0x12000);
80 }
81 else if (SRam.data != NULL) {
82 free(SRam.data);
83 SRam.data = NULL;
84 }
b542be46 85 SRam.start = SRam.end = 0; // unused
6cadc2da 86
cc68a136 87 return 0;
88}
89
ae214f1c 90static __inline void SekRunS68k(unsigned int to)
cc68a136 91{
92 int cyc_do;
ae214f1c 93
94 SekCycleAimS68k = to;
95 if ((cyc_do = SekCycleAimS68k - SekCycleCntS68k) <= 0)
96 return;
97
30e8aac4 98 if (SekShouldInterrupt())
99 Pico_mcd->m.s68k_poll_a = 0;
100
ae214f1c 101 SekCycleCntS68k += cyc_do;
102#if defined(EMU_C68K)
103 PicoCpuCS68k.cycles = cyc_do;
3aa1e148 104 CycloneRun(&PicoCpuCS68k);
ae214f1c 105 SekCycleCntS68k -= PicoCpuCS68k.cycles;
b837b69b 106#elif defined(EMU_M68K)
3aa1e148 107 m68k_set_context(&PicoCpuMS68k);
ae214f1c 108 SekCycleCntS68k += m68k_execute(cyc_do) - cyc_do;
ed4402a7 109 m68k_set_context(&PicoCpuMM68k);
3aa1e148 110#elif defined(EMU_F68K)
ae214f1c 111 g_m68kcontext = &PicoCpuFS68k;
99ade2ee 112 SekCycleCntS68k += fm68k_emulate(cyc_do, 0) - cyc_do;
ae214f1c 113 g_m68kcontext = &PicoCpuFM68k;
cc68a136 114#endif
115}
116
8e4e84c2 117static void pcd_set_cycle_mult(void)
118{
119 // ~1.63 for NTSC, ~1.645 for PAL
120 if (Pico.m.pal)
a6523294 121 mcd_m68k_cycle_mult = ((12500000ull << 16) / (50*312*488));
8e4e84c2 122 else
a6523294 123 mcd_m68k_cycle_mult = ((12500000ull << 16) / (60*262*488)) + 1;
8e4e84c2 124}
68cba51e 125
ae214f1c 126unsigned int pcd_cycles_m68k_to_s68k(unsigned int c)
8022f53d 127{
a6523294 128 return (long long)c * mcd_m68k_cycle_mult >> 16;
8022f53d 129}
ae214f1c 130
131/* events */
132static void pcd_cdc_event(unsigned int now)
68cba51e 133{
ae214f1c 134 // 75Hz CDC update
135 Check_CD_Command();
136 pcd_event_schedule(now, PCD_EVENT_CDC, 12500000/75);
137}
7336a99a 138
ae214f1c 139static void pcd_int3_timer_event(unsigned int now)
140{
141 if (Pico_mcd->s68k_regs[0x33] & PCDS_IEN3) {
142 elprintf(EL_INTS|EL_CD, "s68k: timer irq 3");
143 SekInterruptS68k(3);
144 }
7336a99a 145
ae214f1c 146 if (Pico_mcd->s68k_regs[0x31] != 0)
147 pcd_event_schedule(now, PCD_EVENT_TIMER3,
148 Pico_mcd->s68k_regs[0x31] * 384);
149}
150
ae214f1c 151static void pcd_dma_event(unsigned int now)
152{
153 int ddx = Pico_mcd->s68k_regs[4] & 7;
154 Update_CDC_TRansfer(ddx);
155}
68cba51e 156
ae214f1c 157typedef void (event_cb)(unsigned int now);
158
159/* times are in s68k (12.5MHz) cycles */
160unsigned int pcd_event_times[PCD_EVENT_COUNT];
161static unsigned int event_time_next;
162static event_cb *pcd_event_cbs[PCD_EVENT_COUNT] = {
163 [PCD_EVENT_CDC] = pcd_cdc_event,
164 [PCD_EVENT_TIMER3] = pcd_int3_timer_event,
a93a80de 165 [PCD_EVENT_GFX] = gfx_update,
ae214f1c 166 [PCD_EVENT_DMA] = pcd_dma_event,
167};
168
169void pcd_event_schedule(unsigned int now, enum pcd_event event, int after)
bf098bc5 170{
ae214f1c 171 unsigned int when;
172
173 when = now + after;
174 if (when == 0) {
175 // event cancelled
176 pcd_event_times[event] = 0;
177 return;
178 }
bf098bc5 179
ae214f1c 180 when |= 1;
bf098bc5 181
ae214f1c 182 elprintf(EL_CD, "cd: new event #%u %u->%u", event, now, when);
183 pcd_event_times[event] = when;
bf098bc5 184
ae214f1c 185 if (event_time_next == 0 || CYCLES_GT(event_time_next, when))
186 event_time_next = when;
bf098bc5 187}
188
ae214f1c 189void pcd_event_schedule_s68k(enum pcd_event event, int after)
4f265db7 190{
ae214f1c 191 if (SekCyclesLeftS68k > after)
192 SekEndRunS68k(after);
4f265db7 193
ae214f1c 194 pcd_event_schedule(SekCyclesDoneS68k(), event, after);
195}
4f265db7 196
ae214f1c 197static void pcd_run_events(unsigned int until)
198{
199 int oldest, oldest_diff, time;
200 int i, diff;
201
202 while (1) {
203 oldest = -1, oldest_diff = 0x7fffffff;
204
205 for (i = 0; i < PCD_EVENT_COUNT; i++) {
206 if (pcd_event_times[i]) {
207 diff = pcd_event_times[i] - until;
208 if (diff < oldest_diff) {
209 oldest_diff = diff;
210 oldest = i;
211 }
212 }
213 }
214
215 if (oldest_diff <= 0) {
216 time = pcd_event_times[oldest];
217 pcd_event_times[oldest] = 0;
218 elprintf(EL_CD, "cd: run event #%d %u", oldest, time);
219 pcd_event_cbs[oldest](time);
220 }
221 else if (oldest_diff < 0x7fffffff) {
222 event_time_next = pcd_event_times[oldest];
223 break;
224 }
225 else {
226 event_time_next = 0;
227 break;
228 }
229 }
4f265db7 230
ae214f1c 231 if (oldest != -1)
232 elprintf(EL_CD, "cd: next event #%d at %u",
233 oldest, event_time_next);
4f265db7 234}
235
08769494 236int pcd_sync_s68k(unsigned int m68k_target, int m68k_poll_sync)
ae214f1c 237{
238 #define now SekCycleCntS68k
a6523294 239 unsigned int s68k_target;
ae214f1c 240 unsigned int target;
b837b69b 241
a6523294 242 target = m68k_target - mcd_m68k_cycle_base;
243 s68k_target = mcd_s68k_cycle_base +
244 ((unsigned long long)target * mcd_m68k_cycle_mult >> 16);
245
08769494 246 elprintf(EL_CD, "s68k sync to %u, %u->%u",
247 m68k_target, now, s68k_target);
ae214f1c 248
4fb43555 249 if (Pico_mcd->m.busreq != 1) { /* busreq/reset */
ae214f1c 250 SekCycleCntS68k = SekCycleAimS68k = s68k_target;
251 pcd_run_events(m68k_target);
08769494 252 return 0;
ae214f1c 253 }
254
255 while (CYCLES_GT(s68k_target, now)) {
256 if (event_time_next && CYCLES_GE(now, event_time_next))
257 pcd_run_events(now);
258
259 target = s68k_target;
260 if (event_time_next && CYCLES_GT(target, event_time_next))
261 target = event_time_next;
262
263 SekRunS68k(target);
08769494 264 if (m68k_poll_sync && Pico_mcd->m.m68k_poll_cnt == 0)
265 break;
ae214f1c 266 }
08769494 267
268 return s68k_target - now;
ae214f1c 269 #undef now
c987bb5c 270}
ae214f1c 271
ba6e8bfd 272#define pcd_run_cpus_normal pcd_run_cpus
273//#define pcd_run_cpus_lockstep pcd_run_cpus
274
08769494 275static void SekSyncM68k(void);
276
fa8fb754 277void pcd_run_cpus_normal(int m68k_cycles)
08769494 278{
279 SekCycleAim += m68k_cycles;
30e8aac4 280 if (SekShouldInterrupt() || Pico_mcd->m.m68k_poll_cnt < 12)
cc5ffc3c 281 Pico_mcd->m.m68k_poll_cnt = 0;
282 else if (Pico_mcd->m.m68k_poll_cnt >= 16) {
08769494 283 int s68k_left = pcd_sync_s68k(SekCycleAim, 1);
284 if (s68k_left <= 0) {
ba6e8bfd 285 elprintf(EL_CDPOLL, "m68k poll [%02x] x%d @%06x",
08769494 286 Pico_mcd->m.m68k_poll_a, Pico_mcd->m.m68k_poll_cnt, SekPc);
287 SekCycleCnt = SekCycleAim;
288 return;
289 }
290 SekCycleCnt = SekCycleAim - (s68k_left * 40220 >> 16);
291 }
292
293 SekSyncM68k();
294}
295
fa8fb754 296void pcd_run_cpus_lockstep(int m68k_cycles)
ba6e8bfd 297{
298 unsigned int target = SekCycleAim + m68k_cycles;
299 do {
300 SekCycleAim += 8;
301 SekSyncM68k();
302 pcd_sync_s68k(SekCycleAim, 0);
303 } while (CYCLES_GT(target, SekCycleAim));
cc5ffc3c 304
305 SekCycleAim = target;
ba6e8bfd 306}
307
ae214f1c 308#define PICO_CD
309#define CPUS_RUN(m68k_cycles) \
08769494 310 pcd_run_cpus(m68k_cycles)
ae214f1c 311
efcba75f 312#include "../pico_cmn.c"
cc68a136 313
314
a6523294 315void pcd_prepare_frame(void)
316{
317 pcd_set_cycle_mult();
318
319 // need this because we can't have direct mapping between
320 // master<->slave cycle counters because of overflows
321 mcd_m68k_cycle_base = SekCycleAim;
322 mcd_s68k_cycle_base = SekCycleAimS68k;
323}
324
2aa27095 325PICO_INTERNAL void PicoFrameMCD(void)
cc68a136 326{
a6523294 327 PicoFrameStart();
cc68a136 328
a6523294 329 pcd_prepare_frame();
bf5fbbb4 330 PicoFrameHints();
cc68a136 331}
332
ae214f1c 333void pcd_state_loaded(void)
334{
335 unsigned int cycles;
336 int diff;
337
8e4e84c2 338 pcd_set_cycle_mult();
ae214f1c 339 pcd_state_loaded_mem();
340
33be04ca 341 memset(Pico_mcd->pcm_mixbuf, 0, sizeof(Pico_mcd->pcm_mixbuf));
342 Pico_mcd->pcm_mixbuf_dirty = 0;
343 Pico_mcd->pcm_mixpos = 0;
021e47b3 344 Pico_mcd->pcm_regs_dirty = 1;
33be04ca 345
ae214f1c 346 // old savestates..
347 cycles = pcd_cycles_m68k_to_s68k(SekCycleAim);
348 diff = cycles - SekCycleAimS68k;
349 if (diff < -1000 || diff > 1000) {
350 SekCycleCntS68k = SekCycleAimS68k = cycles;
351 }
352 if (pcd_event_times[PCD_EVENT_CDC] == 0) {
353 pcd_event_schedule(SekCycleAimS68k, PCD_EVENT_CDC, 12500000/75);
354
355 if (Pico_mcd->s68k_regs[0x31])
356 pcd_event_schedule(SekCycleAimS68k, PCD_EVENT_TIMER3,
357 Pico_mcd->s68k_regs[0x31] * 384);
358
ae214f1c 359 if (Pico_mcd->scd.Status_CDC & 0x08)
360 Update_CDC_TRansfer(Pico_mcd->s68k_regs[4] & 7);
361 }
334d9fb6 362
363 diff = cycles - Pico_mcd->pcm.update_cycles;
364 if ((unsigned int)diff > 12500000/50)
33be04ca 365 Pico_mcd->pcm.update_cycles = cycles;
8e4e84c2 366
367 // reschedule
368 event_time_next = 0;
369 pcd_run_events(SekCycleCntS68k);
ae214f1c 370}
cc68a136 371
ae214f1c 372// vim:shiftwidth=2:ts=2:expandtab