cff531af |
1 | /*\r |
2 | * PicoDrive\r |
3 | * (c) Copyright Dave, 2004\r |
4 | * (C) notaz, 2006-2010\r |
5 | *\r |
6 | * This work is licensed under the terms of MAME license.\r |
7 | * See COPYING file in the top-level directory.\r |
8 | */\r |
cc68a136 |
9 | \r |
efcba75f |
10 | #include "pico_int.h"\r |
cc68a136 |
11 | #include "sound/ym2612.h"\r |
12 | \r |
cc68a136 |
13 | struct Pico Pico;\r |
88fd63ad |
14 | struct PicoMem PicoMem;\r |
93f9619e |
15 | PicoInterface PicoIn;\r |
602133e1 |
16 | \r |
f8ef8ff7 |
17 | void (*PicoResetHook)(void) = NULL;\r |
b0677887 |
18 | void (*PicoLineHook)(void) = NULL;\r |
cc68a136 |
19 | \r |
cc68a136 |
20 | // to be called once on emu init\r |
2aa27095 |
21 | void PicoInit(void)\r |
cc68a136 |
22 | {\r |
23 | // Blank space for state:\r |
24 | memset(&Pico,0,sizeof(Pico));\r |
88fd63ad |
25 | memset(&PicoMem,0,sizeof(PicoMem));\r |
93f9619e |
26 | memset(&PicoIn.pad,0,sizeof(PicoIn.pad));\r |
27 | memset(&PicoIn.padInt,0,sizeof(PicoIn.padInt));\r |
cc68a136 |
28 | \r |
88fd63ad |
29 | Pico.est.Pico = &Pico;\r |
30 | Pico.est.PicoMem_vram = PicoMem.vram;\r |
31 | Pico.est.PicoMem_cram = PicoMem.cram;\r |
93f9619e |
32 | Pico.est.PicoOpt = &PicoIn.opt;\r |
ea38612f |
33 | \r |
cc68a136 |
34 | // Init CPUs:\r |
35 | SekInit();\r |
36 | z80_init(); // init even if we aren't going to use it\r |
37 | \r |
cc68a136 |
38 | PicoInitMCD();\r |
e807ac75 |
39 | PicoSVPInit();\r |
be2c4208 |
40 | Pico32xInit();\r |
99bdfd31 |
41 | \r |
42 | PicoDrawInit();\r |
98a27142 |
43 | PicoDraw2Init();\r |
cc68a136 |
44 | }\r |
45 | \r |
46 | // to be called once on emu exit\r |
47 | void PicoExit(void)\r |
48 | {\r |
93f9619e |
49 | if (PicoIn.AHW & PAHW_MCD)\r |
4f265db7 |
50 | PicoExitMCD();\r |
ca482e5d |
51 | PicoCartUnload();\r |
cc68a136 |
52 | z80_exit();\r |
53 | \r |
a4fa71d4 |
54 | free(Pico.sv.data);\r |
55 | Pico.sv.data = NULL;\r |
56 | Pico.sv.start = Pico.sv.end = 0;\r |
19886062 |
57 | pevt_dump();\r |
cc68a136 |
58 | }\r |
59 | \r |
1cb1584b |
60 | void PicoPower(void)\r |
61 | {\r |
053fd9b4 |
62 | Pico.m.frame_count = 0;\r |
88fd63ad |
63 | Pico.t.m68c_cnt = Pico.t.m68c_aim = 0;\r |
053fd9b4 |
64 | \r |
1cb1584b |
65 | // clear all memory of the emulated machine\r |
88fd63ad |
66 | memset(&PicoMem,0,sizeof(PicoMem));\r |
1cb1584b |
67 | \r |
68 | memset(&Pico.video,0,sizeof(Pico.video));\r |
69 | memset(&Pico.m,0,sizeof(Pico.m));\r |
70 | \r |
71 | Pico.video.pending_ints=0;\r |
72 | z80_reset();\r |
73 | \r |
531a8f38 |
74 | // my MD1 VA6 console has this in IO\r |
88fd63ad |
75 | PicoMem.ioports[1] = PicoMem.ioports[2] = PicoMem.ioports[3] = 0xff;\r |
531a8f38 |
76 | \r |
1cb1584b |
77 | // default VDP register values (based on Fusion)\r |
78 | Pico.video.reg[0] = Pico.video.reg[1] = 0x04;\r |
79 | Pico.video.reg[0xc] = 0x81;\r |
80 | Pico.video.reg[0xf] = 0x02;\r |
81 | \r |
93f9619e |
82 | if (PicoIn.AHW & PAHW_MCD)\r |
1cb1584b |
83 | PicoPowerMCD();\r |
84 | \r |
93f9619e |
85 | if (PicoIn.opt & POPT_EN_32X)\r |
974fdb5b |
86 | PicoPower32x();\r |
87 | \r |
1cb1584b |
88 | PicoReset();\r |
89 | }\r |
90 | \r |
1e6b5e39 |
91 | PICO_INTERNAL void PicoDetectRegion(void)\r |
cc68a136 |
92 | {\r |
1e6b5e39 |
93 | int support=0, hw=0, i;\r |
cc68a136 |
94 | unsigned char pal=0;\r |
cc68a136 |
95 | \r |
93f9619e |
96 | if (PicoIn.regionOverride)\r |
cc68a136 |
97 | {\r |
93f9619e |
98 | support = PicoIn.regionOverride;\r |
cc68a136 |
99 | }\r |
100 | else\r |
101 | {\r |
102 | // Read cartridge region data:\r |
af37bca8 |
103 | unsigned short *rd = (unsigned short *)(Pico.rom + 0x1f0);\r |
104 | int region = (rd[0] << 16) | rd[1];\r |
cc68a136 |
105 | \r |
af37bca8 |
106 | for (i = 0; i < 4; i++)\r |
cc68a136 |
107 | {\r |
af37bca8 |
108 | int c;\r |
cc68a136 |
109 | \r |
af37bca8 |
110 | c = region >> (i<<3);\r |
111 | c &= 0xff;\r |
112 | if (c <= ' ') continue;\r |
cc68a136 |
113 | \r |
51a902ae |
114 | if (c=='J') support|=1;\r |
115 | else if (c=='U') support|=4;\r |
116 | else if (c=='E') support|=8;\r |
117 | else if (c=='j') {support|=1; break; }\r |
118 | else if (c=='u') {support|=4; break; }\r |
119 | else if (c=='e') {support|=8; break; }\r |
cc68a136 |
120 | else\r |
121 | {\r |
122 | // New style code:\r |
123 | char s[2]={0,0};\r |
124 | s[0]=(char)c;\r |
125 | support|=strtol(s,NULL,16);\r |
126 | }\r |
127 | }\r |
128 | }\r |
129 | \r |
51a902ae |
130 | // auto detection order override\r |
93f9619e |
131 | if (PicoIn.autoRgnOrder) {\r |
132 | if (((PicoIn.autoRgnOrder>>0)&0xf) & support) support = (PicoIn.autoRgnOrder>>0)&0xf;\r |
133 | else if (((PicoIn.autoRgnOrder>>4)&0xf) & support) support = (PicoIn.autoRgnOrder>>4)&0xf;\r |
134 | else if (((PicoIn.autoRgnOrder>>8)&0xf) & support) support = (PicoIn.autoRgnOrder>>8)&0xf;\r |
51a902ae |
135 | }\r |
136 | \r |
cc68a136 |
137 | // Try to pick the best hardware value for English/50hz:\r |
138 | if (support&8) { hw=0xc0; pal=1; } // Europe\r |
139 | else if (support&4) hw=0x80; // USA\r |
140 | else if (support&2) { hw=0x40; pal=1; } // Japan PAL\r |
141 | else if (support&1) hw=0x00; // Japan NTSC\r |
142 | else hw=0x80; // USA\r |
143 | \r |
144 | Pico.m.hardware=(unsigned char)(hw|0x20); // No disk attached\r |
145 | Pico.m.pal=pal;\r |
1e6b5e39 |
146 | }\r |
147 | \r |
148 | int PicoReset(void)\r |
149 | {\r |
2ec9bec5 |
150 | if (Pico.romsize <= 0)\r |
151 | return 1;\r |
1e6b5e39 |
152 | \r |
12da51c2 |
153 | #if defined(CPU_CMP_R) || defined(CPU_CMP_W) || defined(DRC_CMP)\r |
93f9619e |
154 | PicoIn.opt |= POPT_DIS_VDP_FIFO|POPT_DIS_IDLE_DET;\r |
6d797957 |
155 | #endif\r |
156 | \r |
1e6b5e39 |
157 | /* must call now, so that banking is reset, and correct vectors get fetched */\r |
2ec9bec5 |
158 | if (PicoResetHook)\r |
159 | PicoResetHook();\r |
1e6b5e39 |
160 | \r |
93f9619e |
161 | memset(&PicoIn.padInt, 0, sizeof(PicoIn.padInt));\r |
2ec9bec5 |
162 | \r |
93f9619e |
163 | if (PicoIn.AHW & PAHW_SMS) {\r |
2ec9bec5 |
164 | PicoResetMS();\r |
165 | return 0;\r |
166 | }\r |
167 | \r |
168 | SekReset();\r |
8e4e84c2 |
169 | // ..but do not reset SekCycle* to not desync with addons\r |
170 | \r |
1e6b5e39 |
171 | // s68k doesn't have the TAS quirk, so we just globally set normal TAS handler in MCD mode (used by Batman games).\r |
93f9619e |
172 | SekSetRealTAS(PicoIn.AHW & PAHW_MCD);\r |
1e6b5e39 |
173 | \r |
1e6b5e39 |
174 | Pico.m.dirtyPal = 1;\r |
175 | \r |
1832075e |
176 | Pico.m.z80_bank68k = 0;\r |
af37bca8 |
177 | Pico.m.z80_reset = 1;\r |
1832075e |
178 | \r |
1e6b5e39 |
179 | PicoDetectRegion();\r |
e5fa9817 |
180 | Pico.video.status = 0x3428 | Pico.m.pal; // 'always set' bits | vblank | collision | pal\r |
cc68a136 |
181 | \r |
9d917eea |
182 | PsndReset(); // pal must be known here\r |
cc68a136 |
183 | \r |
1cb1584b |
184 | // create an empty "dma" to cause 68k exec start at random frame location\r |
93f9619e |
185 | if (Pico.m.dma_xfers == 0 && !(PicoIn.opt & POPT_DIS_VDP_FIFO))\r |
1cb1584b |
186 | Pico.m.dma_xfers = rand() & 0x1fff;\r |
187 | \r |
5ed2a20e |
188 | SekFinishIdleDet();\r |
189 | \r |
93f9619e |
190 | if (PicoIn.AHW & PAHW_MCD) {\r |
1cb1584b |
191 | PicoResetMCD();\r |
cc68a136 |
192 | return 0;\r |
193 | }\r |
5ed2a20e |
194 | \r |
195 | // reinit, so that checksum checks pass\r |
93f9619e |
196 | if (!(PicoIn.opt & POPT_DIS_IDLE_DET))\r |
5ed2a20e |
197 | SekInitIdleDet();\r |
cc68a136 |
198 | \r |
93f9619e |
199 | if (PicoIn.opt & POPT_EN_32X)\r |
be2c4208 |
200 | PicoReset32x();\r |
be2c4208 |
201 | \r |
1dceadae |
202 | // reset sram state; enable sram access by default if it doesn't overlap with ROM\r |
45f2f245 |
203 | Pico.m.sram_reg = 0;\r |
88fd63ad |
204 | if ((Pico.sv.flags & SRF_EEPROM) || Pico.romsize <= Pico.sv.start)\r |
45f2f245 |
205 | Pico.m.sram_reg |= SRR_MAPPED;\r |
cc68a136 |
206 | \r |
88fd63ad |
207 | if (Pico.sv.flags & SRF_ENABLED)\r |
208 | elprintf(EL_STATUS, "sram: %06x - %06x; eeprom: %i", Pico.sv.start, Pico.sv.end,\r |
209 | !!(Pico.sv.flags & SRF_EEPROM));\r |
cc68a136 |
210 | \r |
211 | return 0;\r |
212 | }\r |
213 | \r |
46bcb899 |
214 | // flush config changes before emu loop starts\r |
5e128c6d |
215 | void PicoLoopPrepare(void)\r |
216 | {\r |
93f9619e |
217 | if (PicoIn.regionOverride)\r |
5e128c6d |
218 | // force setting possibly changed..\r |
93f9619e |
219 | Pico.m.pal = (PicoIn.regionOverride == 2 || PicoIn.regionOverride == 8) ? 1 : 0;\r |
5e128c6d |
220 | \r |
2446536b |
221 | Pico.m.dirtyPal = 1;\r |
222 | rendstatus_old = -1;\r |
5e128c6d |
223 | }\r |
224 | \r |
e42a47e2 |
225 | // this table is wrong and should be removed\r |
226 | // keeping it for now to compensate wrong timing elswhere, mainly for Outrunners\r |
69996cb7 |
227 | static const int dma_timings[] = {\r |
e42a47e2 |
228 | 83, 166, 83, 83, // vblank: 32cell: dma2vram dma2[vs|c]ram vram_fill vram_copy\r |
229 | 102, 204, 102, 102, // vblank: 40cell:\r |
230 | 8, 16, 8, 8, // active: 32cell:\r |
231 | 17, 18, 9, 9 // ...\r |
4f672280 |
232 | };\r |
233 | \r |
69996cb7 |
234 | static const int dma_bsycles[] = {\r |
e42a47e2 |
235 | (488<<8)/83, (488<<8)/166, (488<<8)/83, (488<<8)/83,\r |
236 | (488<<8)/102, (488<<8)/204, (488<<8)/102, (488<<8)/102,\r |
237 | (488<<8)/8, (488<<8)/16, (488<<8)/8, (488<<8)/8,\r |
238 | (488<<8)/9, (488<<8)/18, (488<<8)/9, (488<<8)/9\r |
312e9ce1 |
239 | };\r |
240 | \r |
a4dfdb6d |
241 | // grossly inaccurate.. FIXME FIXXXMEE\r |
eff55556 |
242 | PICO_INTERNAL int CheckDMA(void)\r |
4f672280 |
243 | {\r |
69996cb7 |
244 | int burn = 0, xfers_can, dma_op = Pico.video.reg[0x17]>>6; // see gens for 00 and 01 modes\r |
245 | int xfers = Pico.m.dma_xfers;\r |
312e9ce1 |
246 | int dma_op1;\r |
4f672280 |
247 | \r |
312e9ce1 |
248 | if(!(dma_op&2)) dma_op = (Pico.video.type==1) ? 0 : 1; // setting dma_timings offset here according to Gens\r |
249 | dma_op1 = dma_op;\r |
250 | if(Pico.video.reg[12] & 1) dma_op |= 4; // 40 cell mode?\r |
251 | if(!(Pico.video.status&8)&&(Pico.video.reg[1]&0x40)) dma_op|=8; // active display?\r |
69996cb7 |
252 | xfers_can = dma_timings[dma_op];\r |
9761a7d0 |
253 | if(xfers <= xfers_can)\r |
254 | {\r |
eef77d7a |
255 | Pico.video.status &= ~SR_DMA;\r |
256 | if (!(dma_op & 2))\r |
69996cb7 |
257 | burn = xfers * dma_bsycles[dma_op] >> 8; // have to be approximate because can't afford division..\r |
69996cb7 |
258 | Pico.m.dma_xfers = 0;\r |
4f672280 |
259 | } else {\r |
260 | if(!(dma_op&2)) burn = 488;\r |
69996cb7 |
261 | Pico.m.dma_xfers -= xfers_can;\r |
4f672280 |
262 | }\r |
263 | \r |
0c7d1ba3 |
264 | elprintf(EL_VDPDMA, "~Dma %i op=%i can=%i burn=%i [%u]",\r |
265 | Pico.m.dma_xfers, dma_op1, xfers_can, burn, SekCyclesDone());\r |
88fd63ad |
266 | //dprintf("~aim: %i, cnt: %i", Pico.t.m68c_aim, Pico.t.m68c_cnt);\r |
312e9ce1 |
267 | return burn;\r |
4f672280 |
268 | }\r |
269 | \r |
efcba75f |
270 | #include "pico_cmn.c"\r |
4b9c5888 |
271 | \r |
4b9c5888 |
272 | /* sync z80 to 68k */\r |
ae214f1c |
273 | PICO_INTERNAL void PicoSyncZ80(unsigned int m68k_cycles_done)\r |
cc68a136 |
274 | {\r |
a6523294 |
275 | int m68k_cnt;\r |
4b9c5888 |
276 | int cnt;\r |
a6523294 |
277 | \r |
88fd63ad |
278 | m68k_cnt = m68k_cycles_done - Pico.t.m68c_frame_start;\r |
279 | Pico.t.z80c_aim = cycles_68k_to_z80(m68k_cnt);\r |
280 | cnt = Pico.t.z80c_aim - Pico.t.z80c_cnt;\r |
cc68a136 |
281 | \r |
f6c49d38 |
282 | pprof_start(z80);\r |
283 | \r |
ae214f1c |
284 | elprintf(EL_BUSREQ, "z80 sync %i (%u|%u -> %u|%u)", cnt,\r |
88fd63ad |
285 | Pico.t.z80c_cnt, Pico.t.z80c_cnt * 15 / 7 / 488,\r |
286 | Pico.t.z80c_aim, Pico.t.z80c_aim * 15 / 7 / 488);\r |
4b9c5888 |
287 | \r |
288 | if (cnt > 0)\r |
88fd63ad |
289 | Pico.t.z80c_cnt += z80_run(cnt);\r |
f6c49d38 |
290 | \r |
291 | pprof_end(z80);\r |
cc68a136 |
292 | }\r |
293 | \r |
4b9c5888 |
294 | \r |
2aa27095 |
295 | void PicoFrame(void)\r |
cc68a136 |
296 | {\r |
f6c49d38 |
297 | pprof_start(frame);\r |
298 | \r |
8c1952f0 |
299 | Pico.m.frame_count++;\r |
300 | \r |
93f9619e |
301 | if (PicoIn.AHW & PAHW_SMS) {\r |
19954be1 |
302 | PicoFrameMS();\r |
f6c49d38 |
303 | goto end;\r |
cc68a136 |
304 | }\r |
19954be1 |
305 | \r |
93f9619e |
306 | if (PicoIn.AHW & PAHW_32X) {\r |
fa8fb754 |
307 | PicoFrame32x(); // also does MCD+32X\r |
f6c49d38 |
308 | goto end;\r |
3e49ffd0 |
309 | }\r |
cc68a136 |
310 | \r |
93f9619e |
311 | if (PicoIn.AHW & PAHW_MCD) {\r |
fa8fb754 |
312 | PicoFrameMCD();\r |
f6c49d38 |
313 | goto end;\r |
974fdb5b |
314 | }\r |
315 | \r |
cc68a136 |
316 | //if(Pico.video.reg[12]&0x2) Pico.video.status ^= 0x10; // change odd bit in interlace mode\r |
317 | \r |
19954be1 |
318 | PicoFrameStart();\r |
2aa27095 |
319 | PicoFrameHints();\r |
f6c49d38 |
320 | \r |
321 | end:\r |
322 | pprof_end(frame);\r |
cc68a136 |
323 | }\r |
324 | \r |
a12e0116 |
325 | void PicoFrameDrawOnly(void)\r |
326 | {\r |
93f9619e |
327 | if (!(PicoIn.AHW & PAHW_SMS)) {\r |
87b0845f |
328 | PicoFrameStart();\r |
329 | PicoDrawSync(223, 0);\r |
330 | } else {\r |
331 | PicoFrameDrawOnlyMS();\r |
332 | }\r |
a12e0116 |
333 | }\r |
334 | \r |
4609d0cd |
335 | void PicoGetInternal(pint_t which, pint_ret_t *r)\r |
8e5427a0 |
336 | {\r |
337 | switch (which)\r |
338 | {\r |
4609d0cd |
339 | case PI_ROM: r->vptr = Pico.rom; break;\r |
340 | case PI_ISPAL: r->vint = Pico.m.pal; break;\r |
341 | case PI_IS40_CELL: r->vint = Pico.video.reg[12]&1; break;\r |
342 | case PI_IS240_LINES: r->vint = Pico.m.pal && (Pico.video.reg[1]&8); break;\r |
8e5427a0 |
343 | }\r |
8e5427a0 |
344 | }\r |
345 | \r |
6311a3ba |
346 | // vim:ts=2:sw=2:expandtab\r |