cd: switch to CD controller code from genplus
[picodrive.git] / pico / cd / mcd.c
CommitLineData
cff531af 1/*
2 * PicoDrive
ae214f1c 3 * (C) notaz, 2007,2013
cff531af 4 *
5 * This work is licensed under the terms of MAME license.
6 * See COPYING file in the top-level directory.
7 */
cc68a136 8
efcba75f 9#include "../pico_int.h"
43e6eaad 10#include "../sound/ym2612.h"
cc68a136 11
76276b0b 12extern unsigned char formatted_bram[4*0x10];
ae214f1c 13
a6523294 14static unsigned int mcd_m68k_cycle_mult;
15static unsigned int mcd_m68k_cycle_base;
16static unsigned int mcd_s68k_cycle_base;
89fa852d 17
721cd396 18void (*PicoMCDopenTray)(void) = NULL;
d687ef50 19void (*PicoMCDcloseTray)(void) = NULL;
89fa852d 20
cc68a136 21
2aa27095 22PICO_INTERNAL void PicoInitMCD(void)
cc68a136 23{
24 SekInitS68k();
25 Init_CD_Driver();
a93a80de 26 gfx_init();
cc68a136 27}
28
eff55556 29PICO_INTERNAL void PicoExitMCD(void)
cc68a136 30{
31 End_CD_Driver();
32}
33
1cb1584b 34PICO_INTERNAL void PicoPowerMCD(void)
35{
8e4e84c2 36 SekCycleCntS68k = SekCycleAimS68k = 0;
37
1cb1584b 38 int fmt_size = sizeof(formatted_bram);
39 memset(Pico_mcd->prg_ram, 0, sizeof(Pico_mcd->prg_ram));
40 memset(Pico_mcd->word_ram2M, 0, sizeof(Pico_mcd->word_ram2M));
41 memset(Pico_mcd->pcm_ram, 0, sizeof(Pico_mcd->pcm_ram));
42 memset(Pico_mcd->bram, 0, sizeof(Pico_mcd->bram));
4fb43555 43 memcpy(Pico_mcd->bram + sizeof(Pico_mcd->bram) - fmt_size,
44 formatted_bram, fmt_size);
51a902ae 45 memset(Pico_mcd->s68k_regs, 0, sizeof(Pico_mcd->s68k_regs));
4f265db7 46 memset(&Pico_mcd->pcm, 0, sizeof(Pico_mcd->pcm));
5c69a605 47 memset(&Pico_mcd->m, 0, sizeof(Pico_mcd->m));
51a902ae 48
3f23709e 49 cdc_init();
d0132772 50 Reset_CD();
51
4fb43555 52 // cold reset state (tested)
53 Pico_mcd->m.state_flags = PCD_ST_S68K_RST;
54 Pico_mcd->m.busreq = 2; // busreq on, s68k in reset
55 Pico_mcd->s68k_regs[3] = 1; // 2M word RAM mode, m68k access
4fb43555 56 memset(Pico_mcd->bios + 0x70, 0xff, 4);
57}
cc68a136 58
d0132772 59void pcd_soft_reset(void)
4fb43555 60{
d0132772 61 // Reset_CD(); // breaks Fahrenheit CD swap
62
3f23709e 63 Pico_mcd->m.s68k_pend_ints = 0;
64 cdc_reset();
65 CDD_Reset();
3aa1e148 66#ifdef _ASM_CD_MEMORY_C
00bd648e 67 //PicoMemResetCDdecode(1); // don't have to call this in 2M mode
4ff2d527 68#endif
cc68a136 69
d0132772 70 pcd_event_schedule_s68k(PCD_EVENT_CDC, 12500000/75);
71
72 // TODO: test if register state/timers change
73}
74
75PICO_INTERNAL int PicoResetMCD(void)
76{
77 // reset button doesn't affect MCD hardware
78
6cadc2da 79 // use SRam.data for RAM cart
af37bca8 80 if (PicoOpt & POPT_EN_MCD_RAMCART) {
d6114368 81 if (SRam.data == NULL)
82 SRam.data = calloc(1, 0x12000);
83 }
84 else if (SRam.data != NULL) {
85 free(SRam.data);
86 SRam.data = NULL;
87 }
b542be46 88 SRam.start = SRam.end = 0; // unused
6cadc2da 89
cc68a136 90 return 0;
91}
92
ae214f1c 93static __inline void SekRunS68k(unsigned int to)
cc68a136 94{
95 int cyc_do;
ae214f1c 96
97 SekCycleAimS68k = to;
98 if ((cyc_do = SekCycleAimS68k - SekCycleCntS68k) <= 0)
99 return;
100
30e8aac4 101 if (SekShouldInterrupt())
102 Pico_mcd->m.s68k_poll_a = 0;
103
ae214f1c 104 SekCycleCntS68k += cyc_do;
105#if defined(EMU_C68K)
106 PicoCpuCS68k.cycles = cyc_do;
3aa1e148 107 CycloneRun(&PicoCpuCS68k);
ae214f1c 108 SekCycleCntS68k -= PicoCpuCS68k.cycles;
b837b69b 109#elif defined(EMU_M68K)
3aa1e148 110 m68k_set_context(&PicoCpuMS68k);
ae214f1c 111 SekCycleCntS68k += m68k_execute(cyc_do) - cyc_do;
ed4402a7 112 m68k_set_context(&PicoCpuMM68k);
3aa1e148 113#elif defined(EMU_F68K)
ae214f1c 114 g_m68kcontext = &PicoCpuFS68k;
99ade2ee 115 SekCycleCntS68k += fm68k_emulate(cyc_do, 0) - cyc_do;
ae214f1c 116 g_m68kcontext = &PicoCpuFM68k;
cc68a136 117#endif
118}
119
8e4e84c2 120static void pcd_set_cycle_mult(void)
121{
122 // ~1.63 for NTSC, ~1.645 for PAL
123 if (Pico.m.pal)
a6523294 124 mcd_m68k_cycle_mult = ((12500000ull << 16) / (50*312*488));
8e4e84c2 125 else
a6523294 126 mcd_m68k_cycle_mult = ((12500000ull << 16) / (60*262*488)) + 1;
8e4e84c2 127}
68cba51e 128
ae214f1c 129unsigned int pcd_cycles_m68k_to_s68k(unsigned int c)
8022f53d 130{
a6523294 131 return (long long)c * mcd_m68k_cycle_mult >> 16;
8022f53d 132}
ae214f1c 133
134/* events */
135static void pcd_cdc_event(unsigned int now)
68cba51e 136{
ae214f1c 137 // 75Hz CDC update
138 Check_CD_Command();
139 pcd_event_schedule(now, PCD_EVENT_CDC, 12500000/75);
140}
7336a99a 141
ae214f1c 142static void pcd_int3_timer_event(unsigned int now)
143{
144 if (Pico_mcd->s68k_regs[0x33] & PCDS_IEN3) {
145 elprintf(EL_INTS|EL_CD, "s68k: timer irq 3");
146 SekInterruptS68k(3);
147 }
7336a99a 148
ae214f1c 149 if (Pico_mcd->s68k_regs[0x31] != 0)
150 pcd_event_schedule(now, PCD_EVENT_TIMER3,
151 Pico_mcd->s68k_regs[0x31] * 384);
152}
153
ae214f1c 154static void pcd_dma_event(unsigned int now)
155{
3f23709e 156 cdc_dma_update();
ae214f1c 157}
68cba51e 158
ae214f1c 159typedef void (event_cb)(unsigned int now);
160
161/* times are in s68k (12.5MHz) cycles */
162unsigned int pcd_event_times[PCD_EVENT_COUNT];
163static unsigned int event_time_next;
164static event_cb *pcd_event_cbs[PCD_EVENT_COUNT] = {
165 [PCD_EVENT_CDC] = pcd_cdc_event,
166 [PCD_EVENT_TIMER3] = pcd_int3_timer_event,
a93a80de 167 [PCD_EVENT_GFX] = gfx_update,
ae214f1c 168 [PCD_EVENT_DMA] = pcd_dma_event,
169};
170
171void pcd_event_schedule(unsigned int now, enum pcd_event event, int after)
bf098bc5 172{
ae214f1c 173 unsigned int when;
174
175 when = now + after;
176 if (when == 0) {
177 // event cancelled
178 pcd_event_times[event] = 0;
179 return;
180 }
bf098bc5 181
ae214f1c 182 when |= 1;
bf098bc5 183
ae214f1c 184 elprintf(EL_CD, "cd: new event #%u %u->%u", event, now, when);
185 pcd_event_times[event] = when;
bf098bc5 186
ae214f1c 187 if (event_time_next == 0 || CYCLES_GT(event_time_next, when))
188 event_time_next = when;
bf098bc5 189}
190
ae214f1c 191void pcd_event_schedule_s68k(enum pcd_event event, int after)
4f265db7 192{
ae214f1c 193 if (SekCyclesLeftS68k > after)
194 SekEndRunS68k(after);
4f265db7 195
ae214f1c 196 pcd_event_schedule(SekCyclesDoneS68k(), event, after);
197}
4f265db7 198
ae214f1c 199static void pcd_run_events(unsigned int until)
200{
201 int oldest, oldest_diff, time;
202 int i, diff;
203
204 while (1) {
205 oldest = -1, oldest_diff = 0x7fffffff;
206
207 for (i = 0; i < PCD_EVENT_COUNT; i++) {
208 if (pcd_event_times[i]) {
209 diff = pcd_event_times[i] - until;
210 if (diff < oldest_diff) {
211 oldest_diff = diff;
212 oldest = i;
213 }
214 }
215 }
216
217 if (oldest_diff <= 0) {
218 time = pcd_event_times[oldest];
219 pcd_event_times[oldest] = 0;
220 elprintf(EL_CD, "cd: run event #%d %u", oldest, time);
221 pcd_event_cbs[oldest](time);
222 }
223 else if (oldest_diff < 0x7fffffff) {
224 event_time_next = pcd_event_times[oldest];
225 break;
226 }
227 else {
228 event_time_next = 0;
229 break;
230 }
231 }
4f265db7 232
ae214f1c 233 if (oldest != -1)
234 elprintf(EL_CD, "cd: next event #%d at %u",
235 oldest, event_time_next);
4f265db7 236}
237
08769494 238int pcd_sync_s68k(unsigned int m68k_target, int m68k_poll_sync)
ae214f1c 239{
240 #define now SekCycleCntS68k
a6523294 241 unsigned int s68k_target;
ae214f1c 242 unsigned int target;
b837b69b 243
a6523294 244 target = m68k_target - mcd_m68k_cycle_base;
245 s68k_target = mcd_s68k_cycle_base +
246 ((unsigned long long)target * mcd_m68k_cycle_mult >> 16);
247
08769494 248 elprintf(EL_CD, "s68k sync to %u, %u->%u",
249 m68k_target, now, s68k_target);
ae214f1c 250
4fb43555 251 if (Pico_mcd->m.busreq != 1) { /* busreq/reset */
ae214f1c 252 SekCycleCntS68k = SekCycleAimS68k = s68k_target;
253 pcd_run_events(m68k_target);
08769494 254 return 0;
ae214f1c 255 }
256
257 while (CYCLES_GT(s68k_target, now)) {
258 if (event_time_next && CYCLES_GE(now, event_time_next))
259 pcd_run_events(now);
260
261 target = s68k_target;
262 if (event_time_next && CYCLES_GT(target, event_time_next))
263 target = event_time_next;
264
265 SekRunS68k(target);
08769494 266 if (m68k_poll_sync && Pico_mcd->m.m68k_poll_cnt == 0)
267 break;
ae214f1c 268 }
08769494 269
270 return s68k_target - now;
ae214f1c 271 #undef now
c987bb5c 272}
ae214f1c 273
ba6e8bfd 274#define pcd_run_cpus_normal pcd_run_cpus
275//#define pcd_run_cpus_lockstep pcd_run_cpus
276
08769494 277static void SekSyncM68k(void);
278
fa8fb754 279void pcd_run_cpus_normal(int m68k_cycles)
08769494 280{
281 SekCycleAim += m68k_cycles;
30e8aac4 282 if (SekShouldInterrupt() || Pico_mcd->m.m68k_poll_cnt < 12)
cc5ffc3c 283 Pico_mcd->m.m68k_poll_cnt = 0;
284 else if (Pico_mcd->m.m68k_poll_cnt >= 16) {
08769494 285 int s68k_left = pcd_sync_s68k(SekCycleAim, 1);
286 if (s68k_left <= 0) {
ba6e8bfd 287 elprintf(EL_CDPOLL, "m68k poll [%02x] x%d @%06x",
08769494 288 Pico_mcd->m.m68k_poll_a, Pico_mcd->m.m68k_poll_cnt, SekPc);
289 SekCycleCnt = SekCycleAim;
290 return;
291 }
292 SekCycleCnt = SekCycleAim - (s68k_left * 40220 >> 16);
293 }
294
295 SekSyncM68k();
296}
297
fa8fb754 298void pcd_run_cpus_lockstep(int m68k_cycles)
ba6e8bfd 299{
300 unsigned int target = SekCycleAim + m68k_cycles;
301 do {
302 SekCycleAim += 8;
303 SekSyncM68k();
304 pcd_sync_s68k(SekCycleAim, 0);
305 } while (CYCLES_GT(target, SekCycleAim));
cc5ffc3c 306
307 SekCycleAim = target;
ba6e8bfd 308}
309
ae214f1c 310#define PICO_CD
311#define CPUS_RUN(m68k_cycles) \
08769494 312 pcd_run_cpus(m68k_cycles)
ae214f1c 313
efcba75f 314#include "../pico_cmn.c"
cc68a136 315
316
a6523294 317void pcd_prepare_frame(void)
318{
319 pcd_set_cycle_mult();
320
321 // need this because we can't have direct mapping between
322 // master<->slave cycle counters because of overflows
323 mcd_m68k_cycle_base = SekCycleAim;
324 mcd_s68k_cycle_base = SekCycleAimS68k;
325}
326
2aa27095 327PICO_INTERNAL void PicoFrameMCD(void)
cc68a136 328{
a6523294 329 PicoFrameStart();
cc68a136 330
a6523294 331 pcd_prepare_frame();
bf5fbbb4 332 PicoFrameHints();
cc68a136 333}
334
ae214f1c 335void pcd_state_loaded(void)
336{
337 unsigned int cycles;
338 int diff;
339
8e4e84c2 340 pcd_set_cycle_mult();
ae214f1c 341 pcd_state_loaded_mem();
342
33be04ca 343 memset(Pico_mcd->pcm_mixbuf, 0, sizeof(Pico_mcd->pcm_mixbuf));
344 Pico_mcd->pcm_mixbuf_dirty = 0;
345 Pico_mcd->pcm_mixpos = 0;
021e47b3 346 Pico_mcd->pcm_regs_dirty = 1;
33be04ca 347
ae214f1c 348 // old savestates..
349 cycles = pcd_cycles_m68k_to_s68k(SekCycleAim);
350 diff = cycles - SekCycleAimS68k;
351 if (diff < -1000 || diff > 1000) {
352 SekCycleCntS68k = SekCycleAimS68k = cycles;
353 }
354 if (pcd_event_times[PCD_EVENT_CDC] == 0) {
355 pcd_event_schedule(SekCycleAimS68k, PCD_EVENT_CDC, 12500000/75);
356
357 if (Pico_mcd->s68k_regs[0x31])
358 pcd_event_schedule(SekCycleAimS68k, PCD_EVENT_TIMER3,
359 Pico_mcd->s68k_regs[0x31] * 384);
ae214f1c 360 }
334d9fb6 361
362 diff = cycles - Pico_mcd->pcm.update_cycles;
363 if ((unsigned int)diff > 12500000/50)
33be04ca 364 Pico_mcd->pcm.update_cycles = cycles;
8e4e84c2 365
366 // reschedule
367 event_time_next = 0;
368 pcd_run_events(SekCycleCntS68k);
ae214f1c 369}
cc68a136 370
ae214f1c 371// vim:shiftwidth=2:ts=2:expandtab