handle 'bad' dma better
[picodrive.git] / pico / pico.c
CommitLineData
cff531af 1/*\r
2 * PicoDrive\r
3 * (c) Copyright Dave, 2004\r
4 * (C) notaz, 2006-2010\r
5 *\r
6 * This work is licensed under the terms of MAME license.\r
7 * See COPYING file in the top-level directory.\r
8 */\r
cc68a136 9\r
efcba75f 10#include "pico_int.h"\r
cc68a136 11#include "sound/ym2612.h"\r
12\r
cc68a136 13struct Pico Pico;\r
88fd63ad 14struct PicoMem PicoMem;\r
93f9619e 15PicoInterface PicoIn;\r
602133e1 16\r
f8ef8ff7 17void (*PicoWriteSound)(int len) = NULL; // called at the best time to send sound buffer (PsndOut) to hardware\r
18void (*PicoResetHook)(void) = NULL;\r
b0677887 19void (*PicoLineHook)(void) = NULL;\r
cc68a136 20\r
cc68a136 21// to be called once on emu init\r
2aa27095 22void PicoInit(void)\r
cc68a136 23{\r
24 // Blank space for state:\r
25 memset(&Pico,0,sizeof(Pico));\r
88fd63ad 26 memset(&PicoMem,0,sizeof(PicoMem));\r
93f9619e 27 memset(&PicoIn.pad,0,sizeof(PicoIn.pad));\r
28 memset(&PicoIn.padInt,0,sizeof(PicoIn.padInt));\r
cc68a136 29\r
88fd63ad 30 Pico.est.Pico = &Pico;\r
31 Pico.est.PicoMem_vram = PicoMem.vram;\r
32 Pico.est.PicoMem_cram = PicoMem.cram;\r
93f9619e 33 Pico.est.PicoOpt = &PicoIn.opt;\r
ea38612f 34\r
cc68a136 35 // Init CPUs:\r
36 SekInit();\r
37 z80_init(); // init even if we aren't going to use it\r
38\r
cc68a136 39 PicoInitMCD();\r
e807ac75 40 PicoSVPInit();\r
be2c4208 41 Pico32xInit();\r
99bdfd31 42\r
43 PicoDrawInit();\r
98a27142 44 PicoDraw2Init();\r
cc68a136 45}\r
46\r
47// to be called once on emu exit\r
48void PicoExit(void)\r
49{\r
93f9619e 50 if (PicoIn.AHW & PAHW_MCD)\r
4f265db7 51 PicoExitMCD();\r
ca482e5d 52 PicoCartUnload();\r
cc68a136 53 z80_exit();\r
54\r
a4fa71d4 55 free(Pico.sv.data);\r
56 Pico.sv.data = NULL;\r
57 Pico.sv.start = Pico.sv.end = 0;\r
19886062 58 pevt_dump();\r
cc68a136 59}\r
60\r
1cb1584b 61void PicoPower(void)\r
62{\r
053fd9b4 63 Pico.m.frame_count = 0;\r
88fd63ad 64 Pico.t.m68c_cnt = Pico.t.m68c_aim = 0;\r
053fd9b4 65\r
1cb1584b 66 // clear all memory of the emulated machine\r
88fd63ad 67 memset(&PicoMem,0,sizeof(PicoMem));\r
1cb1584b 68\r
69 memset(&Pico.video,0,sizeof(Pico.video));\r
70 memset(&Pico.m,0,sizeof(Pico.m));\r
71\r
72 Pico.video.pending_ints=0;\r
73 z80_reset();\r
74\r
531a8f38 75 // my MD1 VA6 console has this in IO\r
88fd63ad 76 PicoMem.ioports[1] = PicoMem.ioports[2] = PicoMem.ioports[3] = 0xff;\r
531a8f38 77\r
1cb1584b 78 // default VDP register values (based on Fusion)\r
79 Pico.video.reg[0] = Pico.video.reg[1] = 0x04;\r
80 Pico.video.reg[0xc] = 0x81;\r
81 Pico.video.reg[0xf] = 0x02;\r
82\r
93f9619e 83 if (PicoIn.AHW & PAHW_MCD)\r
1cb1584b 84 PicoPowerMCD();\r
85\r
93f9619e 86 if (PicoIn.opt & POPT_EN_32X)\r
974fdb5b 87 PicoPower32x();\r
88\r
1cb1584b 89 PicoReset();\r
90}\r
91\r
1e6b5e39 92PICO_INTERNAL void PicoDetectRegion(void)\r
cc68a136 93{\r
1e6b5e39 94 int support=0, hw=0, i;\r
cc68a136 95 unsigned char pal=0;\r
cc68a136 96\r
93f9619e 97 if (PicoIn.regionOverride)\r
cc68a136 98 {\r
93f9619e 99 support = PicoIn.regionOverride;\r
cc68a136 100 }\r
101 else\r
102 {\r
103 // Read cartridge region data:\r
af37bca8 104 unsigned short *rd = (unsigned short *)(Pico.rom + 0x1f0);\r
105 int region = (rd[0] << 16) | rd[1];\r
cc68a136 106\r
af37bca8 107 for (i = 0; i < 4; i++)\r
cc68a136 108 {\r
af37bca8 109 int c;\r
cc68a136 110\r
af37bca8 111 c = region >> (i<<3);\r
112 c &= 0xff;\r
113 if (c <= ' ') continue;\r
cc68a136 114\r
51a902ae 115 if (c=='J') support|=1;\r
116 else if (c=='U') support|=4;\r
117 else if (c=='E') support|=8;\r
118 else if (c=='j') {support|=1; break; }\r
119 else if (c=='u') {support|=4; break; }\r
120 else if (c=='e') {support|=8; break; }\r
cc68a136 121 else\r
122 {\r
123 // New style code:\r
124 char s[2]={0,0};\r
125 s[0]=(char)c;\r
126 support|=strtol(s,NULL,16);\r
127 }\r
128 }\r
129 }\r
130\r
51a902ae 131 // auto detection order override\r
93f9619e 132 if (PicoIn.autoRgnOrder) {\r
133 if (((PicoIn.autoRgnOrder>>0)&0xf) & support) support = (PicoIn.autoRgnOrder>>0)&0xf;\r
134 else if (((PicoIn.autoRgnOrder>>4)&0xf) & support) support = (PicoIn.autoRgnOrder>>4)&0xf;\r
135 else if (((PicoIn.autoRgnOrder>>8)&0xf) & support) support = (PicoIn.autoRgnOrder>>8)&0xf;\r
51a902ae 136 }\r
137\r
cc68a136 138 // Try to pick the best hardware value for English/50hz:\r
139 if (support&8) { hw=0xc0; pal=1; } // Europe\r
140 else if (support&4) hw=0x80; // USA\r
141 else if (support&2) { hw=0x40; pal=1; } // Japan PAL\r
142 else if (support&1) hw=0x00; // Japan NTSC\r
143 else hw=0x80; // USA\r
144\r
145 Pico.m.hardware=(unsigned char)(hw|0x20); // No disk attached\r
146 Pico.m.pal=pal;\r
1e6b5e39 147}\r
148\r
149int PicoReset(void)\r
150{\r
2ec9bec5 151 if (Pico.romsize <= 0)\r
152 return 1;\r
1e6b5e39 153\r
12da51c2 154#if defined(CPU_CMP_R) || defined(CPU_CMP_W) || defined(DRC_CMP)\r
93f9619e 155 PicoIn.opt |= POPT_DIS_VDP_FIFO|POPT_DIS_IDLE_DET;\r
6d797957 156#endif\r
157\r
1e6b5e39 158 /* must call now, so that banking is reset, and correct vectors get fetched */\r
2ec9bec5 159 if (PicoResetHook)\r
160 PicoResetHook();\r
1e6b5e39 161\r
93f9619e 162 memset(&PicoIn.padInt, 0, sizeof(PicoIn.padInt));\r
2ec9bec5 163\r
93f9619e 164 if (PicoIn.AHW & PAHW_SMS) {\r
2ec9bec5 165 PicoResetMS();\r
166 return 0;\r
167 }\r
168\r
169 SekReset();\r
8e4e84c2 170 // ..but do not reset SekCycle* to not desync with addons\r
171\r
1e6b5e39 172 // s68k doesn't have the TAS quirk, so we just globally set normal TAS handler in MCD mode (used by Batman games).\r
93f9619e 173 SekSetRealTAS(PicoIn.AHW & PAHW_MCD);\r
1e6b5e39 174\r
1e6b5e39 175 Pico.m.dirtyPal = 1;\r
176\r
1832075e 177 Pico.m.z80_bank68k = 0;\r
af37bca8 178 Pico.m.z80_reset = 1;\r
1832075e 179\r
1e6b5e39 180 PicoDetectRegion();\r
e5fa9817 181 Pico.video.status = 0x3428 | Pico.m.pal; // 'always set' bits | vblank | collision | pal\r
cc68a136 182\r
9d917eea 183 PsndReset(); // pal must be known here\r
cc68a136 184\r
1cb1584b 185 // create an empty "dma" to cause 68k exec start at random frame location\r
93f9619e 186 if (Pico.m.dma_xfers == 0 && !(PicoIn.opt & POPT_DIS_VDP_FIFO))\r
1cb1584b 187 Pico.m.dma_xfers = rand() & 0x1fff;\r
188\r
5ed2a20e 189 SekFinishIdleDet();\r
190\r
93f9619e 191 if (PicoIn.AHW & PAHW_MCD) {\r
1cb1584b 192 PicoResetMCD();\r
cc68a136 193 return 0;\r
194 }\r
5ed2a20e 195\r
196 // reinit, so that checksum checks pass\r
93f9619e 197 if (!(PicoIn.opt & POPT_DIS_IDLE_DET))\r
5ed2a20e 198 SekInitIdleDet();\r
cc68a136 199\r
93f9619e 200 if (PicoIn.opt & POPT_EN_32X)\r
be2c4208 201 PicoReset32x();\r
be2c4208 202\r
1dceadae 203 // reset sram state; enable sram access by default if it doesn't overlap with ROM\r
45f2f245 204 Pico.m.sram_reg = 0;\r
88fd63ad 205 if ((Pico.sv.flags & SRF_EEPROM) || Pico.romsize <= Pico.sv.start)\r
45f2f245 206 Pico.m.sram_reg |= SRR_MAPPED;\r
cc68a136 207\r
88fd63ad 208 if (Pico.sv.flags & SRF_ENABLED)\r
209 elprintf(EL_STATUS, "sram: %06x - %06x; eeprom: %i", Pico.sv.start, Pico.sv.end,\r
210 !!(Pico.sv.flags & SRF_EEPROM));\r
cc68a136 211\r
212 return 0;\r
213}\r
214\r
46bcb899 215// flush config changes before emu loop starts\r
5e128c6d 216void PicoLoopPrepare(void)\r
217{\r
93f9619e 218 if (PicoIn.regionOverride)\r
5e128c6d 219 // force setting possibly changed..\r
93f9619e 220 Pico.m.pal = (PicoIn.regionOverride == 2 || PicoIn.regionOverride == 8) ? 1 : 0;\r
5e128c6d 221\r
2446536b 222 Pico.m.dirtyPal = 1;\r
223 rendstatus_old = -1;\r
5e128c6d 224}\r
225\r
e42a47e2 226// this table is wrong and should be removed\r
227// keeping it for now to compensate wrong timing elswhere, mainly for Outrunners\r
69996cb7 228static const int dma_timings[] = {\r
e42a47e2 229 83, 166, 83, 83, // vblank: 32cell: dma2vram dma2[vs|c]ram vram_fill vram_copy\r
230 102, 204, 102, 102, // vblank: 40cell:\r
231 8, 16, 8, 8, // active: 32cell:\r
232 17, 18, 9, 9 // ...\r
4f672280 233};\r
234\r
69996cb7 235static const int dma_bsycles[] = {\r
e42a47e2 236 (488<<8)/83, (488<<8)/166, (488<<8)/83, (488<<8)/83,\r
237 (488<<8)/102, (488<<8)/204, (488<<8)/102, (488<<8)/102,\r
238 (488<<8)/8, (488<<8)/16, (488<<8)/8, (488<<8)/8,\r
239 (488<<8)/9, (488<<8)/18, (488<<8)/9, (488<<8)/9\r
312e9ce1 240};\r
241\r
a4dfdb6d 242// grossly inaccurate.. FIXME FIXXXMEE\r
eff55556 243PICO_INTERNAL int CheckDMA(void)\r
4f672280 244{\r
69996cb7 245 int burn = 0, xfers_can, dma_op = Pico.video.reg[0x17]>>6; // see gens for 00 and 01 modes\r
246 int xfers = Pico.m.dma_xfers;\r
312e9ce1 247 int dma_op1;\r
4f672280 248\r
312e9ce1 249 if(!(dma_op&2)) dma_op = (Pico.video.type==1) ? 0 : 1; // setting dma_timings offset here according to Gens\r
250 dma_op1 = dma_op;\r
251 if(Pico.video.reg[12] & 1) dma_op |= 4; // 40 cell mode?\r
252 if(!(Pico.video.status&8)&&(Pico.video.reg[1]&0x40)) dma_op|=8; // active display?\r
69996cb7 253 xfers_can = dma_timings[dma_op];\r
9761a7d0 254 if(xfers <= xfers_can)\r
255 {\r
eef77d7a 256 Pico.video.status &= ~SR_DMA;\r
257 if (!(dma_op & 2))\r
69996cb7 258 burn = xfers * dma_bsycles[dma_op] >> 8; // have to be approximate because can't afford division..\r
69996cb7 259 Pico.m.dma_xfers = 0;\r
4f672280 260 } else {\r
261 if(!(dma_op&2)) burn = 488;\r
69996cb7 262 Pico.m.dma_xfers -= xfers_can;\r
4f672280 263 }\r
264\r
0c7d1ba3 265 elprintf(EL_VDPDMA, "~Dma %i op=%i can=%i burn=%i [%u]",\r
266 Pico.m.dma_xfers, dma_op1, xfers_can, burn, SekCyclesDone());\r
88fd63ad 267 //dprintf("~aim: %i, cnt: %i", Pico.t.m68c_aim, Pico.t.m68c_cnt);\r
312e9ce1 268 return burn;\r
4f672280 269}\r
270\r
efcba75f 271#include "pico_cmn.c"\r
4b9c5888 272\r
4b9c5888 273/* sync z80 to 68k */\r
ae214f1c 274PICO_INTERNAL void PicoSyncZ80(unsigned int m68k_cycles_done)\r
cc68a136 275{\r
a6523294 276 int m68k_cnt;\r
4b9c5888 277 int cnt;\r
a6523294 278\r
88fd63ad 279 m68k_cnt = m68k_cycles_done - Pico.t.m68c_frame_start;\r
280 Pico.t.z80c_aim = cycles_68k_to_z80(m68k_cnt);\r
281 cnt = Pico.t.z80c_aim - Pico.t.z80c_cnt;\r
cc68a136 282\r
f6c49d38 283 pprof_start(z80);\r
284\r
ae214f1c 285 elprintf(EL_BUSREQ, "z80 sync %i (%u|%u -> %u|%u)", cnt,\r
88fd63ad 286 Pico.t.z80c_cnt, Pico.t.z80c_cnt * 15 / 7 / 488,\r
287 Pico.t.z80c_aim, Pico.t.z80c_aim * 15 / 7 / 488);\r
4b9c5888 288\r
289 if (cnt > 0)\r
88fd63ad 290 Pico.t.z80c_cnt += z80_run(cnt);\r
f6c49d38 291\r
292 pprof_end(z80);\r
cc68a136 293}\r
294\r
4b9c5888 295\r
2aa27095 296void PicoFrame(void)\r
cc68a136 297{\r
f6c49d38 298 pprof_start(frame);\r
299\r
8c1952f0 300 Pico.m.frame_count++;\r
301\r
93f9619e 302 if (PicoIn.AHW & PAHW_SMS) {\r
19954be1 303 PicoFrameMS();\r
f6c49d38 304 goto end;\r
cc68a136 305 }\r
19954be1 306\r
93f9619e 307 if (PicoIn.AHW & PAHW_32X) {\r
fa8fb754 308 PicoFrame32x(); // also does MCD+32X\r
f6c49d38 309 goto end;\r
3e49ffd0 310 }\r
cc68a136 311\r
93f9619e 312 if (PicoIn.AHW & PAHW_MCD) {\r
fa8fb754 313 PicoFrameMCD();\r
f6c49d38 314 goto end;\r
974fdb5b 315 }\r
316\r
cc68a136 317 //if(Pico.video.reg[12]&0x2) Pico.video.status ^= 0x10; // change odd bit in interlace mode\r
318\r
19954be1 319 PicoFrameStart();\r
2aa27095 320 PicoFrameHints();\r
f6c49d38 321\r
322end:\r
323 pprof_end(frame);\r
cc68a136 324}\r
325\r
a12e0116 326void PicoFrameDrawOnly(void)\r
327{\r
93f9619e 328 if (!(PicoIn.AHW & PAHW_SMS)) {\r
87b0845f 329 PicoFrameStart();\r
330 PicoDrawSync(223, 0);\r
331 } else {\r
332 PicoFrameDrawOnlyMS();\r
333 }\r
a12e0116 334}\r
335\r
4609d0cd 336void PicoGetInternal(pint_t which, pint_ret_t *r)\r
8e5427a0 337{\r
338 switch (which)\r
339 {\r
4609d0cd 340 case PI_ROM: r->vptr = Pico.rom; break;\r
341 case PI_ISPAL: r->vint = Pico.m.pal; break;\r
342 case PI_IS40_CELL: r->vint = Pico.video.reg[12]&1; break;\r
343 case PI_IS240_LINES: r->vint = Pico.m.pal && (Pico.video.reg[1]&8); break;\r
8e5427a0 344 }\r
8e5427a0 345}\r
346\r
66fdc0f0 347// callback to output message from emu\r
348void (*PicoMessage)(const char *msg)=NULL;\r
cc68a136 349\r