cff531af |
1 | /* |
2 | * PicoDrive |
ae214f1c |
3 | * (C) notaz, 2007,2013 |
cff531af |
4 | * |
5 | * This work is licensed under the terms of MAME license. |
6 | * See COPYING file in the top-level directory. |
7 | */ |
cc68a136 |
8 | |
efcba75f |
9 | #include "../pico_int.h" |
43e6eaad |
10 | #include "../sound/ym2612.h" |
cc68a136 |
11 | |
76276b0b |
12 | extern unsigned char formatted_bram[4*0x10]; |
ae214f1c |
13 | |
a6523294 |
14 | static unsigned int mcd_m68k_cycle_mult; |
15 | static unsigned int mcd_m68k_cycle_base; |
16 | static unsigned int mcd_s68k_cycle_base; |
89fa852d |
17 | |
721cd396 |
18 | void (*PicoMCDopenTray)(void) = NULL; |
d687ef50 |
19 | void (*PicoMCDcloseTray)(void) = NULL; |
89fa852d |
20 | |
cc68a136 |
21 | |
2aa27095 |
22 | PICO_INTERNAL void PicoInitMCD(void) |
cc68a136 |
23 | { |
24 | SekInitS68k(); |
cc68a136 |
25 | } |
26 | |
eff55556 |
27 | PICO_INTERNAL void PicoExitMCD(void) |
cc68a136 |
28 | { |
cc68a136 |
29 | } |
30 | |
1cb1584b |
31 | PICO_INTERNAL void PicoPowerMCD(void) |
32 | { |
8e4e84c2 |
33 | SekCycleCntS68k = SekCycleAimS68k = 0; |
34 | |
1cb1584b |
35 | int fmt_size = sizeof(formatted_bram); |
36 | memset(Pico_mcd->prg_ram, 0, sizeof(Pico_mcd->prg_ram)); |
37 | memset(Pico_mcd->word_ram2M, 0, sizeof(Pico_mcd->word_ram2M)); |
38 | memset(Pico_mcd->pcm_ram, 0, sizeof(Pico_mcd->pcm_ram)); |
39 | memset(Pico_mcd->bram, 0, sizeof(Pico_mcd->bram)); |
4fb43555 |
40 | memcpy(Pico_mcd->bram + sizeof(Pico_mcd->bram) - fmt_size, |
41 | formatted_bram, fmt_size); |
51a902ae |
42 | memset(Pico_mcd->s68k_regs, 0, sizeof(Pico_mcd->s68k_regs)); |
4f265db7 |
43 | memset(&Pico_mcd->pcm, 0, sizeof(Pico_mcd->pcm)); |
5c69a605 |
44 | memset(&Pico_mcd->m, 0, sizeof(Pico_mcd->m)); |
274fcc35 |
45 | Pico_mcd->s68k_regs[0x38+9] = 0x0f; // default checksum |
51a902ae |
46 | |
3f23709e |
47 | cdc_init(); |
274fcc35 |
48 | cdd_reset(); |
49 | gfx_init(); |
d0132772 |
50 | |
4fb43555 |
51 | // cold reset state (tested) |
52 | Pico_mcd->m.state_flags = PCD_ST_S68K_RST; |
53 | Pico_mcd->m.busreq = 2; // busreq on, s68k in reset |
54 | Pico_mcd->s68k_regs[3] = 1; // 2M word RAM mode, m68k access |
4fb43555 |
55 | memset(Pico_mcd->bios + 0x70, 0xff, 4); |
56 | } |
cc68a136 |
57 | |
d0132772 |
58 | void pcd_soft_reset(void) |
4fb43555 |
59 | { |
d0132772 |
60 | // Reset_CD(); // breaks Fahrenheit CD swap |
61 | |
3f23709e |
62 | Pico_mcd->m.s68k_pend_ints = 0; |
63 | cdc_reset(); |
274fcc35 |
64 | cdd_reset(); |
3aa1e148 |
65 | #ifdef _ASM_CD_MEMORY_C |
00bd648e |
66 | //PicoMemResetCDdecode(1); // don't have to call this in 2M mode |
4ff2d527 |
67 | #endif |
cc68a136 |
68 | |
d0132772 |
69 | pcd_event_schedule_s68k(PCD_EVENT_CDC, 12500000/75); |
70 | |
71 | // TODO: test if register state/timers change |
72 | } |
73 | |
74 | PICO_INTERNAL int PicoResetMCD(void) |
75 | { |
76 | // reset button doesn't affect MCD hardware |
77 | |
6cadc2da |
78 | // use SRam.data for RAM cart |
af37bca8 |
79 | if (PicoOpt & POPT_EN_MCD_RAMCART) { |
d6114368 |
80 | if (SRam.data == NULL) |
81 | SRam.data = calloc(1, 0x12000); |
82 | } |
83 | else if (SRam.data != NULL) { |
84 | free(SRam.data); |
85 | SRam.data = NULL; |
86 | } |
b542be46 |
87 | SRam.start = SRam.end = 0; // unused |
6cadc2da |
88 | |
cc68a136 |
89 | return 0; |
90 | } |
91 | |
ae214f1c |
92 | static __inline void SekRunS68k(unsigned int to) |
cc68a136 |
93 | { |
94 | int cyc_do; |
ae214f1c |
95 | |
96 | SekCycleAimS68k = to; |
97 | if ((cyc_do = SekCycleAimS68k - SekCycleCntS68k) <= 0) |
98 | return; |
99 | |
30e8aac4 |
100 | if (SekShouldInterrupt()) |
101 | Pico_mcd->m.s68k_poll_a = 0; |
102 | |
ae214f1c |
103 | SekCycleCntS68k += cyc_do; |
104 | #if defined(EMU_C68K) |
105 | PicoCpuCS68k.cycles = cyc_do; |
3aa1e148 |
106 | CycloneRun(&PicoCpuCS68k); |
ae214f1c |
107 | SekCycleCntS68k -= PicoCpuCS68k.cycles; |
b837b69b |
108 | #elif defined(EMU_M68K) |
3aa1e148 |
109 | m68k_set_context(&PicoCpuMS68k); |
ae214f1c |
110 | SekCycleCntS68k += m68k_execute(cyc_do) - cyc_do; |
ed4402a7 |
111 | m68k_set_context(&PicoCpuMM68k); |
3aa1e148 |
112 | #elif defined(EMU_F68K) |
ae214f1c |
113 | g_m68kcontext = &PicoCpuFS68k; |
99ade2ee |
114 | SekCycleCntS68k += fm68k_emulate(cyc_do, 0) - cyc_do; |
ae214f1c |
115 | g_m68kcontext = &PicoCpuFM68k; |
cc68a136 |
116 | #endif |
117 | } |
118 | |
8e4e84c2 |
119 | static void pcd_set_cycle_mult(void) |
120 | { |
121 | // ~1.63 for NTSC, ~1.645 for PAL |
122 | if (Pico.m.pal) |
a6523294 |
123 | mcd_m68k_cycle_mult = ((12500000ull << 16) / (50*312*488)); |
8e4e84c2 |
124 | else |
a6523294 |
125 | mcd_m68k_cycle_mult = ((12500000ull << 16) / (60*262*488)) + 1; |
8e4e84c2 |
126 | } |
68cba51e |
127 | |
ae214f1c |
128 | unsigned int pcd_cycles_m68k_to_s68k(unsigned int c) |
8022f53d |
129 | { |
a6523294 |
130 | return (long long)c * mcd_m68k_cycle_mult >> 16; |
8022f53d |
131 | } |
ae214f1c |
132 | |
133 | /* events */ |
134 | static void pcd_cdc_event(unsigned int now) |
68cba51e |
135 | { |
ae214f1c |
136 | // 75Hz CDC update |
274fcc35 |
137 | cdd_update(); |
138 | |
139 | /* check if a new CDD command has been processed */ |
140 | if (!(Pico_mcd->s68k_regs[0x4b] & 0xf0)) |
141 | { |
142 | /* reset CDD command wait flag */ |
143 | Pico_mcd->s68k_regs[0x4b] = 0xf0; |
144 | |
145 | if (Pico_mcd->s68k_regs[0x33] & PCDS_IEN4) { |
146 | elprintf(EL_INTS|EL_CD, "s68k: cdd irq 4"); |
147 | SekInterruptS68k(4); |
148 | } |
149 | } |
150 | |
ae214f1c |
151 | pcd_event_schedule(now, PCD_EVENT_CDC, 12500000/75); |
152 | } |
7336a99a |
153 | |
ae214f1c |
154 | static void pcd_int3_timer_event(unsigned int now) |
155 | { |
156 | if (Pico_mcd->s68k_regs[0x33] & PCDS_IEN3) { |
157 | elprintf(EL_INTS|EL_CD, "s68k: timer irq 3"); |
158 | SekInterruptS68k(3); |
159 | } |
7336a99a |
160 | |
ae214f1c |
161 | if (Pico_mcd->s68k_regs[0x31] != 0) |
162 | pcd_event_schedule(now, PCD_EVENT_TIMER3, |
163 | Pico_mcd->s68k_regs[0x31] * 384); |
164 | } |
165 | |
ae214f1c |
166 | static void pcd_dma_event(unsigned int now) |
167 | { |
3f23709e |
168 | cdc_dma_update(); |
ae214f1c |
169 | } |
68cba51e |
170 | |
ae214f1c |
171 | typedef void (event_cb)(unsigned int now); |
172 | |
173 | /* times are in s68k (12.5MHz) cycles */ |
174 | unsigned int pcd_event_times[PCD_EVENT_COUNT]; |
175 | static unsigned int event_time_next; |
176 | static event_cb *pcd_event_cbs[PCD_EVENT_COUNT] = { |
177 | [PCD_EVENT_CDC] = pcd_cdc_event, |
178 | [PCD_EVENT_TIMER3] = pcd_int3_timer_event, |
a93a80de |
179 | [PCD_EVENT_GFX] = gfx_update, |
ae214f1c |
180 | [PCD_EVENT_DMA] = pcd_dma_event, |
181 | }; |
182 | |
183 | void pcd_event_schedule(unsigned int now, enum pcd_event event, int after) |
bf098bc5 |
184 | { |
ae214f1c |
185 | unsigned int when; |
186 | |
187 | when = now + after; |
188 | if (when == 0) { |
189 | // event cancelled |
190 | pcd_event_times[event] = 0; |
191 | return; |
192 | } |
bf098bc5 |
193 | |
ae214f1c |
194 | when |= 1; |
bf098bc5 |
195 | |
ae214f1c |
196 | elprintf(EL_CD, "cd: new event #%u %u->%u", event, now, when); |
197 | pcd_event_times[event] = when; |
bf098bc5 |
198 | |
ae214f1c |
199 | if (event_time_next == 0 || CYCLES_GT(event_time_next, when)) |
200 | event_time_next = when; |
bf098bc5 |
201 | } |
202 | |
ae214f1c |
203 | void pcd_event_schedule_s68k(enum pcd_event event, int after) |
4f265db7 |
204 | { |
ae214f1c |
205 | if (SekCyclesLeftS68k > after) |
206 | SekEndRunS68k(after); |
4f265db7 |
207 | |
ae214f1c |
208 | pcd_event_schedule(SekCyclesDoneS68k(), event, after); |
209 | } |
4f265db7 |
210 | |
ae214f1c |
211 | static void pcd_run_events(unsigned int until) |
212 | { |
213 | int oldest, oldest_diff, time; |
214 | int i, diff; |
215 | |
216 | while (1) { |
217 | oldest = -1, oldest_diff = 0x7fffffff; |
218 | |
219 | for (i = 0; i < PCD_EVENT_COUNT; i++) { |
220 | if (pcd_event_times[i]) { |
221 | diff = pcd_event_times[i] - until; |
222 | if (diff < oldest_diff) { |
223 | oldest_diff = diff; |
224 | oldest = i; |
225 | } |
226 | } |
227 | } |
228 | |
229 | if (oldest_diff <= 0) { |
230 | time = pcd_event_times[oldest]; |
231 | pcd_event_times[oldest] = 0; |
232 | elprintf(EL_CD, "cd: run event #%d %u", oldest, time); |
233 | pcd_event_cbs[oldest](time); |
234 | } |
235 | else if (oldest_diff < 0x7fffffff) { |
236 | event_time_next = pcd_event_times[oldest]; |
237 | break; |
238 | } |
239 | else { |
240 | event_time_next = 0; |
241 | break; |
242 | } |
243 | } |
4f265db7 |
244 | |
ae214f1c |
245 | if (oldest != -1) |
246 | elprintf(EL_CD, "cd: next event #%d at %u", |
247 | oldest, event_time_next); |
4f265db7 |
248 | } |
249 | |
08769494 |
250 | int pcd_sync_s68k(unsigned int m68k_target, int m68k_poll_sync) |
ae214f1c |
251 | { |
252 | #define now SekCycleCntS68k |
a6523294 |
253 | unsigned int s68k_target; |
ae214f1c |
254 | unsigned int target; |
b837b69b |
255 | |
a6523294 |
256 | target = m68k_target - mcd_m68k_cycle_base; |
257 | s68k_target = mcd_s68k_cycle_base + |
258 | ((unsigned long long)target * mcd_m68k_cycle_mult >> 16); |
259 | |
08769494 |
260 | elprintf(EL_CD, "s68k sync to %u, %u->%u", |
261 | m68k_target, now, s68k_target); |
ae214f1c |
262 | |
4fb43555 |
263 | if (Pico_mcd->m.busreq != 1) { /* busreq/reset */ |
ae214f1c |
264 | SekCycleCntS68k = SekCycleAimS68k = s68k_target; |
265 | pcd_run_events(m68k_target); |
08769494 |
266 | return 0; |
ae214f1c |
267 | } |
268 | |
269 | while (CYCLES_GT(s68k_target, now)) { |
270 | if (event_time_next && CYCLES_GE(now, event_time_next)) |
271 | pcd_run_events(now); |
272 | |
273 | target = s68k_target; |
274 | if (event_time_next && CYCLES_GT(target, event_time_next)) |
275 | target = event_time_next; |
276 | |
277 | SekRunS68k(target); |
08769494 |
278 | if (m68k_poll_sync && Pico_mcd->m.m68k_poll_cnt == 0) |
279 | break; |
ae214f1c |
280 | } |
08769494 |
281 | |
282 | return s68k_target - now; |
ae214f1c |
283 | #undef now |
c987bb5c |
284 | } |
ae214f1c |
285 | |
ba6e8bfd |
286 | #define pcd_run_cpus_normal pcd_run_cpus |
287 | //#define pcd_run_cpus_lockstep pcd_run_cpus |
288 | |
08769494 |
289 | static void SekSyncM68k(void); |
290 | |
fa8fb754 |
291 | void pcd_run_cpus_normal(int m68k_cycles) |
08769494 |
292 | { |
293 | SekCycleAim += m68k_cycles; |
30e8aac4 |
294 | if (SekShouldInterrupt() || Pico_mcd->m.m68k_poll_cnt < 12) |
cc5ffc3c |
295 | Pico_mcd->m.m68k_poll_cnt = 0; |
296 | else if (Pico_mcd->m.m68k_poll_cnt >= 16) { |
08769494 |
297 | int s68k_left = pcd_sync_s68k(SekCycleAim, 1); |
298 | if (s68k_left <= 0) { |
ba6e8bfd |
299 | elprintf(EL_CDPOLL, "m68k poll [%02x] x%d @%06x", |
08769494 |
300 | Pico_mcd->m.m68k_poll_a, Pico_mcd->m.m68k_poll_cnt, SekPc); |
301 | SekCycleCnt = SekCycleAim; |
302 | return; |
303 | } |
304 | SekCycleCnt = SekCycleAim - (s68k_left * 40220 >> 16); |
305 | } |
306 | |
307 | SekSyncM68k(); |
308 | } |
309 | |
fa8fb754 |
310 | void pcd_run_cpus_lockstep(int m68k_cycles) |
ba6e8bfd |
311 | { |
312 | unsigned int target = SekCycleAim + m68k_cycles; |
313 | do { |
314 | SekCycleAim += 8; |
315 | SekSyncM68k(); |
316 | pcd_sync_s68k(SekCycleAim, 0); |
317 | } while (CYCLES_GT(target, SekCycleAim)); |
cc5ffc3c |
318 | |
319 | SekCycleAim = target; |
ba6e8bfd |
320 | } |
321 | |
ae214f1c |
322 | #define PICO_CD |
323 | #define CPUS_RUN(m68k_cycles) \ |
08769494 |
324 | pcd_run_cpus(m68k_cycles) |
ae214f1c |
325 | |
efcba75f |
326 | #include "../pico_cmn.c" |
cc68a136 |
327 | |
328 | |
a6523294 |
329 | void pcd_prepare_frame(void) |
330 | { |
331 | pcd_set_cycle_mult(); |
332 | |
333 | // need this because we can't have direct mapping between |
334 | // master<->slave cycle counters because of overflows |
335 | mcd_m68k_cycle_base = SekCycleAim; |
336 | mcd_s68k_cycle_base = SekCycleAimS68k; |
337 | } |
338 | |
2aa27095 |
339 | PICO_INTERNAL void PicoFrameMCD(void) |
cc68a136 |
340 | { |
a6523294 |
341 | PicoFrameStart(); |
cc68a136 |
342 | |
a6523294 |
343 | pcd_prepare_frame(); |
bf5fbbb4 |
344 | PicoFrameHints(); |
cc68a136 |
345 | } |
346 | |
ae214f1c |
347 | void pcd_state_loaded(void) |
348 | { |
349 | unsigned int cycles; |
350 | int diff; |
351 | |
8e4e84c2 |
352 | pcd_set_cycle_mult(); |
ae214f1c |
353 | pcd_state_loaded_mem(); |
354 | |
33be04ca |
355 | memset(Pico_mcd->pcm_mixbuf, 0, sizeof(Pico_mcd->pcm_mixbuf)); |
356 | Pico_mcd->pcm_mixbuf_dirty = 0; |
357 | Pico_mcd->pcm_mixpos = 0; |
021e47b3 |
358 | Pico_mcd->pcm_regs_dirty = 1; |
33be04ca |
359 | |
ae214f1c |
360 | // old savestates.. |
361 | cycles = pcd_cycles_m68k_to_s68k(SekCycleAim); |
362 | diff = cycles - SekCycleAimS68k; |
363 | if (diff < -1000 || diff > 1000) { |
364 | SekCycleCntS68k = SekCycleAimS68k = cycles; |
365 | } |
366 | if (pcd_event_times[PCD_EVENT_CDC] == 0) { |
367 | pcd_event_schedule(SekCycleAimS68k, PCD_EVENT_CDC, 12500000/75); |
368 | |
369 | if (Pico_mcd->s68k_regs[0x31]) |
370 | pcd_event_schedule(SekCycleAimS68k, PCD_EVENT_TIMER3, |
371 | Pico_mcd->s68k_regs[0x31] * 384); |
ae214f1c |
372 | } |
334d9fb6 |
373 | |
374 | diff = cycles - Pico_mcd->pcm.update_cycles; |
375 | if ((unsigned int)diff > 12500000/50) |
33be04ca |
376 | Pico_mcd->pcm.update_cycles = cycles; |
8e4e84c2 |
377 | |
378 | // reschedule |
379 | event_time_next = 0; |
380 | pcd_run_events(SekCycleCntS68k); |
ae214f1c |
381 | } |
cc68a136 |
382 | |
ae214f1c |
383 | // vim:shiftwidth=2:ts=2:expandtab |