cff531af |
1 | /*\r |
2 | * memory handling\r |
3 | * (c) Copyright Dave, 2004\r |
4 | * (C) notaz, 2006-2010\r |
5 | *\r |
6 | * This work is licensed under the terms of MAME license.\r |
7 | * See COPYING file in the top-level directory.\r |
8 | */\r |
cc68a136 |
9 | \r |
efcba75f |
10 | #include "pico_int.h"\r |
af37bca8 |
11 | #include "memory.h"\r |
cc68a136 |
12 | \r |
cc68a136 |
13 | #include "sound/ym2612.h"\r |
14 | #include "sound/sn76496.h"\r |
15 | \r |
c8d1e9b6 |
16 | extern unsigned int lastSSRamWrite; // used by serial eeprom code\r |
cc68a136 |
17 | \r |
bcf65fd6 |
18 | uptr m68k_read8_map [0x1000000 >> M68K_MEM_SHIFT];\r |
19 | uptr m68k_read16_map [0x1000000 >> M68K_MEM_SHIFT];\r |
20 | uptr m68k_write8_map [0x1000000 >> M68K_MEM_SHIFT];\r |
21 | uptr m68k_write16_map[0x1000000 >> M68K_MEM_SHIFT];\r |
af37bca8 |
22 | \r |
bcf65fd6 |
23 | static void xmap_set(uptr *map, int shift, int start_addr, int end_addr,\r |
0ace9b9a |
24 | const void *func_or_mh, int is_func)\r |
af37bca8 |
25 | {\r |
faf543ce |
26 | #ifdef __clang__\r |
27 | // workaround bug (segfault) in \r |
28 | // Apple LLVM version 4.2 (clang-425.0.27) (based on LLVM 3.2svn)\r |
29 | volatile \r |
30 | #endif\r |
bcf65fd6 |
31 | uptr addr = (uptr)func_or_mh;\r |
af37bca8 |
32 | int mask = (1 << shift) - 1;\r |
33 | int i;\r |
34 | \r |
35 | if ((start_addr & mask) != 0 || (end_addr & mask) != mask) {\r |
36 | elprintf(EL_STATUS|EL_ANOMALY, "xmap_set: tried to map bad range: %06x-%06x",\r |
37 | start_addr, end_addr);\r |
38 | return;\r |
39 | }\r |
40 | \r |
41 | if (addr & 1) {\r |
42 | elprintf(EL_STATUS|EL_ANOMALY, "xmap_set: ptr is not aligned: %08lx", addr);\r |
43 | return;\r |
44 | }\r |
45 | \r |
46 | if (!is_func)\r |
47 | addr -= start_addr;\r |
48 | \r |
49 | for (i = start_addr >> shift; i <= end_addr >> shift; i++) {\r |
50 | map[i] = addr >> 1;\r |
51 | if (is_func)\r |
add51c49 |
52 | map[i] |= MAP_FLAG;\r |
af37bca8 |
53 | }\r |
54 | }\r |
55 | \r |
bcf65fd6 |
56 | void z80_map_set(uptr *map, int start_addr, int end_addr,\r |
0ace9b9a |
57 | const void *func_or_mh, int is_func)\r |
af37bca8 |
58 | {\r |
59 | xmap_set(map, Z80_MEM_SHIFT, start_addr, end_addr, func_or_mh, is_func);\r |
60 | }\r |
61 | \r |
bcf65fd6 |
62 | void cpu68k_map_set(uptr *map, int start_addr, int end_addr,\r |
0ace9b9a |
63 | const void *func_or_mh, int is_func)\r |
af37bca8 |
64 | {\r |
65 | xmap_set(map, M68K_MEM_SHIFT, start_addr, end_addr, func_or_mh, is_func);\r |
c6b118c0 |
66 | #ifdef EMU_F68K\r |
67 | // setup FAME fetchmap\r |
68 | if (!is_func)\r |
69 | {\r |
70 | int shiftout = 24 - FAMEC_FETCHBITS;\r |
71 | int i = start_addr >> shiftout;\r |
72 | uptr base = (uptr)func_or_mh - (i << shiftout);\r |
73 | for (; i <= (end_addr >> shiftout); i++)\r |
74 | PicoCpuFM68k.Fetch[i] = base;\r |
75 | }\r |
76 | #endif\r |
af37bca8 |
77 | }\r |
78 | \r |
79 | // more specialized/optimized function (does same as above)\r |
80 | void cpu68k_map_all_ram(int start_addr, int end_addr, void *ptr, int is_sub)\r |
81 | {\r |
bcf65fd6 |
82 | uptr *r8map, *r16map, *w8map, *w16map;\r |
83 | uptr addr = (uptr)ptr;\r |
af37bca8 |
84 | int shift = M68K_MEM_SHIFT;\r |
85 | int i;\r |
86 | \r |
87 | if (!is_sub) {\r |
88 | r8map = m68k_read8_map;\r |
89 | r16map = m68k_read16_map;\r |
90 | w8map = m68k_write8_map;\r |
91 | w16map = m68k_write16_map;\r |
92 | } else {\r |
93 | r8map = s68k_read8_map;\r |
94 | r16map = s68k_read16_map;\r |
95 | w8map = s68k_write8_map;\r |
96 | w16map = s68k_write16_map;\r |
97 | }\r |
98 | \r |
99 | addr -= start_addr;\r |
100 | addr >>= 1;\r |
101 | for (i = start_addr >> shift; i <= end_addr >> shift; i++)\r |
102 | r8map[i] = r16map[i] = w8map[i] = w16map[i] = addr;\r |
c6b118c0 |
103 | #ifdef EMU_F68K\r |
104 | // setup FAME fetchmap\r |
105 | {\r |
106 | M68K_CONTEXT *ctx = is_sub ? &PicoCpuFS68k : &PicoCpuFM68k;\r |
107 | int shiftout = 24 - FAMEC_FETCHBITS;\r |
108 | i = start_addr >> shiftout;\r |
109 | addr = (uptr)ptr - (i << shiftout);\r |
110 | for (; i <= (end_addr >> shiftout); i++)\r |
111 | ctx->Fetch[i] = addr;\r |
112 | }\r |
113 | #endif\r |
af37bca8 |
114 | }\r |
115 | \r |
116 | static u32 m68k_unmapped_read8(u32 a)\r |
117 | {\r |
118 | elprintf(EL_UIO, "m68k unmapped r8 [%06x] @%06x", a, SekPc);\r |
119 | return 0; // assume pulldown, as if MegaCD2 was attached\r |
120 | }\r |
121 | \r |
122 | static u32 m68k_unmapped_read16(u32 a)\r |
123 | {\r |
124 | elprintf(EL_UIO, "m68k unmapped r16 [%06x] @%06x", a, SekPc);\r |
125 | return 0;\r |
126 | }\r |
127 | \r |
128 | static void m68k_unmapped_write8(u32 a, u32 d)\r |
129 | {\r |
130 | elprintf(EL_UIO, "m68k unmapped w8 [%06x] %02x @%06x", a, d & 0xff, SekPc);\r |
131 | }\r |
132 | \r |
133 | static void m68k_unmapped_write16(u32 a, u32 d)\r |
134 | {\r |
135 | elprintf(EL_UIO, "m68k unmapped w16 [%06x] %04x @%06x", a, d & 0xffff, SekPc);\r |
136 | }\r |
137 | \r |
138 | void m68k_map_unmap(int start_addr, int end_addr)\r |
139 | {\r |
faf543ce |
140 | #ifdef __clang__\r |
141 | // workaround bug (segfault) in \r |
142 | // Apple LLVM version 4.2 (clang-425.0.27) (based on LLVM 3.2svn)\r |
143 | volatile \r |
144 | #endif\r |
bcf65fd6 |
145 | uptr addr;\r |
af37bca8 |
146 | int shift = M68K_MEM_SHIFT;\r |
147 | int i;\r |
148 | \r |
bcf65fd6 |
149 | addr = (uptr)m68k_unmapped_read8;\r |
af37bca8 |
150 | for (i = start_addr >> shift; i <= end_addr >> shift; i++)\r |
add51c49 |
151 | m68k_read8_map[i] = (addr >> 1) | MAP_FLAG;\r |
af37bca8 |
152 | \r |
bcf65fd6 |
153 | addr = (uptr)m68k_unmapped_read16;\r |
af37bca8 |
154 | for (i = start_addr >> shift; i <= end_addr >> shift; i++)\r |
add51c49 |
155 | m68k_read16_map[i] = (addr >> 1) | MAP_FLAG;\r |
af37bca8 |
156 | \r |
bcf65fd6 |
157 | addr = (uptr)m68k_unmapped_write8;\r |
af37bca8 |
158 | for (i = start_addr >> shift; i <= end_addr >> shift; i++)\r |
add51c49 |
159 | m68k_write8_map[i] = (addr >> 1) | MAP_FLAG;\r |
af37bca8 |
160 | \r |
bcf65fd6 |
161 | addr = (uptr)m68k_unmapped_write16;\r |
af37bca8 |
162 | for (i = start_addr >> shift; i <= end_addr >> shift; i++)\r |
add51c49 |
163 | m68k_write16_map[i] = (addr >> 1) | MAP_FLAG;\r |
af37bca8 |
164 | }\r |
165 | \r |
166 | MAKE_68K_READ8(m68k_read8, m68k_read8_map)\r |
167 | MAKE_68K_READ16(m68k_read16, m68k_read16_map)\r |
168 | MAKE_68K_READ32(m68k_read32, m68k_read16_map)\r |
169 | MAKE_68K_WRITE8(m68k_write8, m68k_write8_map)\r |
170 | MAKE_68K_WRITE16(m68k_write16, m68k_write16_map)\r |
171 | MAKE_68K_WRITE32(m68k_write32, m68k_write16_map)\r |
172 | \r |
173 | // -----------------------------------------------------------------\r |
174 | \r |
175 | static u32 ym2612_read_local_68k(void);\r |
176 | static int ym2612_write_local(u32 a, u32 d, int is_from_z80);\r |
177 | static void z80_mem_setup(void);\r |
cc68a136 |
178 | \r |
0ace9b9a |
179 | #ifdef _ASM_MEMORY_C\r |
180 | u32 PicoRead8_sram(u32 a);\r |
181 | u32 PicoRead16_sram(u32 a);\r |
182 | #endif\r |
cc68a136 |
183 | \r |
03e4f2a3 |
184 | #ifdef EMU_CORE_DEBUG\r |
cc68a136 |
185 | u32 lastread_a, lastread_d[16]={0,}, lastwrite_cyc_d[16]={0,}, lastwrite_mus_d[16]={0,};\r |
186 | int lrp_cyc=0, lrp_mus=0, lwp_cyc=0, lwp_mus=0;\r |
187 | extern unsigned int ppop;\r |
188 | #endif\r |
189 | \r |
4f65685b |
190 | #ifdef IO_STATS\r |
191 | void log_io(unsigned int addr, int bits, int rw);\r |
dca310c4 |
192 | #elif defined(_MSC_VER)\r |
193 | #define log_io\r |
4f65685b |
194 | #else\r |
195 | #define log_io(...)\r |
196 | #endif\r |
197 | \r |
70357ce5 |
198 | #if defined(EMU_C68K)\r |
5e89f0f5 |
199 | void cyclone_crashed(u32 pc, struct Cyclone *context)\r |
cc68a136 |
200 | {\r |
bf61bea0 |
201 | elprintf(EL_STATUS|EL_ANOMALY, "%c68k crash detected @ %06x",\r |
5e89f0f5 |
202 | context == &PicoCpuCM68k ? 'm' : 's', pc);\r |
203 | context->membase = (u32)Pico.rom;\r |
204 | context->pc = (u32)Pico.rom + Pico.romsize;\r |
cc68a136 |
205 | }\r |
206 | #endif\r |
207 | \r |
cc68a136 |
208 | // -----------------------------------------------------------------\r |
af37bca8 |
209 | // memmap helpers\r |
cc68a136 |
210 | \r |
531a8f38 |
211 | static u32 read_pad_3btn(int i, u32 out_bits)\r |
e5503e2f |
212 | {\r |
531a8f38 |
213 | u32 pad = ~PicoPadInt[i]; // Get inverse of pad MXYZ SACB RLDU\r |
214 | u32 value;\r |
e5503e2f |
215 | \r |
531a8f38 |
216 | if (out_bits & 0x40) // TH\r |
217 | value = pad & 0x3f; // ?1CB RLDU\r |
218 | else\r |
219 | value = ((pad & 0xc0) >> 2) | (pad & 3); // ?0SA 00DU\r |
e5503e2f |
220 | \r |
531a8f38 |
221 | value |= out_bits & 0x40;\r |
222 | return value;\r |
223 | }\r |
224 | \r |
225 | static u32 read_pad_6btn(int i, u32 out_bits)\r |
226 | {\r |
227 | u32 pad = ~PicoPadInt[i]; // Get inverse of pad MXYZ SACB RLDU\r |
228 | int phase = Pico.m.padTHPhase[i];\r |
229 | u32 value;\r |
230 | \r |
231 | if (phase == 2 && !(out_bits & 0x40)) {\r |
232 | value = (pad & 0xc0) >> 2; // ?0SA 0000\r |
233 | goto out;\r |
234 | }\r |
235 | else if(phase == 3) {\r |
236 | if (out_bits & 0x40)\r |
237 | return (pad & 0x30) | ((pad >> 8) & 0xf); // ?1CB MXYZ\r |
238 | else\r |
239 | return ((pad & 0xc0) >> 2) | 0x0f; // ?0SA 1111\r |
240 | goto out;\r |
e5503e2f |
241 | }\r |
242 | \r |
531a8f38 |
243 | if (out_bits & 0x40) // TH\r |
244 | value = pad & 0x3f; // ?1CB RLDU\r |
245 | else\r |
246 | value = ((pad & 0xc0) >> 2) | (pad & 3); // ?0SA 00DU\r |
e5503e2f |
247 | \r |
531a8f38 |
248 | out:\r |
249 | value |= out_bits & 0x40;\r |
250 | return value;\r |
e5503e2f |
251 | }\r |
252 | \r |
531a8f38 |
253 | static u32 read_nothing(int i, u32 out_bits)\r |
254 | {\r |
255 | return 0xff;\r |
256 | }\r |
257 | \r |
258 | typedef u32 (port_read_func)(int index, u32 out_bits);\r |
259 | \r |
260 | static port_read_func *port_readers[3] = {\r |
261 | read_pad_3btn,\r |
262 | read_pad_3btn,\r |
263 | read_nothing\r |
264 | };\r |
0ace9b9a |
265 | \r |
531a8f38 |
266 | static NOINLINE u32 port_read(int i)\r |
267 | {\r |
268 | u32 data_reg = Pico.ioports[i + 1];\r |
269 | u32 ctrl_reg = Pico.ioports[i + 4] | 0x80;\r |
270 | u32 in, out;\r |
271 | \r |
272 | out = data_reg & ctrl_reg;\r |
273 | out |= 0x7f & ~ctrl_reg; // pull-ups\r |
274 | \r |
275 | in = port_readers[i](i, out);\r |
276 | \r |
277 | return (in & ~ctrl_reg) | (data_reg & ctrl_reg);\r |
278 | }\r |
279 | \r |
280 | void PicoSetInputDevice(int port, enum input_device device)\r |
281 | {\r |
282 | port_read_func *func;\r |
283 | \r |
284 | if (port < 0 || port > 2)\r |
285 | return;\r |
286 | \r |
287 | switch (device) {\r |
288 | case PICO_INPUT_PAD_3BTN:\r |
289 | func = read_pad_3btn;\r |
290 | break;\r |
291 | \r |
292 | case PICO_INPUT_PAD_6BTN:\r |
293 | func = read_pad_6btn;\r |
294 | break;\r |
295 | \r |
296 | default:\r |
297 | func = read_nothing;\r |
298 | break;\r |
299 | }\r |
300 | \r |
301 | port_readers[port] = func;\r |
302 | }\r |
303 | \r |
304 | NOINLINE u32 io_ports_read(u32 a)\r |
cc68a136 |
305 | {\r |
af37bca8 |
306 | u32 d;\r |
307 | a = (a>>1) & 0xf;\r |
308 | switch (a) {\r |
309 | case 0: d = Pico.m.hardware; break; // Hardware value (Version register)\r |
531a8f38 |
310 | case 1: d = port_read(0); break;\r |
311 | case 2: d = port_read(1); break;\r |
312 | case 3: d = port_read(2); break;\r |
af37bca8 |
313 | default: d = Pico.ioports[a]; break; // IO ports can be used as RAM\r |
7969166e |
314 | }\r |
af37bca8 |
315 | return d;\r |
cc68a136 |
316 | }\r |
cc68a136 |
317 | \r |
531a8f38 |
318 | NOINLINE void io_ports_write(u32 a, u32 d)\r |
9dc09829 |
319 | {\r |
af37bca8 |
320 | a = (a>>1) & 0xf;\r |
321 | \r |
322 | // 6 button gamepad: if TH went from 0 to 1, gamepad changes state\r |
531a8f38 |
323 | if (1 <= a && a <= 2)\r |
af37bca8 |
324 | {\r |
325 | Pico.m.padDelay[a - 1] = 0;\r |
326 | if (!(Pico.ioports[a] & 0x40) && (d & 0x40))\r |
327 | Pico.m.padTHPhase[a - 1]++;\r |
9dc09829 |
328 | }\r |
af37bca8 |
329 | \r |
5e89f0f5 |
330 | // certain IO ports can be used as RAM\r |
af37bca8 |
331 | Pico.ioports[a] = d;\r |
9dc09829 |
332 | }\r |
333 | \r |
ae214f1c |
334 | // lame..\r |
335 | static int z80_cycles_from_68k(void)\r |
336 | {\r |
337 | return z80_cycle_aim\r |
338 | + cycles_68k_to_z80(SekCyclesDone() - last_z80_sync);\r |
339 | }\r |
340 | \r |
0ace9b9a |
341 | void NOINLINE ctl_write_z80busreq(u32 d)\r |
7969166e |
342 | {\r |
af37bca8 |
343 | d&=1; d^=1;\r |
ebd70cb5 |
344 | elprintf(EL_BUSREQ, "set_zrun: %i->%i [%u] @%06x", Pico.m.z80Run, d, SekCyclesDone(), SekPc);\r |
af37bca8 |
345 | if (d ^ Pico.m.z80Run)\r |
346 | {\r |
347 | if (d)\r |
348 | {\r |
ae214f1c |
349 | z80_cycle_cnt = z80_cycles_from_68k();\r |
af37bca8 |
350 | }\r |
351 | else\r |
352 | {\r |
f6c49d38 |
353 | if ((PicoOpt&POPT_EN_Z80) && !Pico.m.z80_reset) {\r |
354 | pprof_start(m68k);\r |
ae214f1c |
355 | PicoSyncZ80(SekCyclesDone());\r |
f6c49d38 |
356 | pprof_end_sub(m68k);\r |
357 | }\r |
af37bca8 |
358 | }\r |
359 | Pico.m.z80Run = d;\r |
7969166e |
360 | }\r |
af37bca8 |
361 | }\r |
362 | \r |
0ace9b9a |
363 | void NOINLINE ctl_write_z80reset(u32 d)\r |
af37bca8 |
364 | {\r |
365 | d&=1; d^=1;\r |
ebd70cb5 |
366 | elprintf(EL_BUSREQ, "set_zreset: %i->%i [%u] @%06x", Pico.m.z80_reset, d, SekCyclesDone(), SekPc);\r |
af37bca8 |
367 | if (d ^ Pico.m.z80_reset)\r |
368 | {\r |
369 | if (d)\r |
370 | {\r |
f6c49d38 |
371 | if ((PicoOpt&POPT_EN_Z80) && Pico.m.z80Run) {\r |
372 | pprof_start(m68k);\r |
af37bca8 |
373 | PicoSyncZ80(SekCyclesDone());\r |
f6c49d38 |
374 | pprof_end_sub(m68k);\r |
375 | }\r |
af37bca8 |
376 | YM2612ResetChip();\r |
377 | timers_reset();\r |
7969166e |
378 | }\r |
af37bca8 |
379 | else\r |
380 | {\r |
ae214f1c |
381 | z80_cycle_cnt = z80_cycles_from_68k();\r |
af37bca8 |
382 | z80_reset();\r |
7969166e |
383 | }\r |
af37bca8 |
384 | Pico.m.z80_reset = d;\r |
7969166e |
385 | }\r |
386 | }\r |
cc68a136 |
387 | \r |
5d638db0 |
388 | static int get_scanline(int is_from_z80);\r |
389 | \r |
390 | static void psg_write_68k(u32 d)\r |
391 | {\r |
392 | // look for volume write and update if needed\r |
393 | if ((d & 0x90) == 0x90 && PsndPsgLine < Pico.m.scanline)\r |
394 | PsndDoPSG(Pico.m.scanline);\r |
395 | \r |
396 | SN76496Write(d);\r |
397 | }\r |
398 | \r |
399 | static void psg_write_z80(u32 d)\r |
400 | {\r |
401 | if ((d & 0x90) == 0x90) {\r |
402 | int scanline = get_scanline(1);\r |
403 | if (PsndPsgLine < scanline)\r |
404 | PsndDoPSG(scanline);\r |
405 | }\r |
406 | \r |
407 | SN76496Write(d);\r |
408 | }\r |
409 | \r |
af37bca8 |
410 | // -----------------------------------------------------------------\r |
fa1e5e29 |
411 | \r |
0ace9b9a |
412 | #ifndef _ASM_MEMORY_C\r |
413 | \r |
af37bca8 |
414 | // cart (save) RAM area (usually 0x200000 - ...)\r |
415 | static u32 PicoRead8_sram(u32 a)\r |
416 | {\r |
af37bca8 |
417 | u32 d;\r |
45f2f245 |
418 | if (SRam.start <= a && a <= SRam.end && (Pico.m.sram_reg & SRR_MAPPED))\r |
af37bca8 |
419 | {\r |
45f2f245 |
420 | if (SRam.flags & SRF_EEPROM) {\r |
af37bca8 |
421 | d = EEPROM_read();\r |
45f2f245 |
422 | if (!(a & 1))\r |
423 | d >>= 8;\r |
424 | } else\r |
af37bca8 |
425 | d = *(u8 *)(SRam.data - SRam.start + a);\r |
45f2f245 |
426 | elprintf(EL_SRAMIO, "sram r8 [%06x] %02x @ %06x", a, d, SekPc);\r |
af37bca8 |
427 | return d;\r |
428 | }\r |
cc68a136 |
429 | \r |
45f2f245 |
430 | // XXX: this is banking unfriendly\r |
af37bca8 |
431 | if (a < Pico.romsize)\r |
432 | return Pico.rom[a ^ 1];\r |
433 | \r |
434 | return m68k_unmapped_read8(a);\r |
435 | }\r |
cc68a136 |
436 | \r |
af37bca8 |
437 | static u32 PicoRead16_sram(u32 a)\r |
cc68a136 |
438 | {\r |
af37bca8 |
439 | u32 d;\r |
b4db550e |
440 | if (SRam.start <= a && a <= SRam.end && (Pico.m.sram_reg & SRR_MAPPED))\r |
af37bca8 |
441 | {\r |
45f2f245 |
442 | if (SRam.flags & SRF_EEPROM)\r |
af37bca8 |
443 | d = EEPROM_read();\r |
45f2f245 |
444 | else {\r |
af37bca8 |
445 | u8 *pm = (u8 *)(SRam.data - SRam.start + a);\r |
446 | d = pm[0] << 8;\r |
447 | d |= pm[1];\r |
448 | }\r |
449 | elprintf(EL_SRAMIO, "sram r16 [%06x] %04x @ %06x", a, d, SekPc);\r |
450 | return d;\r |
451 | }\r |
cc68a136 |
452 | \r |
af37bca8 |
453 | if (a < Pico.romsize)\r |
454 | return *(u16 *)(Pico.rom + a);\r |
cc68a136 |
455 | \r |
af37bca8 |
456 | return m68k_unmapped_read16(a);\r |
457 | }\r |
cc68a136 |
458 | \r |
0ace9b9a |
459 | #endif // _ASM_MEMORY_C\r |
460 | \r |
af37bca8 |
461 | static void PicoWrite8_sram(u32 a, u32 d)\r |
462 | {\r |
45f2f245 |
463 | if (a > SRam.end || a < SRam.start || !(Pico.m.sram_reg & SRR_MAPPED)) {\r |
464 | m68k_unmapped_write8(a, d);\r |
465 | return;\r |
466 | }\r |
467 | \r |
468 | elprintf(EL_SRAMIO, "sram w8 [%06x] %02x @ %06x", a, d & 0xff, SekPc);\r |
469 | if (SRam.flags & SRF_EEPROM)\r |
af37bca8 |
470 | {\r |
45f2f245 |
471 | EEPROM_write8(a, d);\r |
cc68a136 |
472 | }\r |
45f2f245 |
473 | else {\r |
474 | u8 *pm = (u8 *)(SRam.data - SRam.start + a);\r |
af37bca8 |
475 | if (*pm != (u8)d) {\r |
476 | SRam.changed = 1;\r |
477 | *pm = (u8)d;\r |
478 | }\r |
479 | }\r |
480 | }\r |
cc68a136 |
481 | \r |
af37bca8 |
482 | static void PicoWrite16_sram(u32 a, u32 d)\r |
483 | {\r |
45f2f245 |
484 | if (a > SRam.end || a < SRam.start || !(Pico.m.sram_reg & SRR_MAPPED)) {\r |
485 | m68k_unmapped_write16(a, d);\r |
486 | return;\r |
487 | }\r |
488 | \r |
489 | elprintf(EL_SRAMIO, "sram w16 [%06x] %04x @ %06x", a, d & 0xffff, SekPc);\r |
490 | if (SRam.flags & SRF_EEPROM)\r |
491 | {\r |
492 | EEPROM_write16(d);\r |
493 | }\r |
494 | else {\r |
45f2f245 |
495 | u8 *pm = (u8 *)(SRam.data - SRam.start + a);\r |
1dd0871f |
496 | if (pm[0] != (u8)(d >> 8)) {\r |
45f2f245 |
497 | SRam.changed = 1;\r |
1dd0871f |
498 | pm[0] = (u8)(d >> 8);\r |
499 | }\r |
500 | if (pm[1] != (u8)d) {\r |
501 | SRam.changed = 1;\r |
502 | pm[1] = (u8)d;\r |
45f2f245 |
503 | }\r |
504 | }\r |
af37bca8 |
505 | }\r |
cc68a136 |
506 | \r |
af37bca8 |
507 | // z80 area (0xa00000 - 0xa0ffff)\r |
508 | // TODO: verify mirrors VDP and bank reg (bank area mirroring verified)\r |
509 | static u32 PicoRead8_z80(u32 a)\r |
510 | {\r |
511 | u32 d = 0xff;\r |
512 | if ((Pico.m.z80Run & 1) || Pico.m.z80_reset) {\r |
513 | elprintf(EL_ANOMALY, "68k z80 read with no bus! [%06x] @ %06x", a, SekPc);\r |
514 | // open bus. Pulled down if MegaCD2 is attached.\r |
515 | return 0;\r |
516 | }\r |
c060a9ab |
517 | \r |
af37bca8 |
518 | if ((a & 0x4000) == 0x0000)\r |
519 | d = Pico.zram[a & 0x1fff];\r |
520 | else if ((a & 0x6000) == 0x4000) // 0x4000-0x5fff\r |
521 | d = ym2612_read_local_68k(); \r |
522 | else\r |
523 | elprintf(EL_UIO|EL_ANOMALY, "68k bad read [%06x] @%06x", a, SekPc);\r |
524 | return d;\r |
525 | }\r |
b542be46 |
526 | \r |
af37bca8 |
527 | static u32 PicoRead16_z80(u32 a)\r |
528 | {\r |
529 | u32 d = PicoRead8_z80(a);\r |
530 | return d | (d << 8);\r |
531 | }\r |
532 | \r |
533 | static void PicoWrite8_z80(u32 a, u32 d)\r |
534 | {\r |
535 | if ((Pico.m.z80Run & 1) || Pico.m.z80_reset) {\r |
536 | // verified on real hw\r |
537 | elprintf(EL_ANOMALY, "68k z80 write with no bus or reset! [%06x] %02x @ %06x", a, d&0xff, SekPc);\r |
538 | return;\r |
539 | }\r |
540 | \r |
541 | if ((a & 0x4000) == 0x0000) { // z80 RAM\r |
af37bca8 |
542 | Pico.zram[a & 0x1fff] = (u8)d;\r |
543 | return;\r |
544 | }\r |
545 | if ((a & 0x6000) == 0x4000) { // FM Sound\r |
546 | if (PicoOpt & POPT_EN_FM)\r |
547 | emustatus |= ym2612_write_local(a&3, d&0xff, 0)&1;\r |
548 | return;\r |
549 | }\r |
550 | // TODO: probably other VDP access too? Maybe more mirrors?\r |
551 | if ((a & 0x7ff9) == 0x7f11) { // PSG Sound\r |
5d638db0 |
552 | psg_write_68k(d);\r |
af37bca8 |
553 | return;\r |
554 | }\r |
af37bca8 |
555 | if ((a & 0x7f00) == 0x6000) // Z80 BANK register\r |
556 | {\r |
557 | Pico.m.z80_bank68k >>= 1;\r |
558 | Pico.m.z80_bank68k |= d << 8;\r |
559 | Pico.m.z80_bank68k &= 0x1ff; // 9 bits and filled in the new top one\r |
560 | elprintf(EL_Z80BNK, "z80 bank=%06x", Pico.m.z80_bank68k << 15);\r |
561 | return;\r |
cc68a136 |
562 | }\r |
af37bca8 |
563 | elprintf(EL_UIO|EL_ANOMALY, "68k bad write [%06x] %02x @ %06x", a, d&0xff, SekPc);\r |
cc68a136 |
564 | }\r |
565 | \r |
af37bca8 |
566 | static void PicoWrite16_z80(u32 a, u32 d)\r |
cc68a136 |
567 | {\r |
af37bca8 |
568 | // for RAM, only most significant byte is sent\r |
569 | // TODO: verify remaining accesses\r |
570 | PicoWrite8_z80(a, d >> 8);\r |
571 | }\r |
cc68a136 |
572 | \r |
0ace9b9a |
573 | #ifndef _ASM_MEMORY_C\r |
574 | \r |
af37bca8 |
575 | // IO/control area (0xa10000 - 0xa1ffff)\r |
576 | u32 PicoRead8_io(u32 a)\r |
577 | {\r |
578 | u32 d;\r |
cc68a136 |
579 | \r |
af37bca8 |
580 | if ((a & 0xffe0) == 0x0000) { // I/O ports\r |
581 | d = io_ports_read(a);\r |
cc68a136 |
582 | goto end;\r |
583 | }\r |
cc68a136 |
584 | \r |
af37bca8 |
585 | // faking open bus (MegaCD pulldowns don't work here curiously)\r |
586 | d = Pico.m.rotate++;\r |
587 | d ^= d << 6;\r |
cc68a136 |
588 | \r |
5e89f0f5 |
589 | if ((a & 0xfc00) == 0x1000) {\r |
590 | // bit8 seems to be readable in this range\r |
591 | if (!(a & 1))\r |
592 | d &= ~0x01;\r |
cc68a136 |
593 | \r |
5e89f0f5 |
594 | if ((a & 0xff01) == 0x1100) { // z80 busreq (verified)\r |
595 | d |= (Pico.m.z80Run | Pico.m.z80_reset) & 1;\r |
ebd70cb5 |
596 | elprintf(EL_BUSREQ, "get_zrun: %02x [%u] @%06x", d, SekCyclesDone(), SekPc);\r |
5e89f0f5 |
597 | }\r |
af37bca8 |
598 | goto end;\r |
cc68a136 |
599 | }\r |
af37bca8 |
600 | \r |
db1d3564 |
601 | if (PicoOpt & POPT_EN_32X) {\r |
be2c4208 |
602 | d = PicoRead8_32x(a);\r |
603 | goto end;\r |
604 | }\r |
605 | \r |
af37bca8 |
606 | d = m68k_unmapped_read8(a);\r |
607 | end:\r |
cc68a136 |
608 | return d;\r |
609 | }\r |
610 | \r |
af37bca8 |
611 | u32 PicoRead16_io(u32 a)\r |
cc68a136 |
612 | {\r |
af37bca8 |
613 | u32 d;\r |
cc68a136 |
614 | \r |
af37bca8 |
615 | if ((a & 0xffe0) == 0x0000) { // I/O ports\r |
616 | d = io_ports_read(a);\r |
bdd6a009 |
617 | d |= d << 8;\r |
cc68a136 |
618 | goto end;\r |
619 | }\r |
620 | \r |
af37bca8 |
621 | // faking open bus\r |
622 | d = (Pico.m.rotate += 0x41);\r |
623 | d ^= (d << 5) ^ (d << 8);\r |
cc68a136 |
624 | \r |
af37bca8 |
625 | // bit8 seems to be readable in this range\r |
5e89f0f5 |
626 | if ((a & 0xfc00) == 0x1000) {\r |
af37bca8 |
627 | d &= ~0x0100;\r |
cc68a136 |
628 | \r |
5e89f0f5 |
629 | if ((a & 0xff00) == 0x1100) { // z80 busreq\r |
630 | d |= ((Pico.m.z80Run | Pico.m.z80_reset) & 1) << 8;\r |
ebd70cb5 |
631 | elprintf(EL_BUSREQ, "get_zrun: %04x [%u] @%06x", d, SekCyclesDone(), SekPc);\r |
5e89f0f5 |
632 | }\r |
af37bca8 |
633 | goto end;\r |
cc68a136 |
634 | }\r |
af37bca8 |
635 | \r |
db1d3564 |
636 | if (PicoOpt & POPT_EN_32X) {\r |
be2c4208 |
637 | d = PicoRead16_32x(a);\r |
638 | goto end;\r |
639 | }\r |
640 | \r |
af37bca8 |
641 | d = m68k_unmapped_read16(a);\r |
642 | end:\r |
cc68a136 |
643 | return d;\r |
644 | }\r |
cc68a136 |
645 | \r |
af37bca8 |
646 | void PicoWrite8_io(u32 a, u32 d)\r |
647 | {\r |
648 | if ((a & 0xffe1) == 0x0001) { // I/O ports (verified: only LSB!)\r |
649 | io_ports_write(a, d);\r |
650 | return;\r |
651 | }\r |
652 | if ((a & 0xff01) == 0x1100) { // z80 busreq\r |
653 | ctl_write_z80busreq(d);\r |
654 | return;\r |
655 | }\r |
656 | if ((a & 0xff01) == 0x1200) { // z80 reset\r |
657 | ctl_write_z80reset(d);\r |
658 | return;\r |
659 | }\r |
660 | if (a == 0xa130f1) { // sram access register\r |
661 | elprintf(EL_SRAMIO, "sram reg=%02x", d);\r |
45f2f245 |
662 | Pico.m.sram_reg &= ~(SRR_MAPPED|SRR_READONLY);\r |
663 | Pico.m.sram_reg |= (u8)(d & 3);\r |
af37bca8 |
664 | return;\r |
665 | }\r |
db1d3564 |
666 | if (PicoOpt & POPT_EN_32X) {\r |
be2c4208 |
667 | PicoWrite8_32x(a, d);\r |
668 | return;\r |
669 | }\r |
670 | \r |
af37bca8 |
671 | m68k_unmapped_write8(a, d);\r |
672 | }\r |
cc68a136 |
673 | \r |
af37bca8 |
674 | void PicoWrite16_io(u32 a, u32 d)\r |
cc68a136 |
675 | {\r |
af37bca8 |
676 | if ((a & 0xffe0) == 0x0000) { // I/O ports (verified: only LSB!)\r |
677 | io_ports_write(a, d);\r |
678 | return;\r |
679 | }\r |
680 | if ((a & 0xff00) == 0x1100) { // z80 busreq\r |
681 | ctl_write_z80busreq(d >> 8);\r |
682 | return;\r |
683 | }\r |
684 | if ((a & 0xff00) == 0x1200) { // z80 reset\r |
685 | ctl_write_z80reset(d >> 8);\r |
686 | return;\r |
687 | }\r |
688 | if (a == 0xa130f0) { // sram access register\r |
689 | elprintf(EL_SRAMIO, "sram reg=%02x", d);\r |
45f2f245 |
690 | Pico.m.sram_reg &= ~(SRR_MAPPED|SRR_READONLY);\r |
691 | Pico.m.sram_reg |= (u8)(d & 3);\r |
af37bca8 |
692 | return;\r |
693 | }\r |
db1d3564 |
694 | if (PicoOpt & POPT_EN_32X) {\r |
be2c4208 |
695 | PicoWrite16_32x(a, d);\r |
696 | return;\r |
697 | }\r |
af37bca8 |
698 | m68k_unmapped_write16(a, d);\r |
699 | }\r |
cc68a136 |
700 | \r |
0ace9b9a |
701 | #endif // _ASM_MEMORY_C\r |
702 | \r |
af37bca8 |
703 | // VDP area (0xc00000 - 0xdfffff)\r |
704 | // TODO: verify if lower byte goes to PSG on word writes\r |
75b84e4b |
705 | u32 PicoRead8_vdp(u32 a)\r |
af37bca8 |
706 | {\r |
75b84e4b |
707 | if ((a & 0x00f0) == 0x0000) {\r |
708 | switch (a & 0x0d)\r |
709 | {\r |
710 | case 0x00: return PicoVideoRead8DataH();\r |
711 | case 0x01: return PicoVideoRead8DataL();\r |
712 | case 0x04: return PicoVideoRead8CtlH();\r |
713 | case 0x05: return PicoVideoRead8CtlL();\r |
714 | case 0x08:\r |
715 | case 0x0c: return PicoVideoRead8HV_H();\r |
716 | case 0x09:\r |
717 | case 0x0d: return PicoVideoRead8HV_L();\r |
718 | }\r |
719 | }\r |
cc68a136 |
720 | \r |
af37bca8 |
721 | elprintf(EL_UIO|EL_ANOMALY, "68k bad read [%06x] @%06x", a, SekPc);\r |
722 | return 0;\r |
cc68a136 |
723 | }\r |
724 | \r |
af37bca8 |
725 | static u32 PicoRead16_vdp(u32 a)\r |
cc68a136 |
726 | {\r |
af37bca8 |
727 | if ((a & 0x00e0) == 0x0000)\r |
728 | return PicoVideoRead(a);\r |
cc68a136 |
729 | \r |
af37bca8 |
730 | elprintf(EL_UIO|EL_ANOMALY, "68k bad read [%06x] @%06x", a, SekPc);\r |
731 | return 0;\r |
cc68a136 |
732 | }\r |
733 | \r |
af37bca8 |
734 | static void PicoWrite8_vdp(u32 a, u32 d)\r |
cc68a136 |
735 | {\r |
af37bca8 |
736 | if ((a & 0x00f9) == 0x0011) { // PSG Sound\r |
5d638db0 |
737 | psg_write_68k(d);\r |
cc68a136 |
738 | return;\r |
739 | }\r |
af37bca8 |
740 | if ((a & 0x00e0) == 0x0000) {\r |
741 | d &= 0xff;\r |
742 | PicoVideoWrite(a, d | (d << 8));\r |
b542be46 |
743 | return;\r |
744 | }\r |
745 | \r |
af37bca8 |
746 | elprintf(EL_UIO|EL_ANOMALY, "68k bad write [%06x] %02x @%06x", a, d & 0xff, SekPc);\r |
cc68a136 |
747 | }\r |
748 | \r |
af37bca8 |
749 | static void PicoWrite16_vdp(u32 a, u32 d)\r |
750 | {\r |
5d638db0 |
751 | if ((a & 0x00f9) == 0x0010) // PSG Sound\r |
752 | psg_write_68k(d);\r |
af37bca8 |
753 | if ((a & 0x00e0) == 0x0000) {\r |
754 | PicoVideoWrite(a, d);\r |
755 | return;\r |
756 | }\r |
757 | \r |
758 | elprintf(EL_UIO|EL_ANOMALY, "68k bad write [%06x] %04x @%06x", a, d & 0xffff, SekPc);\r |
759 | }\r |
cc68a136 |
760 | \r |
761 | // -----------------------------------------------------------------\r |
f53f286a |
762 | \r |
9037e45d |
763 | #ifdef EMU_M68K\r |
764 | static void m68k_mem_setup(void);\r |
765 | #endif\r |
766 | \r |
f8ef8ff7 |
767 | PICO_INTERNAL void PicoMemSetup(void)\r |
768 | {\r |
af37bca8 |
769 | int mask, rs, a;\r |
770 | \r |
771 | // setup the memory map\r |
772 | cpu68k_map_set(m68k_read8_map, 0x000000, 0xffffff, m68k_unmapped_read8, 1);\r |
773 | cpu68k_map_set(m68k_read16_map, 0x000000, 0xffffff, m68k_unmapped_read16, 1);\r |
774 | cpu68k_map_set(m68k_write8_map, 0x000000, 0xffffff, m68k_unmapped_write8, 1);\r |
775 | cpu68k_map_set(m68k_write16_map, 0x000000, 0xffffff, m68k_unmapped_write16, 1);\r |
776 | \r |
777 | // ROM\r |
778 | // align to bank size. We know ROM loader allocated enough for this\r |
779 | mask = (1 << M68K_MEM_SHIFT) - 1;\r |
780 | rs = (Pico.romsize + mask) & ~mask;\r |
781 | cpu68k_map_set(m68k_read8_map, 0x000000, rs - 1, Pico.rom, 0);\r |
782 | cpu68k_map_set(m68k_read16_map, 0x000000, rs - 1, Pico.rom, 0);\r |
783 | \r |
784 | // Common case of on-cart (save) RAM, usually at 0x200000-...\r |
45f2f245 |
785 | if ((SRam.flags & SRF_ENABLED) && SRam.data != NULL) {\r |
786 | rs = SRam.end - SRam.start;\r |
af37bca8 |
787 | rs = (rs + mask) & ~mask;\r |
788 | if (SRam.start + rs >= 0x1000000)\r |
789 | rs = 0x1000000 - SRam.start;\r |
790 | cpu68k_map_set(m68k_read8_map, SRam.start, SRam.start + rs - 1, PicoRead8_sram, 1);\r |
791 | cpu68k_map_set(m68k_read16_map, SRam.start, SRam.start + rs - 1, PicoRead16_sram, 1);\r |
792 | cpu68k_map_set(m68k_write8_map, SRam.start, SRam.start + rs - 1, PicoWrite8_sram, 1);\r |
793 | cpu68k_map_set(m68k_write16_map, SRam.start, SRam.start + rs - 1, PicoWrite16_sram, 1);\r |
794 | }\r |
795 | \r |
796 | // Z80 region\r |
797 | cpu68k_map_set(m68k_read8_map, 0xa00000, 0xa0ffff, PicoRead8_z80, 1);\r |
798 | cpu68k_map_set(m68k_read16_map, 0xa00000, 0xa0ffff, PicoRead16_z80, 1);\r |
799 | cpu68k_map_set(m68k_write8_map, 0xa00000, 0xa0ffff, PicoWrite8_z80, 1);\r |
800 | cpu68k_map_set(m68k_write16_map, 0xa00000, 0xa0ffff, PicoWrite16_z80, 1);\r |
801 | \r |
802 | // IO/control region\r |
803 | cpu68k_map_set(m68k_read8_map, 0xa10000, 0xa1ffff, PicoRead8_io, 1);\r |
804 | cpu68k_map_set(m68k_read16_map, 0xa10000, 0xa1ffff, PicoRead16_io, 1);\r |
805 | cpu68k_map_set(m68k_write8_map, 0xa10000, 0xa1ffff, PicoWrite8_io, 1);\r |
806 | cpu68k_map_set(m68k_write16_map, 0xa10000, 0xa1ffff, PicoWrite16_io, 1);\r |
807 | \r |
808 | // VDP region\r |
809 | for (a = 0xc00000; a < 0xe00000; a += 0x010000) {\r |
810 | if ((a & 0xe700e0) != 0xc00000)\r |
811 | continue;\r |
812 | cpu68k_map_set(m68k_read8_map, a, a + 0xffff, PicoRead8_vdp, 1);\r |
813 | cpu68k_map_set(m68k_read16_map, a, a + 0xffff, PicoRead16_vdp, 1);\r |
814 | cpu68k_map_set(m68k_write8_map, a, a + 0xffff, PicoWrite8_vdp, 1);\r |
815 | cpu68k_map_set(m68k_write16_map, a, a + 0xffff, PicoWrite16_vdp, 1);\r |
816 | }\r |
817 | \r |
818 | // RAM and it's mirrors\r |
819 | for (a = 0xe00000; a < 0x1000000; a += 0x010000) {\r |
820 | cpu68k_map_set(m68k_read8_map, a, a + 0xffff, Pico.ram, 0);\r |
821 | cpu68k_map_set(m68k_read16_map, a, a + 0xffff, Pico.ram, 0);\r |
822 | cpu68k_map_set(m68k_write8_map, a, a + 0xffff, Pico.ram, 0);\r |
823 | cpu68k_map_set(m68k_write16_map, a, a + 0xffff, Pico.ram, 0);\r |
824 | }\r |
825 | \r |
cc68a136 |
826 | // Setup memory callbacks:\r |
70357ce5 |
827 | #ifdef EMU_C68K\r |
5e89f0f5 |
828 | PicoCpuCM68k.read8 = (void *)m68k_read8_map;\r |
829 | PicoCpuCM68k.read16 = (void *)m68k_read16_map;\r |
830 | PicoCpuCM68k.read32 = (void *)m68k_read16_map;\r |
831 | PicoCpuCM68k.write8 = (void *)m68k_write8_map;\r |
832 | PicoCpuCM68k.write16 = (void *)m68k_write16_map;\r |
833 | PicoCpuCM68k.write32 = (void *)m68k_write16_map;\r |
834 | PicoCpuCM68k.checkpc = NULL; /* unused */\r |
835 | PicoCpuCM68k.fetch8 = NULL;\r |
836 | PicoCpuCM68k.fetch16 = NULL;\r |
837 | PicoCpuCM68k.fetch32 = NULL;\r |
cc68a136 |
838 | #endif\r |
70357ce5 |
839 | #ifdef EMU_F68K\r |
af37bca8 |
840 | PicoCpuFM68k.read_byte = m68k_read8;\r |
841 | PicoCpuFM68k.read_word = m68k_read16;\r |
842 | PicoCpuFM68k.read_long = m68k_read32;\r |
843 | PicoCpuFM68k.write_byte = m68k_write8;\r |
844 | PicoCpuFM68k.write_word = m68k_write16;\r |
845 | PicoCpuFM68k.write_long = m68k_write32;\r |
3aa1e148 |
846 | \r |
847 | // setup FAME fetchmap\r |
848 | {\r |
849 | int i;\r |
9037e45d |
850 | // by default, point everything to first 64k of ROM\r |
c6b118c0 |
851 | for (i = 0; i < M68K_FETCHBANK1 * 0xe0 / 0x100; i++)\r |
be26eb23 |
852 | PicoCpuFM68k.Fetch[i] = (unsigned long)Pico.rom - (i<<(24-FAMEC_FETCHBITS));\r |
3aa1e148 |
853 | // now real ROM\r |
854 | for (i = 0; i < M68K_FETCHBANK1 && (i<<(24-FAMEC_FETCHBITS)) < Pico.romsize; i++)\r |
be26eb23 |
855 | PicoCpuFM68k.Fetch[i] = (unsigned long)Pico.rom;\r |
c6b118c0 |
856 | // RAM already set\r |
3aa1e148 |
857 | }\r |
70357ce5 |
858 | #endif\r |
9037e45d |
859 | #ifdef EMU_M68K\r |
860 | m68k_mem_setup();\r |
861 | #endif\r |
c8d1e9b6 |
862 | \r |
863 | z80_mem_setup();\r |
cc68a136 |
864 | }\r |
865 | \r |
cc68a136 |
866 | #ifdef EMU_M68K\r |
9037e45d |
867 | unsigned int (*pm68k_read_memory_8) (unsigned int address) = NULL;\r |
868 | unsigned int (*pm68k_read_memory_16)(unsigned int address) = NULL;\r |
869 | unsigned int (*pm68k_read_memory_32)(unsigned int address) = NULL;\r |
870 | void (*pm68k_write_memory_8) (unsigned int address, unsigned char value) = NULL;\r |
871 | void (*pm68k_write_memory_16)(unsigned int address, unsigned short value) = NULL;\r |
872 | void (*pm68k_write_memory_32)(unsigned int address, unsigned int value) = NULL;\r |
cc68a136 |
873 | \r |
9037e45d |
874 | /* it appears that Musashi doesn't always mask the unused bits */\r |
875 | unsigned int m68k_read_memory_8 (unsigned int address) { return pm68k_read_memory_8 (address) & 0xff; }\r |
876 | unsigned int m68k_read_memory_16(unsigned int address) { return pm68k_read_memory_16(address) & 0xffff; }\r |
877 | unsigned int m68k_read_memory_32(unsigned int address) { return pm68k_read_memory_32(address); }\r |
878 | void m68k_write_memory_8 (unsigned int address, unsigned int value) { pm68k_write_memory_8 (address, (u8)value); }\r |
879 | void m68k_write_memory_16(unsigned int address, unsigned int value) { pm68k_write_memory_16(address,(u16)value); }\r |
880 | void m68k_write_memory_32(unsigned int address, unsigned int value) { pm68k_write_memory_32(address, value); }\r |
9037e45d |
881 | \r |
882 | static void m68k_mem_setup(void)\r |
883 | {\r |
af37bca8 |
884 | pm68k_read_memory_8 = m68k_read8;\r |
885 | pm68k_read_memory_16 = m68k_read16;\r |
886 | pm68k_read_memory_32 = m68k_read32;\r |
887 | pm68k_write_memory_8 = m68k_write8;\r |
888 | pm68k_write_memory_16 = m68k_write16;\r |
889 | pm68k_write_memory_32 = m68k_write32;\r |
cc68a136 |
890 | }\r |
cc68a136 |
891 | #endif // EMU_M68K\r |
892 | \r |
893 | \r |
4b9c5888 |
894 | // -----------------------------------------------------------------\r |
895 | \r |
4b9c5888 |
896 | static int get_scanline(int is_from_z80)\r |
897 | {\r |
898 | if (is_from_z80) {\r |
899 | int cycles = z80_cyclesDone();\r |
900 | while (cycles - z80_scanline_cycles >= 228)\r |
901 | z80_scanline++, z80_scanline_cycles += 228;\r |
902 | return z80_scanline;\r |
903 | }\r |
904 | \r |
2aa27095 |
905 | return Pico.m.scanline;\r |
4b9c5888 |
906 | }\r |
907 | \r |
48dc74f2 |
908 | /* probably should not be in this file, but it's near related code here */\r |
43e6eaad |
909 | void ym2612_sync_timers(int z80_cycles, int mode_old, int mode_new)\r |
910 | {\r |
911 | int xcycles = z80_cycles << 8;\r |
912 | \r |
913 | /* check for overflows */\r |
914 | if ((mode_old & 4) && xcycles > timer_a_next_oflow)\r |
915 | ym2612.OPN.ST.status |= 1;\r |
916 | \r |
917 | if ((mode_old & 8) && xcycles > timer_b_next_oflow)\r |
918 | ym2612.OPN.ST.status |= 2;\r |
919 | \r |
920 | /* update timer a */\r |
921 | if (mode_old & 1)\r |
e53704e6 |
922 | while (xcycles > timer_a_next_oflow)\r |
43e6eaad |
923 | timer_a_next_oflow += timer_a_step;\r |
924 | \r |
925 | if ((mode_old ^ mode_new) & 1) // turning on/off\r |
926 | {\r |
48dc74f2 |
927 | if (mode_old & 1)\r |
e53704e6 |
928 | timer_a_next_oflow = TIMER_NO_OFLOW;\r |
43e6eaad |
929 | else\r |
48dc74f2 |
930 | timer_a_next_oflow = xcycles + timer_a_step;\r |
43e6eaad |
931 | }\r |
932 | if (mode_new & 1)\r |
933 | elprintf(EL_YMTIMER, "timer a upd to %i @ %i", timer_a_next_oflow>>8, z80_cycles);\r |
934 | \r |
935 | /* update timer b */\r |
936 | if (mode_old & 2)\r |
e53704e6 |
937 | while (xcycles > timer_b_next_oflow)\r |
43e6eaad |
938 | timer_b_next_oflow += timer_b_step;\r |
939 | \r |
940 | if ((mode_old ^ mode_new) & 2)\r |
941 | {\r |
48dc74f2 |
942 | if (mode_old & 2)\r |
e53704e6 |
943 | timer_b_next_oflow = TIMER_NO_OFLOW;\r |
43e6eaad |
944 | else\r |
48dc74f2 |
945 | timer_b_next_oflow = xcycles + timer_b_step;\r |
43e6eaad |
946 | }\r |
947 | if (mode_new & 2)\r |
948 | elprintf(EL_YMTIMER, "timer b upd to %i @ %i", timer_b_next_oflow>>8, z80_cycles);\r |
949 | }\r |
950 | \r |
4b9c5888 |
951 | // ym2612 DAC and timer I/O handlers for z80\r |
af37bca8 |
952 | static int ym2612_write_local(u32 a, u32 d, int is_from_z80)\r |
4b9c5888 |
953 | {\r |
954 | int addr;\r |
955 | \r |
956 | a &= 3;\r |
957 | if (a == 1 && ym2612.OPN.ST.address == 0x2a) /* DAC data */\r |
958 | {\r |
959 | int scanline = get_scanline(is_from_z80);\r |
960 | //elprintf(EL_STATUS, "%03i -> %03i dac w %08x z80 %i", PsndDacLine, scanline, d, is_from_z80);\r |
961 | ym2612.dacout = ((int)d - 0x80) << 6;\r |
4f2cdbf5 |
962 | if (ym2612.dacen)\r |
4b9c5888 |
963 | PsndDoDAC(scanline);\r |
964 | return 0;\r |
965 | }\r |
966 | \r |
967 | switch (a)\r |
968 | {\r |
969 | case 0: /* address port 0 */\r |
970 | ym2612.OPN.ST.address = d;\r |
971 | ym2612.addr_A1 = 0;\r |
972 | #ifdef __GP2X__\r |
973 | if (PicoOpt & POPT_EXT_FM) YM2612Write_940(a, d, -1);\r |
974 | #endif\r |
975 | return 0;\r |
976 | \r |
977 | case 1: /* data port 0 */\r |
978 | if (ym2612.addr_A1 != 0)\r |
979 | return 0;\r |
980 | \r |
981 | addr = ym2612.OPN.ST.address;\r |
982 | ym2612.REGS[addr] = d;\r |
983 | \r |
984 | switch (addr)\r |
985 | {\r |
986 | case 0x24: // timer A High 8\r |
987 | case 0x25: { // timer A Low 2\r |
988 | int TAnew = (addr == 0x24) ? ((ym2612.OPN.ST.TA & 0x03)|(((int)d)<<2))\r |
989 | : ((ym2612.OPN.ST.TA & 0x3fc)|(d&3));\r |
990 | if (ym2612.OPN.ST.TA != TAnew)\r |
991 | {\r |
992 | //elprintf(EL_STATUS, "timer a set %i", TAnew);\r |
993 | ym2612.OPN.ST.TA = TAnew;\r |
e53704e6 |
994 | //ym2612.OPN.ST.TAC = (1024-TAnew)*18;\r |
4b9c5888 |
995 | //ym2612.OPN.ST.TAT = 0;\r |
48dc74f2 |
996 | timer_a_step = TIMER_A_TICK_ZCYCLES * (1024 - TAnew);\r |
43e6eaad |
997 | if (ym2612.OPN.ST.mode & 1) {\r |
48dc74f2 |
998 | // this is not right, should really be done on overflow only\r |
ae214f1c |
999 | int cycles = is_from_z80 ? z80_cyclesDone() : z80_cycles_from_68k();\r |
4b9c5888 |
1000 | timer_a_next_oflow = (cycles << 8) + timer_a_step;\r |
4b9c5888 |
1001 | }\r |
43e6eaad |
1002 | elprintf(EL_YMTIMER, "timer a set to %i, %i", 1024 - TAnew, timer_a_next_oflow>>8);\r |
4b9c5888 |
1003 | }\r |
1004 | return 0;\r |
1005 | }\r |
1006 | case 0x26: // timer B\r |
1007 | if (ym2612.OPN.ST.TB != d) {\r |
1008 | //elprintf(EL_STATUS, "timer b set %i", d);\r |
1009 | ym2612.OPN.ST.TB = d;\r |
e53704e6 |
1010 | //ym2612.OPN.ST.TBC = (256-d) * 288;\r |
4b9c5888 |
1011 | //ym2612.OPN.ST.TBT = 0;\r |
48dc74f2 |
1012 | timer_b_step = TIMER_B_TICK_ZCYCLES * (256 - d); // 262800\r |
43e6eaad |
1013 | if (ym2612.OPN.ST.mode & 2) {\r |
ae214f1c |
1014 | int cycles = is_from_z80 ? z80_cyclesDone() : z80_cycles_from_68k();\r |
43e6eaad |
1015 | timer_b_next_oflow = (cycles << 8) + timer_b_step;\r |
1016 | }\r |
1017 | elprintf(EL_YMTIMER, "timer b set to %i, %i", 256 - d, timer_b_next_oflow>>8);\r |
4b9c5888 |
1018 | }\r |
1019 | return 0;\r |
1020 | case 0x27: { /* mode, timer control */\r |
1021 | int old_mode = ym2612.OPN.ST.mode;\r |
ae214f1c |
1022 | int cycles = is_from_z80 ? z80_cyclesDone() : z80_cycles_from_68k();\r |
43e6eaad |
1023 | ym2612.OPN.ST.mode = d;\r |
4b9c5888 |
1024 | \r |
43e6eaad |
1025 | elprintf(EL_YMTIMER, "st mode %02x", d);\r |
1026 | ym2612_sync_timers(cycles, old_mode, d);\r |
4b9c5888 |
1027 | \r |
43e6eaad |
1028 | /* reset Timer a flag */\r |
1029 | if (d & 0x10)\r |
1030 | ym2612.OPN.ST.status &= ~1;\r |
4b9c5888 |
1031 | \r |
1032 | /* reset Timer b flag */\r |
1033 | if (d & 0x20)\r |
1034 | ym2612.OPN.ST.status &= ~2;\r |
1035 | \r |
43e6eaad |
1036 | if ((d ^ old_mode) & 0xc0) {\r |
4b9c5888 |
1037 | #ifdef __GP2X__\r |
52250671 |
1038 | if (PicoOpt & POPT_EXT_FM) return YM2612Write_940(a, d, get_scanline(is_from_z80));\r |
4b9c5888 |
1039 | #endif\r |
43e6eaad |
1040 | return 1;\r |
1041 | }\r |
4b9c5888 |
1042 | return 0;\r |
1043 | }\r |
1044 | case 0x2b: { /* DAC Sel (YM2612) */\r |
1045 | int scanline = get_scanline(is_from_z80);\r |
4f2cdbf5 |
1046 | if (ym2612.dacen != (d & 0x80)) {\r |
1047 | ym2612.dacen = d & 0x80;\r |
1048 | PsndDacLine = scanline;\r |
1049 | }\r |
4b9c5888 |
1050 | #ifdef __GP2X__\r |
1051 | if (PicoOpt & POPT_EXT_FM) YM2612Write_940(a, d, scanline);\r |
1052 | #endif\r |
1053 | return 0;\r |
1054 | }\r |
1055 | }\r |
1056 | break;\r |
1057 | \r |
1058 | case 2: /* address port 1 */\r |
1059 | ym2612.OPN.ST.address = d;\r |
1060 | ym2612.addr_A1 = 1;\r |
1061 | #ifdef __GP2X__\r |
1062 | if (PicoOpt & POPT_EXT_FM) YM2612Write_940(a, d, -1);\r |
1063 | #endif\r |
1064 | return 0;\r |
1065 | \r |
1066 | case 3: /* data port 1 */\r |
1067 | if (ym2612.addr_A1 != 1)\r |
1068 | return 0;\r |
1069 | \r |
1070 | addr = ym2612.OPN.ST.address | 0x100;\r |
1071 | ym2612.REGS[addr] = d;\r |
1072 | break;\r |
1073 | }\r |
1074 | \r |
1075 | #ifdef __GP2X__\r |
1076 | if (PicoOpt & POPT_EXT_FM)\r |
1077 | return YM2612Write_940(a, d, get_scanline(is_from_z80));\r |
1078 | #endif\r |
1079 | return YM2612Write_(a, d);\r |
1080 | }\r |
1081 | \r |
453d2a6e |
1082 | \r |
43e6eaad |
1083 | #define ym2612_read_local() \\r |
1084 | if (xcycles >= timer_a_next_oflow) \\r |
1085 | ym2612.OPN.ST.status |= (ym2612.OPN.ST.mode >> 2) & 1; \\r |
1086 | if (xcycles >= timer_b_next_oflow) \\r |
1087 | ym2612.OPN.ST.status |= (ym2612.OPN.ST.mode >> 2) & 2\r |
1088 | \r |
553c3eaa |
1089 | static u32 ym2612_read_local_z80(void)\r |
4b9c5888 |
1090 | {\r |
1091 | int xcycles = z80_cyclesDone() << 8;\r |
4b9c5888 |
1092 | \r |
43e6eaad |
1093 | ym2612_read_local();\r |
1094 | \r |
1095 | elprintf(EL_YMTIMER, "timer z80 read %i, sched %i, %i @ %i|%i", ym2612.OPN.ST.status,\r |
1096 | timer_a_next_oflow>>8, timer_b_next_oflow>>8, xcycles >> 8, (xcycles >> 8) / 228);\r |
1097 | return ym2612.OPN.ST.status;\r |
1098 | }\r |
1099 | \r |
af37bca8 |
1100 | static u32 ym2612_read_local_68k(void)\r |
43e6eaad |
1101 | {\r |
ae214f1c |
1102 | int xcycles = z80_cycles_from_68k() << 8;\r |
43e6eaad |
1103 | \r |
1104 | ym2612_read_local();\r |
1105 | \r |
1106 | elprintf(EL_YMTIMER, "timer 68k read %i, sched %i, %i @ %i|%i", ym2612.OPN.ST.status,\r |
1107 | timer_a_next_oflow>>8, timer_b_next_oflow>>8, xcycles >> 8, (xcycles >> 8) / 228);\r |
4b9c5888 |
1108 | return ym2612.OPN.ST.status;\r |
1109 | }\r |
1110 | \r |
d2721b08 |
1111 | void ym2612_pack_state(void)\r |
1112 | {\r |
e53704e6 |
1113 | // timers are saved as tick counts, in 16.16 int format\r |
1114 | int tac, tat = 0, tbc, tbt = 0;\r |
1115 | tac = 1024 - ym2612.OPN.ST.TA;\r |
1116 | tbc = 256 - ym2612.OPN.ST.TB;\r |
1117 | if (timer_a_next_oflow != TIMER_NO_OFLOW)\r |
1118 | tat = (int)((double)(timer_a_step - timer_a_next_oflow) / (double)timer_a_step * tac * 65536);\r |
1119 | if (timer_b_next_oflow != TIMER_NO_OFLOW)\r |
1120 | tbt = (int)((double)(timer_b_step - timer_b_next_oflow) / (double)timer_b_step * tbc * 65536);\r |
1121 | elprintf(EL_YMTIMER, "save: timer a %i/%i", tat >> 16, tac);\r |
1122 | elprintf(EL_YMTIMER, "save: timer b %i/%i", tbt >> 16, tbc);\r |
1123 | \r |
d2721b08 |
1124 | #ifdef __GP2X__\r |
1125 | if (PicoOpt & POPT_EXT_FM)\r |
e4fb433c |
1126 | YM2612PicoStateSave2_940(tat, tbt);\r |
d2721b08 |
1127 | else\r |
1128 | #endif\r |
e53704e6 |
1129 | YM2612PicoStateSave2(tat, tbt);\r |
d2721b08 |
1130 | }\r |
1131 | \r |
453d2a6e |
1132 | void ym2612_unpack_state(void)\r |
1133 | {\r |
e53704e6 |
1134 | int i, ret, tac, tat, tbc, tbt;\r |
453d2a6e |
1135 | YM2612PicoStateLoad();\r |
1136 | \r |
1137 | // feed all the registers and update internal state\r |
db49317b |
1138 | for (i = 0x20; i < 0xA0; i++) {\r |
453d2a6e |
1139 | ym2612_write_local(0, i, 0);\r |
1140 | ym2612_write_local(1, ym2612.REGS[i], 0);\r |
1141 | }\r |
db49317b |
1142 | for (i = 0x30; i < 0xA0; i++) {\r |
1143 | ym2612_write_local(2, i, 0);\r |
1144 | ym2612_write_local(3, ym2612.REGS[i|0x100], 0);\r |
1145 | }\r |
1146 | for (i = 0xAF; i >= 0xA0; i--) { // must apply backwards\r |
1147 | ym2612_write_local(2, i, 0);\r |
1148 | ym2612_write_local(3, ym2612.REGS[i|0x100], 0);\r |
1149 | ym2612_write_local(0, i, 0);\r |
1150 | ym2612_write_local(1, ym2612.REGS[i], 0);\r |
1151 | }\r |
1152 | for (i = 0xB0; i < 0xB8; i++) {\r |
1153 | ym2612_write_local(0, i, 0);\r |
1154 | ym2612_write_local(1, ym2612.REGS[i], 0);\r |
453d2a6e |
1155 | ym2612_write_local(2, i, 0);\r |
1156 | ym2612_write_local(3, ym2612.REGS[i|0x100], 0);\r |
1157 | }\r |
d2721b08 |
1158 | \r |
1159 | #ifdef __GP2X__\r |
1160 | if (PicoOpt & POPT_EXT_FM)\r |
e4fb433c |
1161 | ret = YM2612PicoStateLoad2_940(&tat, &tbt);\r |
d2721b08 |
1162 | else\r |
1163 | #endif\r |
1164 | ret = YM2612PicoStateLoad2(&tat, &tbt);\r |
db49317b |
1165 | if (ret != 0) {\r |
1166 | elprintf(EL_STATUS, "old ym2612 state");\r |
1167 | return; // no saved timers\r |
1168 | }\r |
e53704e6 |
1169 | \r |
1170 | tac = (1024 - ym2612.OPN.ST.TA) << 16;\r |
1171 | tbc = (256 - ym2612.OPN.ST.TB) << 16;\r |
1172 | if (ym2612.OPN.ST.mode & 1)\r |
48dc74f2 |
1173 | timer_a_next_oflow = (int)((double)(tac - tat) / (double)tac * timer_a_step);\r |
e53704e6 |
1174 | else\r |
1175 | timer_a_next_oflow = TIMER_NO_OFLOW;\r |
1176 | if (ym2612.OPN.ST.mode & 2)\r |
48dc74f2 |
1177 | timer_b_next_oflow = (int)((double)(tbc - tbt) / (double)tbc * timer_b_step);\r |
e53704e6 |
1178 | else\r |
1179 | timer_b_next_oflow = TIMER_NO_OFLOW;\r |
1180 | elprintf(EL_YMTIMER, "load: %i/%i, timer_a_next_oflow %i", tat>>16, tac>>16, timer_a_next_oflow >> 8);\r |
1181 | elprintf(EL_YMTIMER, "load: %i/%i, timer_b_next_oflow %i", tbt>>16, tbc>>16, timer_b_next_oflow >> 8);\r |
453d2a6e |
1182 | }\r |
1183 | \r |
f3a57b2d |
1184 | #if defined(NO_32X) && defined(_ASM_MEMORY_C)\r |
1185 | // referenced by asm code\r |
1186 | u32 PicoRead8_32x(u32 a) { return 0; }\r |
1187 | u32 PicoRead16_32x(u32 a) { return 0; }\r |
1188 | void PicoWrite8_32x(u32 a, u32 d) {}\r |
1189 | void PicoWrite16_32x(u32 a, u32 d) {}\r |
1190 | #endif\r |
1191 | \r |
cc68a136 |
1192 | // -----------------------------------------------------------------\r |
1193 | // z80 memhandlers\r |
1194 | \r |
553c3eaa |
1195 | static unsigned char z80_md_vdp_read(unsigned short a)\r |
cc68a136 |
1196 | {\r |
d1b8bcc6 |
1197 | z80_subCLeft(2);\r |
1198 | \r |
75b84e4b |
1199 | if ((a & 0x00f0) == 0x0000) {\r |
1200 | switch (a & 0x0d)\r |
1201 | {\r |
1202 | case 0x00: return PicoVideoRead8DataH();\r |
1203 | case 0x01: return PicoVideoRead8DataL();\r |
1204 | case 0x04: return PicoVideoRead8CtlH();\r |
1205 | case 0x05: return PicoVideoRead8CtlL();\r |
1206 | case 0x08:\r |
1207 | case 0x0c: return get_scanline(1); // FIXME: make it proper\r |
1208 | case 0x09:\r |
1209 | case 0x0d: return Pico.m.rotate++;\r |
1210 | }\r |
1211 | }\r |
b0e08dff |
1212 | \r |
c8d1e9b6 |
1213 | elprintf(EL_ANOMALY, "z80 invalid r8 [%06x] %02x", a, 0xff);\r |
1214 | return 0xff;\r |
1215 | }\r |
cc68a136 |
1216 | \r |
553c3eaa |
1217 | static unsigned char z80_md_bank_read(unsigned short a)\r |
c8d1e9b6 |
1218 | {\r |
c8d1e9b6 |
1219 | unsigned int addr68k;\r |
1220 | unsigned char ret;\r |
cc68a136 |
1221 | \r |
d1b8bcc6 |
1222 | z80_subCLeft(3);\r |
1223 | \r |
1224 | addr68k = Pico.m.z80_bank68k << 15;\r |
1225 | addr68k |= a & 0x7fff;\r |
c8d1e9b6 |
1226 | \r |
af37bca8 |
1227 | ret = m68k_read8(addr68k);\r |
cc68a136 |
1228 | \r |
c8d1e9b6 |
1229 | elprintf(EL_Z80BNK, "z80->68k r8 [%06x] %02x", addr68k, ret);\r |
cc68a136 |
1230 | return ret;\r |
1231 | }\r |
1232 | \r |
553c3eaa |
1233 | static void z80_md_ym2612_write(unsigned int a, unsigned char data)\r |
cc68a136 |
1234 | {\r |
c8d1e9b6 |
1235 | if (PicoOpt & POPT_EN_FM)\r |
1236 | emustatus |= ym2612_write_local(a, data, 1) & 1;\r |
1237 | }\r |
cc68a136 |
1238 | \r |
553c3eaa |
1239 | static void z80_md_vdp_br_write(unsigned int a, unsigned char data)\r |
c8d1e9b6 |
1240 | {\r |
c8d1e9b6 |
1241 | if ((a&0xfff9) == 0x7f11) // 7f11 7f13 7f15 7f17\r |
cc68a136 |
1242 | {\r |
5d638db0 |
1243 | psg_write_z80(data);\r |
cc68a136 |
1244 | return;\r |
1245 | }\r |
b0e08dff |
1246 | // at least VDP data writes hang my machine\r |
cc68a136 |
1247 | \r |
c8d1e9b6 |
1248 | if ((a>>8) == 0x60)\r |
cc68a136 |
1249 | {\r |
c8d1e9b6 |
1250 | Pico.m.z80_bank68k >>= 1;\r |
1251 | Pico.m.z80_bank68k |= data << 8;\r |
1252 | Pico.m.z80_bank68k &= 0x1ff; // 9 bits and filled in the new top one\r |
cc68a136 |
1253 | return;\r |
1254 | }\r |
1255 | \r |
c8d1e9b6 |
1256 | elprintf(EL_ANOMALY, "z80 invalid w8 [%06x] %02x", a, data);\r |
1257 | }\r |
cc68a136 |
1258 | \r |
553c3eaa |
1259 | static void z80_md_bank_write(unsigned int a, unsigned char data)\r |
c8d1e9b6 |
1260 | {\r |
c8d1e9b6 |
1261 | unsigned int addr68k;\r |
69996cb7 |
1262 | \r |
c8d1e9b6 |
1263 | addr68k = Pico.m.z80_bank68k << 15;\r |
1264 | addr68k += a & 0x7fff;\r |
1265 | \r |
1266 | elprintf(EL_Z80BNK, "z80->68k w8 [%06x] %02x", addr68k, data);\r |
af37bca8 |
1267 | m68k_write8(addr68k, data);\r |
cc68a136 |
1268 | }\r |
1269 | \r |
c8d1e9b6 |
1270 | // -----------------------------------------------------------------\r |
1271 | \r |
1272 | static unsigned char z80_md_in(unsigned short p)\r |
a4221917 |
1273 | {\r |
c8d1e9b6 |
1274 | elprintf(EL_ANOMALY, "Z80 port %04x read", p);\r |
1275 | return 0xff;\r |
a4221917 |
1276 | }\r |
1277 | \r |
c8d1e9b6 |
1278 | static void z80_md_out(unsigned short p, unsigned char d)\r |
cc68a136 |
1279 | {\r |
c8d1e9b6 |
1280 | elprintf(EL_ANOMALY, "Z80 port %04x write %02x", p, d);\r |
cc68a136 |
1281 | }\r |
c8d1e9b6 |
1282 | \r |
af37bca8 |
1283 | static void z80_mem_setup(void)\r |
c8d1e9b6 |
1284 | {\r |
1285 | z80_map_set(z80_read_map, 0x0000, 0x1fff, Pico.zram, 0);\r |
1286 | z80_map_set(z80_read_map, 0x2000, 0x3fff, Pico.zram, 0);\r |
1287 | z80_map_set(z80_read_map, 0x4000, 0x5fff, ym2612_read_local_z80, 1);\r |
1288 | z80_map_set(z80_read_map, 0x6000, 0x7fff, z80_md_vdp_read, 1);\r |
1289 | z80_map_set(z80_read_map, 0x8000, 0xffff, z80_md_bank_read, 1);\r |
1290 | \r |
1291 | z80_map_set(z80_write_map, 0x0000, 0x1fff, Pico.zram, 0);\r |
1292 | z80_map_set(z80_write_map, 0x2000, 0x3fff, Pico.zram, 0);\r |
1293 | z80_map_set(z80_write_map, 0x4000, 0x5fff, z80_md_ym2612_write, 1);\r |
1294 | z80_map_set(z80_write_map, 0x6000, 0x7fff, z80_md_vdp_br_write, 1);\r |
1295 | z80_map_set(z80_write_map, 0x8000, 0xffff, z80_md_bank_write, 1);\r |
1296 | \r |
1297 | #ifdef _USE_DRZ80\r |
1298 | drZ80.z80_in = z80_md_in;\r |
1299 | drZ80.z80_out = z80_md_out;\r |
1300 | #endif\r |
1301 | #ifdef _USE_CZ80\r |
b8a1c09a |
1302 | Cz80_Set_Fetch(&CZ80, 0x0000, 0x1fff, (FPTR)Pico.zram); // main RAM\r |
1303 | Cz80_Set_Fetch(&CZ80, 0x2000, 0x3fff, (FPTR)Pico.zram); // mirror\r |
c8d1e9b6 |
1304 | Cz80_Set_INPort(&CZ80, z80_md_in);\r |
1305 | Cz80_Set_OUTPort(&CZ80, z80_md_out);\r |
a4221917 |
1306 | #endif\r |
c8d1e9b6 |
1307 | }\r |
cc68a136 |
1308 | \r |
531a8f38 |
1309 | // vim:shiftwidth=2:ts=2:expandtab\r |