Merge pull request #4 from vobe/master
[picodrive.git] / pico / pico.c
CommitLineData
cff531af 1/*\r
2 * PicoDrive\r
3 * (c) Copyright Dave, 2004\r
4 * (C) notaz, 2006-2010\r
5 *\r
6 * This work is licensed under the terms of MAME license.\r
7 * See COPYING file in the top-level directory.\r
8 */\r
cc68a136 9\r
efcba75f 10#include "pico_int.h"\r
cc68a136 11#include "sound/ym2612.h"\r
12\r
cc68a136 13struct Pico Pico;\r
5e128c6d 14int PicoOpt; \r
15int PicoSkipFrame; // skip rendering frame?\r
2b02d6e5 16int PicoPad[2]; // Joypads, format is MXYZ SACB RLDU\r
5f9a0d16 17int PicoPadInt[2]; // internal copy\r
5e128c6d 18int PicoAHW; // active addon hardware: PAHW_*\r
a76fad41 19int PicoQuirks; // game-specific quirks\r
5e128c6d 20int PicoRegionOverride; // override the region detection 0: Auto, 1: Japan NTSC, 2: Japan PAL, 4: US, 8: Europe\r
21int PicoAutoRgnOrder;\r
22\r
23struct PicoSRAM SRam;\r
24int emustatus; // rapid_ym2612, multi_ym_updates\r
25int scanlines_total;\r
602133e1 26\r
f8ef8ff7 27void (*PicoWriteSound)(int len) = NULL; // called at the best time to send sound buffer (PsndOut) to hardware\r
28void (*PicoResetHook)(void) = NULL;\r
b0677887 29void (*PicoLineHook)(void) = NULL;\r
cc68a136 30\r
cc68a136 31// to be called once on emu init\r
2aa27095 32void PicoInit(void)\r
cc68a136 33{\r
34 // Blank space for state:\r
35 memset(&Pico,0,sizeof(Pico));\r
36 memset(&PicoPad,0,sizeof(PicoPad));\r
5f9a0d16 37 memset(&PicoPadInt,0,sizeof(PicoPadInt));\r
cc68a136 38\r
39 // Init CPUs:\r
40 SekInit();\r
41 z80_init(); // init even if we aren't going to use it\r
42\r
cc68a136 43 PicoInitMCD();\r
e807ac75 44 PicoSVPInit();\r
be2c4208 45 Pico32xInit();\r
cc68a136 46}\r
47\r
48// to be called once on emu exit\r
49void PicoExit(void)\r
50{\r
602133e1 51 if (PicoAHW & PAHW_MCD)\r
4f265db7 52 PicoExitMCD();\r
ca482e5d 53 PicoCartUnload();\r
cc68a136 54 z80_exit();\r
55\r
45f2f245 56 if (SRam.data)\r
57 free(SRam.data);\r
19886062 58 pevt_dump();\r
cc68a136 59}\r
60\r
1cb1584b 61void PicoPower(void)\r
62{\r
053fd9b4 63 Pico.m.frame_count = 0;\r
8e4e84c2 64 SekCycleCnt = SekCycleAim = 0;\r
053fd9b4 65\r
1cb1584b 66 // clear all memory of the emulated machine\r
b8a1c09a 67 memset(&Pico.ram,0,(unsigned char *)&Pico.rom - Pico.ram);\r
1cb1584b 68\r
69 memset(&Pico.video,0,sizeof(Pico.video));\r
70 memset(&Pico.m,0,sizeof(Pico.m));\r
71\r
72 Pico.video.pending_ints=0;\r
73 z80_reset();\r
74\r
531a8f38 75 // my MD1 VA6 console has this in IO\r
76 Pico.ioports[1] = Pico.ioports[2] = Pico.ioports[3] = 0xff;\r
77\r
1cb1584b 78 // default VDP register values (based on Fusion)\r
79 Pico.video.reg[0] = Pico.video.reg[1] = 0x04;\r
80 Pico.video.reg[0xc] = 0x81;\r
81 Pico.video.reg[0xf] = 0x02;\r
82\r
602133e1 83 if (PicoAHW & PAHW_MCD)\r
1cb1584b 84 PicoPowerMCD();\r
85\r
db1d3564 86 if (PicoOpt & POPT_EN_32X)\r
974fdb5b 87 PicoPower32x();\r
88\r
1cb1584b 89 PicoReset();\r
90}\r
91\r
1e6b5e39 92PICO_INTERNAL void PicoDetectRegion(void)\r
cc68a136 93{\r
1e6b5e39 94 int support=0, hw=0, i;\r
cc68a136 95 unsigned char pal=0;\r
cc68a136 96\r
1e6b5e39 97 if (PicoRegionOverride)\r
cc68a136 98 {\r
99 support = PicoRegionOverride;\r
100 }\r
101 else\r
102 {\r
103 // Read cartridge region data:\r
af37bca8 104 unsigned short *rd = (unsigned short *)(Pico.rom + 0x1f0);\r
105 int region = (rd[0] << 16) | rd[1];\r
cc68a136 106\r
af37bca8 107 for (i = 0; i < 4; i++)\r
cc68a136 108 {\r
af37bca8 109 int c;\r
cc68a136 110\r
af37bca8 111 c = region >> (i<<3);\r
112 c &= 0xff;\r
113 if (c <= ' ') continue;\r
cc68a136 114\r
51a902ae 115 if (c=='J') support|=1;\r
116 else if (c=='U') support|=4;\r
117 else if (c=='E') support|=8;\r
118 else if (c=='j') {support|=1; break; }\r
119 else if (c=='u') {support|=4; break; }\r
120 else if (c=='e') {support|=8; break; }\r
cc68a136 121 else\r
122 {\r
123 // New style code:\r
124 char s[2]={0,0};\r
125 s[0]=(char)c;\r
126 support|=strtol(s,NULL,16);\r
127 }\r
128 }\r
129 }\r
130\r
51a902ae 131 // auto detection order override\r
132 if (PicoAutoRgnOrder) {\r
133 if (((PicoAutoRgnOrder>>0)&0xf) & support) support = (PicoAutoRgnOrder>>0)&0xf;\r
134 else if (((PicoAutoRgnOrder>>4)&0xf) & support) support = (PicoAutoRgnOrder>>4)&0xf;\r
135 else if (((PicoAutoRgnOrder>>8)&0xf) & support) support = (PicoAutoRgnOrder>>8)&0xf;\r
136 }\r
137\r
cc68a136 138 // Try to pick the best hardware value for English/50hz:\r
139 if (support&8) { hw=0xc0; pal=1; } // Europe\r
140 else if (support&4) hw=0x80; // USA\r
141 else if (support&2) { hw=0x40; pal=1; } // Japan PAL\r
142 else if (support&1) hw=0x00; // Japan NTSC\r
143 else hw=0x80; // USA\r
144\r
145 Pico.m.hardware=(unsigned char)(hw|0x20); // No disk attached\r
146 Pico.m.pal=pal;\r
1e6b5e39 147}\r
148\r
149int PicoReset(void)\r
150{\r
2ec9bec5 151 if (Pico.romsize <= 0)\r
152 return 1;\r
1e6b5e39 153\r
12da51c2 154#if defined(CPU_CMP_R) || defined(CPU_CMP_W) || defined(DRC_CMP)\r
6d797957 155 PicoOpt |= POPT_DIS_VDP_FIFO|POPT_DIS_IDLE_DET;\r
156#endif\r
157\r
1e6b5e39 158 /* must call now, so that banking is reset, and correct vectors get fetched */\r
2ec9bec5 159 if (PicoResetHook)\r
160 PicoResetHook();\r
1e6b5e39 161\r
5f9a0d16 162 memset(&PicoPadInt,0,sizeof(PicoPadInt));\r
2ec9bec5 163 emustatus = 0;\r
164\r
165 if (PicoAHW & PAHW_SMS) {\r
166 PicoResetMS();\r
167 return 0;\r
168 }\r
169\r
170 SekReset();\r
8e4e84c2 171 // ..but do not reset SekCycle* to not desync with addons\r
172\r
1e6b5e39 173 // s68k doesn't have the TAS quirk, so we just globally set normal TAS handler in MCD mode (used by Batman games).\r
174 SekSetRealTAS(PicoAHW & PAHW_MCD);\r
1e6b5e39 175\r
1e6b5e39 176 Pico.m.dirtyPal = 1;\r
177\r
1832075e 178 Pico.m.z80_bank68k = 0;\r
af37bca8 179 Pico.m.z80_reset = 1;\r
1832075e 180\r
1e6b5e39 181 PicoDetectRegion();\r
e5fa9817 182 Pico.video.status = 0x3428 | Pico.m.pal; // 'always set' bits | vblank | collision | pal\r
cc68a136 183\r
9d917eea 184 PsndReset(); // pal must be known here\r
cc68a136 185\r
1cb1584b 186 // create an empty "dma" to cause 68k exec start at random frame location\r
2ec9bec5 187 if (Pico.m.dma_xfers == 0 && !(PicoOpt & POPT_DIS_VDP_FIFO))\r
1cb1584b 188 Pico.m.dma_xfers = rand() & 0x1fff;\r
189\r
5ed2a20e 190 SekFinishIdleDet();\r
191\r
602133e1 192 if (PicoAHW & PAHW_MCD) {\r
1cb1584b 193 PicoResetMCD();\r
cc68a136 194 return 0;\r
195 }\r
5ed2a20e 196\r
197 // reinit, so that checksum checks pass\r
198 if (!(PicoOpt & POPT_DIS_IDLE_DET))\r
199 SekInitIdleDet();\r
cc68a136 200\r
1f1ff763 201 if (PicoOpt & POPT_EN_32X)\r
be2c4208 202 PicoReset32x();\r
be2c4208 203\r
1dceadae 204 // reset sram state; enable sram access by default if it doesn't overlap with ROM\r
45f2f245 205 Pico.m.sram_reg = 0;\r
206 if ((SRam.flags & SRF_EEPROM) || Pico.romsize <= SRam.start)\r
207 Pico.m.sram_reg |= SRR_MAPPED;\r
cc68a136 208\r
45f2f245 209 if (SRam.flags & SRF_ENABLED)\r
210 elprintf(EL_STATUS, "sram: %06x - %06x; eeprom: %i", SRam.start, SRam.end,\r
211 !!(SRam.flags & SRF_EEPROM));\r
cc68a136 212\r
213 return 0;\r
214}\r
215\r
46bcb899 216// flush config changes before emu loop starts\r
5e128c6d 217void PicoLoopPrepare(void)\r
218{\r
219 if (PicoRegionOverride)\r
220 // force setting possibly changed..\r
221 Pico.m.pal = (PicoRegionOverride == 2 || PicoRegionOverride == 8) ? 1 : 0;\r
222\r
223 // FIXME: PAL has 313 scanlines..\r
224 scanlines_total = Pico.m.pal ? 312 : 262;\r
db1d3564 225\r
2446536b 226 Pico.m.dirtyPal = 1;\r
227 rendstatus_old = -1;\r
5e128c6d 228}\r
229\r
1dceadae 230\r
69996cb7 231// dma2vram settings are just hacks to unglitch Legend of Galahad (needs <= 104 to work)\r
232// same for Outrunners (92-121, when active is set to 24)\r
48df6e9e 233// 96 is VR hack\r
69996cb7 234static const int dma_timings[] = {\r
a4dfdb6d 235 167, 167, 166, 83, // vblank: 32cell: dma2vram dma2[vs|c]ram vram_fill vram_copy\r
053fd9b4 236 102, 205, 204, 102, // vblank: 40cell:\r
237 16, 16, 15, 8, // active: 32cell:\r
238 24, 18, 17, 9 // ...\r
4f672280 239};\r
240\r
69996cb7 241static const int dma_bsycles[] = {\r
a4dfdb6d 242 (488<<8)/167, (488<<8)/167, (488<<8)/166, (488<<8)/83,\r
243 (488<<8)/102, (488<<8)/233, (488<<8)/204, (488<<8)/102,\r
053fd9b4 244 (488<<8)/16, (488<<8)/16, (488<<8)/15, (488<<8)/8,\r
245 (488<<8)/24, (488<<8)/18, (488<<8)/17, (488<<8)/9\r
312e9ce1 246};\r
247\r
a4dfdb6d 248// grossly inaccurate.. FIXME FIXXXMEE\r
eff55556 249PICO_INTERNAL int CheckDMA(void)\r
4f672280 250{\r
69996cb7 251 int burn = 0, xfers_can, dma_op = Pico.video.reg[0x17]>>6; // see gens for 00 and 01 modes\r
252 int xfers = Pico.m.dma_xfers;\r
312e9ce1 253 int dma_op1;\r
4f672280 254\r
312e9ce1 255 if(!(dma_op&2)) dma_op = (Pico.video.type==1) ? 0 : 1; // setting dma_timings offset here according to Gens\r
256 dma_op1 = dma_op;\r
257 if(Pico.video.reg[12] & 1) dma_op |= 4; // 40 cell mode?\r
258 if(!(Pico.video.status&8)&&(Pico.video.reg[1]&0x40)) dma_op|=8; // active display?\r
69996cb7 259 xfers_can = dma_timings[dma_op];\r
9761a7d0 260 if(xfers <= xfers_can)\r
261 {\r
4f672280 262 if(dma_op&2) Pico.video.status&=~2; // dma no longer busy\r
263 else {\r
69996cb7 264 burn = xfers * dma_bsycles[dma_op] >> 8; // have to be approximate because can't afford division..\r
4f672280 265 }\r
69996cb7 266 Pico.m.dma_xfers = 0;\r
4f672280 267 } else {\r
268 if(!(dma_op&2)) burn = 488;\r
69996cb7 269 Pico.m.dma_xfers -= xfers_can;\r
4f672280 270 }\r
271\r
69996cb7 272 elprintf(EL_VDPDMA, "~Dma %i op=%i can=%i burn=%i [%i]", Pico.m.dma_xfers, dma_op1, xfers_can, burn, SekCyclesDone());\r
312e9ce1 273 //dprintf("~aim: %i, cnt: %i", SekCycleAim, SekCycleCnt);\r
274 return burn;\r
4f672280 275}\r
276\r
efcba75f 277#include "pico_cmn.c"\r
4b9c5888 278\r
ae214f1c 279unsigned int last_z80_sync; /* in 68k cycles */\r
280int z80_cycle_cnt;\r
4b9c5888 281int z80_cycle_aim;\r
282int z80_scanline;\r
283int z80_scanline_cycles; /* cycles done until z80_scanline */\r
284\r
285/* sync z80 to 68k */\r
ae214f1c 286PICO_INTERNAL void PicoSyncZ80(unsigned int m68k_cycles_done)\r
cc68a136 287{\r
a6523294 288 int m68k_cnt;\r
4b9c5888 289 int cnt;\r
a6523294 290\r
291 m68k_cnt = m68k_cycles_done - last_z80_sync;\r
292 z80_cycle_aim += cycles_68k_to_z80(m68k_cnt);\r
4b9c5888 293 cnt = z80_cycle_aim - z80_cycle_cnt;\r
ae214f1c 294 last_z80_sync = m68k_cycles_done;\r
cc68a136 295\r
f6c49d38 296 pprof_start(z80);\r
297\r
ae214f1c 298 elprintf(EL_BUSREQ, "z80 sync %i (%u|%u -> %u|%u)", cnt,\r
299 z80_cycle_cnt, z80_cycle_cnt / 288,\r
300 z80_cycle_aim, z80_cycle_aim / 288);\r
4b9c5888 301\r
302 if (cnt > 0)\r
303 z80_cycle_cnt += z80_run(cnt);\r
f6c49d38 304\r
305 pprof_end(z80);\r
cc68a136 306}\r
307\r
4b9c5888 308\r
2aa27095 309void PicoFrame(void)\r
cc68a136 310{\r
f6c49d38 311 pprof_start(frame);\r
312\r
8c1952f0 313 Pico.m.frame_count++;\r
314\r
19954be1 315 if (PicoAHW & PAHW_SMS) {\r
316 PicoFrameMS();\r
f6c49d38 317 goto end;\r
cc68a136 318 }\r
19954be1 319\r
fa8fb754 320 if (PicoAHW & PAHW_32X) {\r
321 PicoFrame32x(); // also does MCD+32X\r
f6c49d38 322 goto end;\r
3e49ffd0 323 }\r
cc68a136 324\r
fa8fb754 325 if (PicoAHW & PAHW_MCD) {\r
326 PicoFrameMCD();\r
f6c49d38 327 goto end;\r
974fdb5b 328 }\r
329\r
cc68a136 330 //if(Pico.video.reg[12]&0x2) Pico.video.status ^= 0x10; // change odd bit in interlace mode\r
331\r
19954be1 332 PicoFrameStart();\r
2aa27095 333 PicoFrameHints();\r
f6c49d38 334\r
335end:\r
336 pprof_end(frame);\r
cc68a136 337}\r
338\r
a12e0116 339void PicoFrameDrawOnly(void)\r
340{\r
87b0845f 341 if (!(PicoAHW & PAHW_SMS)) {\r
342 PicoFrameStart();\r
343 PicoDrawSync(223, 0);\r
344 } else {\r
345 PicoFrameDrawOnlyMS();\r
346 }\r
a12e0116 347}\r
348\r
4609d0cd 349void PicoGetInternal(pint_t which, pint_ret_t *r)\r
8e5427a0 350{\r
351 switch (which)\r
352 {\r
4609d0cd 353 case PI_ROM: r->vptr = Pico.rom; break;\r
354 case PI_ISPAL: r->vint = Pico.m.pal; break;\r
355 case PI_IS40_CELL: r->vint = Pico.video.reg[12]&1; break;\r
356 case PI_IS240_LINES: r->vint = Pico.m.pal && (Pico.video.reg[1]&8); break;\r
8e5427a0 357 }\r
8e5427a0 358}\r
359\r
66fdc0f0 360// callback to output message from emu\r
361void (*PicoMessage)(const char *msg)=NULL;\r
cc68a136 362\r