handle dbra wait loops, update cyclone
[picodrive.git] / pico / pico.c
CommitLineData
cff531af 1/*\r
2 * PicoDrive\r
3 * (c) Copyright Dave, 2004\r
4 * (C) notaz, 2006-2010\r
5 *\r
6 * This work is licensed under the terms of MAME license.\r
7 * See COPYING file in the top-level directory.\r
8 */\r
cc68a136 9\r
efcba75f 10#include "pico_int.h"\r
cc68a136 11#include "sound/ym2612.h"\r
12\r
cc68a136 13struct Pico Pico;\r
5e128c6d 14int PicoOpt; \r
15int PicoSkipFrame; // skip rendering frame?\r
2b02d6e5 16int PicoPad[2]; // Joypads, format is MXYZ SACB RLDU\r
5f9a0d16 17int PicoPadInt[2]; // internal copy\r
5e128c6d 18int PicoAHW; // active addon hardware: PAHW_*\r
a76fad41 19int PicoQuirks; // game-specific quirks\r
5e128c6d 20int PicoRegionOverride; // override the region detection 0: Auto, 1: Japan NTSC, 2: Japan PAL, 4: US, 8: Europe\r
21int PicoAutoRgnOrder;\r
22\r
23struct PicoSRAM SRam;\r
24int emustatus; // rapid_ym2612, multi_ym_updates\r
25int scanlines_total;\r
602133e1 26\r
f8ef8ff7 27void (*PicoWriteSound)(int len) = NULL; // called at the best time to send sound buffer (PsndOut) to hardware\r
28void (*PicoResetHook)(void) = NULL;\r
b0677887 29void (*PicoLineHook)(void) = NULL;\r
cc68a136 30\r
cc68a136 31// to be called once on emu init\r
2aa27095 32void PicoInit(void)\r
cc68a136 33{\r
34 // Blank space for state:\r
35 memset(&Pico,0,sizeof(Pico));\r
36 memset(&PicoPad,0,sizeof(PicoPad));\r
5f9a0d16 37 memset(&PicoPadInt,0,sizeof(PicoPadInt));\r
cc68a136 38\r
39 // Init CPUs:\r
40 SekInit();\r
41 z80_init(); // init even if we aren't going to use it\r
42\r
cc68a136 43 PicoInitMCD();\r
e807ac75 44 PicoSVPInit();\r
be2c4208 45 Pico32xInit();\r
cc68a136 46}\r
47\r
48// to be called once on emu exit\r
49void PicoExit(void)\r
50{\r
602133e1 51 if (PicoAHW & PAHW_MCD)\r
4f265db7 52 PicoExitMCD();\r
ca482e5d 53 PicoCartUnload();\r
cc68a136 54 z80_exit();\r
55\r
45f2f245 56 if (SRam.data)\r
57 free(SRam.data);\r
19886062 58 pevt_dump();\r
cc68a136 59}\r
60\r
1cb1584b 61void PicoPower(void)\r
62{\r
053fd9b4 63 Pico.m.frame_count = 0;\r
64\r
1cb1584b 65 // clear all memory of the emulated machine\r
b8a1c09a 66 memset(&Pico.ram,0,(unsigned char *)&Pico.rom - Pico.ram);\r
1cb1584b 67\r
68 memset(&Pico.video,0,sizeof(Pico.video));\r
69 memset(&Pico.m,0,sizeof(Pico.m));\r
70\r
71 Pico.video.pending_ints=0;\r
72 z80_reset();\r
73\r
531a8f38 74 // my MD1 VA6 console has this in IO\r
75 Pico.ioports[1] = Pico.ioports[2] = Pico.ioports[3] = 0xff;\r
76\r
1cb1584b 77 // default VDP register values (based on Fusion)\r
78 Pico.video.reg[0] = Pico.video.reg[1] = 0x04;\r
79 Pico.video.reg[0xc] = 0x81;\r
80 Pico.video.reg[0xf] = 0x02;\r
81\r
602133e1 82 if (PicoAHW & PAHW_MCD)\r
1cb1584b 83 PicoPowerMCD();\r
84\r
db1d3564 85 if (PicoOpt & POPT_EN_32X)\r
974fdb5b 86 PicoPower32x();\r
87\r
1cb1584b 88 PicoReset();\r
89}\r
90\r
1e6b5e39 91PICO_INTERNAL void PicoDetectRegion(void)\r
cc68a136 92{\r
1e6b5e39 93 int support=0, hw=0, i;\r
cc68a136 94 unsigned char pal=0;\r
cc68a136 95\r
1e6b5e39 96 if (PicoRegionOverride)\r
cc68a136 97 {\r
98 support = PicoRegionOverride;\r
99 }\r
100 else\r
101 {\r
102 // Read cartridge region data:\r
af37bca8 103 unsigned short *rd = (unsigned short *)(Pico.rom + 0x1f0);\r
104 int region = (rd[0] << 16) | rd[1];\r
cc68a136 105\r
af37bca8 106 for (i = 0; i < 4; i++)\r
cc68a136 107 {\r
af37bca8 108 int c;\r
cc68a136 109\r
af37bca8 110 c = region >> (i<<3);\r
111 c &= 0xff;\r
112 if (c <= ' ') continue;\r
cc68a136 113\r
51a902ae 114 if (c=='J') support|=1;\r
115 else if (c=='U') support|=4;\r
116 else if (c=='E') support|=8;\r
117 else if (c=='j') {support|=1; break; }\r
118 else if (c=='u') {support|=4; break; }\r
119 else if (c=='e') {support|=8; break; }\r
cc68a136 120 else\r
121 {\r
122 // New style code:\r
123 char s[2]={0,0};\r
124 s[0]=(char)c;\r
125 support|=strtol(s,NULL,16);\r
126 }\r
127 }\r
128 }\r
129\r
51a902ae 130 // auto detection order override\r
131 if (PicoAutoRgnOrder) {\r
132 if (((PicoAutoRgnOrder>>0)&0xf) & support) support = (PicoAutoRgnOrder>>0)&0xf;\r
133 else if (((PicoAutoRgnOrder>>4)&0xf) & support) support = (PicoAutoRgnOrder>>4)&0xf;\r
134 else if (((PicoAutoRgnOrder>>8)&0xf) & support) support = (PicoAutoRgnOrder>>8)&0xf;\r
135 }\r
136\r
cc68a136 137 // Try to pick the best hardware value for English/50hz:\r
138 if (support&8) { hw=0xc0; pal=1; } // Europe\r
139 else if (support&4) hw=0x80; // USA\r
140 else if (support&2) { hw=0x40; pal=1; } // Japan PAL\r
141 else if (support&1) hw=0x00; // Japan NTSC\r
142 else hw=0x80; // USA\r
143\r
144 Pico.m.hardware=(unsigned char)(hw|0x20); // No disk attached\r
145 Pico.m.pal=pal;\r
1e6b5e39 146}\r
147\r
148int PicoReset(void)\r
149{\r
2ec9bec5 150 if (Pico.romsize <= 0)\r
151 return 1;\r
1e6b5e39 152\r
12da51c2 153#if defined(CPU_CMP_R) || defined(CPU_CMP_W) || defined(DRC_CMP)\r
6d797957 154 PicoOpt |= POPT_DIS_VDP_FIFO|POPT_DIS_IDLE_DET;\r
155#endif\r
156\r
1e6b5e39 157 /* must call now, so that banking is reset, and correct vectors get fetched */\r
2ec9bec5 158 if (PicoResetHook)\r
159 PicoResetHook();\r
1e6b5e39 160\r
5f9a0d16 161 memset(&PicoPadInt,0,sizeof(PicoPadInt));\r
2ec9bec5 162 emustatus = 0;\r
163\r
164 if (PicoAHW & PAHW_SMS) {\r
165 PicoResetMS();\r
166 return 0;\r
167 }\r
168\r
169 SekReset();\r
1e6b5e39 170 // s68k doesn't have the TAS quirk, so we just globally set normal TAS handler in MCD mode (used by Batman games).\r
171 SekSetRealTAS(PicoAHW & PAHW_MCD);\r
ae214f1c 172 SekCycleCnt = SekCycleAim = 0;\r
1e6b5e39 173\r
1e6b5e39 174 Pico.m.dirtyPal = 1;\r
175\r
1832075e 176 Pico.m.z80_bank68k = 0;\r
af37bca8 177 Pico.m.z80_reset = 1;\r
1832075e 178 memset(Pico.zram, 0, sizeof(Pico.zram)); // ??\r
179\r
1e6b5e39 180 PicoDetectRegion();\r
e5fa9817 181 Pico.video.status = 0x3428 | Pico.m.pal; // 'always set' bits | vblank | collision | pal\r
cc68a136 182\r
9d917eea 183 PsndReset(); // pal must be known here\r
cc68a136 184\r
1cb1584b 185 // create an empty "dma" to cause 68k exec start at random frame location\r
2ec9bec5 186 if (Pico.m.dma_xfers == 0 && !(PicoOpt & POPT_DIS_VDP_FIFO))\r
1cb1584b 187 Pico.m.dma_xfers = rand() & 0x1fff;\r
188\r
5ed2a20e 189 SekFinishIdleDet();\r
190\r
602133e1 191 if (PicoAHW & PAHW_MCD) {\r
1cb1584b 192 PicoResetMCD();\r
cc68a136 193 return 0;\r
194 }\r
5ed2a20e 195\r
196 // reinit, so that checksum checks pass\r
197 if (!(PicoOpt & POPT_DIS_IDLE_DET))\r
198 SekInitIdleDet();\r
cc68a136 199\r
1f1ff763 200 if (PicoOpt & POPT_EN_32X)\r
be2c4208 201 PicoReset32x();\r
be2c4208 202\r
1dceadae 203 // reset sram state; enable sram access by default if it doesn't overlap with ROM\r
45f2f245 204 Pico.m.sram_reg = 0;\r
205 if ((SRam.flags & SRF_EEPROM) || Pico.romsize <= SRam.start)\r
206 Pico.m.sram_reg |= SRR_MAPPED;\r
cc68a136 207\r
45f2f245 208 if (SRam.flags & SRF_ENABLED)\r
209 elprintf(EL_STATUS, "sram: %06x - %06x; eeprom: %i", SRam.start, SRam.end,\r
210 !!(SRam.flags & SRF_EEPROM));\r
cc68a136 211\r
212 return 0;\r
213}\r
214\r
46bcb899 215// flush config changes before emu loop starts\r
5e128c6d 216void PicoLoopPrepare(void)\r
217{\r
218 if (PicoRegionOverride)\r
219 // force setting possibly changed..\r
220 Pico.m.pal = (PicoRegionOverride == 2 || PicoRegionOverride == 8) ? 1 : 0;\r
221\r
222 // FIXME: PAL has 313 scanlines..\r
223 scanlines_total = Pico.m.pal ? 312 : 262;\r
db1d3564 224\r
2446536b 225 Pico.m.dirtyPal = 1;\r
226 rendstatus_old = -1;\r
5e128c6d 227}\r
228\r
1dceadae 229\r
69996cb7 230// dma2vram settings are just hacks to unglitch Legend of Galahad (needs <= 104 to work)\r
231// same for Outrunners (92-121, when active is set to 24)\r
48df6e9e 232// 96 is VR hack\r
69996cb7 233static const int dma_timings[] = {\r
a4dfdb6d 234 167, 167, 166, 83, // vblank: 32cell: dma2vram dma2[vs|c]ram vram_fill vram_copy\r
053fd9b4 235 102, 205, 204, 102, // vblank: 40cell:\r
236 16, 16, 15, 8, // active: 32cell:\r
237 24, 18, 17, 9 // ...\r
4f672280 238};\r
239\r
69996cb7 240static const int dma_bsycles[] = {\r
a4dfdb6d 241 (488<<8)/167, (488<<8)/167, (488<<8)/166, (488<<8)/83,\r
242 (488<<8)/102, (488<<8)/233, (488<<8)/204, (488<<8)/102,\r
053fd9b4 243 (488<<8)/16, (488<<8)/16, (488<<8)/15, (488<<8)/8,\r
244 (488<<8)/24, (488<<8)/18, (488<<8)/17, (488<<8)/9\r
312e9ce1 245};\r
246\r
a4dfdb6d 247// grossly inaccurate.. FIXME FIXXXMEE\r
eff55556 248PICO_INTERNAL int CheckDMA(void)\r
4f672280 249{\r
69996cb7 250 int burn = 0, xfers_can, dma_op = Pico.video.reg[0x17]>>6; // see gens for 00 and 01 modes\r
251 int xfers = Pico.m.dma_xfers;\r
312e9ce1 252 int dma_op1;\r
4f672280 253\r
312e9ce1 254 if(!(dma_op&2)) dma_op = (Pico.video.type==1) ? 0 : 1; // setting dma_timings offset here according to Gens\r
255 dma_op1 = dma_op;\r
256 if(Pico.video.reg[12] & 1) dma_op |= 4; // 40 cell mode?\r
257 if(!(Pico.video.status&8)&&(Pico.video.reg[1]&0x40)) dma_op|=8; // active display?\r
69996cb7 258 xfers_can = dma_timings[dma_op];\r
9761a7d0 259 if(xfers <= xfers_can)\r
260 {\r
4f672280 261 if(dma_op&2) Pico.video.status&=~2; // dma no longer busy\r
262 else {\r
69996cb7 263 burn = xfers * dma_bsycles[dma_op] >> 8; // have to be approximate because can't afford division..\r
4f672280 264 }\r
69996cb7 265 Pico.m.dma_xfers = 0;\r
4f672280 266 } else {\r
267 if(!(dma_op&2)) burn = 488;\r
69996cb7 268 Pico.m.dma_xfers -= xfers_can;\r
4f672280 269 }\r
270\r
69996cb7 271 elprintf(EL_VDPDMA, "~Dma %i op=%i can=%i burn=%i [%i]", Pico.m.dma_xfers, dma_op1, xfers_can, burn, SekCyclesDone());\r
312e9ce1 272 //dprintf("~aim: %i, cnt: %i", SekCycleAim, SekCycleCnt);\r
273 return burn;\r
4f672280 274}\r
275\r
efcba75f 276#include "pico_cmn.c"\r
4b9c5888 277\r
ae214f1c 278unsigned int last_z80_sync; /* in 68k cycles */\r
279int z80_cycle_cnt;\r
4b9c5888 280int z80_cycle_aim;\r
281int z80_scanline;\r
282int z80_scanline_cycles; /* cycles done until z80_scanline */\r
283\r
284/* sync z80 to 68k */\r
ae214f1c 285PICO_INTERNAL void PicoSyncZ80(unsigned int m68k_cycles_done)\r
cc68a136 286{\r
4b9c5888 287 int cnt;\r
ae214f1c 288 z80_cycle_aim += cycles_68k_to_z80(m68k_cycles_done - last_z80_sync);\r
4b9c5888 289 cnt = z80_cycle_aim - z80_cycle_cnt;\r
ae214f1c 290 last_z80_sync = m68k_cycles_done;\r
cc68a136 291\r
f6c49d38 292 pprof_start(z80);\r
293\r
ae214f1c 294 elprintf(EL_BUSREQ, "z80 sync %i (%u|%u -> %u|%u)", cnt,\r
295 z80_cycle_cnt, z80_cycle_cnt / 288,\r
296 z80_cycle_aim, z80_cycle_aim / 288);\r
4b9c5888 297\r
298 if (cnt > 0)\r
299 z80_cycle_cnt += z80_run(cnt);\r
f6c49d38 300\r
301 pprof_end(z80);\r
cc68a136 302}\r
303\r
4b9c5888 304\r
2aa27095 305void PicoFrame(void)\r
cc68a136 306{\r
f6c49d38 307 pprof_start(frame);\r
308\r
8c1952f0 309 Pico.m.frame_count++;\r
310\r
19954be1 311 if (PicoAHW & PAHW_SMS) {\r
312 PicoFrameMS();\r
f6c49d38 313 goto end;\r
cc68a136 314 }\r
19954be1 315\r
974fdb5b 316 // TODO: MCD+32X\r
19954be1 317 if (PicoAHW & PAHW_MCD) {\r
318 PicoFrameMCD();\r
f6c49d38 319 goto end;\r
3e49ffd0 320 }\r
cc68a136 321\r
974fdb5b 322 if (PicoAHW & PAHW_32X) {\r
323 PicoFrame32x();\r
f6c49d38 324 goto end;\r
974fdb5b 325 }\r
326\r
cc68a136 327 //if(Pico.video.reg[12]&0x2) Pico.video.status ^= 0x10; // change odd bit in interlace mode\r
328\r
19954be1 329 PicoFrameStart();\r
2aa27095 330 PicoFrameHints();\r
f6c49d38 331\r
332end:\r
333 pprof_end(frame);\r
cc68a136 334}\r
335\r
a12e0116 336void PicoFrameDrawOnly(void)\r
337{\r
87b0845f 338 if (!(PicoAHW & PAHW_SMS)) {\r
339 PicoFrameStart();\r
340 PicoDrawSync(223, 0);\r
341 } else {\r
342 PicoFrameDrawOnlyMS();\r
343 }\r
a12e0116 344}\r
345\r
4609d0cd 346void PicoGetInternal(pint_t which, pint_ret_t *r)\r
8e5427a0 347{\r
348 switch (which)\r
349 {\r
4609d0cd 350 case PI_ROM: r->vptr = Pico.rom; break;\r
351 case PI_ISPAL: r->vint = Pico.m.pal; break;\r
352 case PI_IS40_CELL: r->vint = Pico.video.reg[12]&1; break;\r
353 case PI_IS240_LINES: r->vint = Pico.m.pal && (Pico.video.reg[1]&8); break;\r
8e5427a0 354 }\r
8e5427a0 355}\r
356\r
66fdc0f0 357// callback to output message from emu\r
358void (*PicoMessage)(const char *msg)=NULL;\r
cc68a136 359\r