cff531af |
1 | /*\r |
2 | * PicoDrive\r |
3 | * (c) Copyright Dave, 2004\r |
4 | * (C) notaz, 2006-2010\r |
5 | *\r |
6 | * This work is licensed under the terms of MAME license.\r |
7 | * See COPYING file in the top-level directory.\r |
8 | */\r |
cc68a136 |
9 | \r |
efcba75f |
10 | #include "pico_int.h"\r |
cc68a136 |
11 | #include "sound/ym2612.h"\r |
12 | \r |
cc68a136 |
13 | struct Pico Pico;\r |
88fd63ad |
14 | struct PicoMem PicoMem;\r |
5e128c6d |
15 | int PicoOpt; \r |
16 | int PicoSkipFrame; // skip rendering frame?\r |
2b02d6e5 |
17 | int PicoPad[2]; // Joypads, format is MXYZ SACB RLDU\r |
5f9a0d16 |
18 | int PicoPadInt[2]; // internal copy\r |
5e128c6d |
19 | int PicoAHW; // active addon hardware: PAHW_*\r |
a76fad41 |
20 | int PicoQuirks; // game-specific quirks\r |
5e128c6d |
21 | int PicoRegionOverride; // override the region detection 0: Auto, 1: Japan NTSC, 2: Japan PAL, 4: US, 8: Europe\r |
22 | int PicoAutoRgnOrder;\r |
23 | \r |
5e128c6d |
24 | int emustatus; // rapid_ym2612, multi_ym_updates\r |
602133e1 |
25 | \r |
f8ef8ff7 |
26 | void (*PicoWriteSound)(int len) = NULL; // called at the best time to send sound buffer (PsndOut) to hardware\r |
27 | void (*PicoResetHook)(void) = NULL;\r |
b0677887 |
28 | void (*PicoLineHook)(void) = NULL;\r |
cc68a136 |
29 | \r |
cc68a136 |
30 | // to be called once on emu init\r |
2aa27095 |
31 | void PicoInit(void)\r |
cc68a136 |
32 | {\r |
33 | // Blank space for state:\r |
34 | memset(&Pico,0,sizeof(Pico));\r |
88fd63ad |
35 | memset(&PicoMem,0,sizeof(PicoMem));\r |
cc68a136 |
36 | memset(&PicoPad,0,sizeof(PicoPad));\r |
5f9a0d16 |
37 | memset(&PicoPadInt,0,sizeof(PicoPadInt));\r |
cc68a136 |
38 | \r |
88fd63ad |
39 | Pico.est.Pico = &Pico;\r |
40 | Pico.est.PicoMem_vram = PicoMem.vram;\r |
41 | Pico.est.PicoMem_cram = PicoMem.cram;\r |
99bdfd31 |
42 | Pico.est.PicoOpt = &PicoOpt;\r |
ea38612f |
43 | \r |
cc68a136 |
44 | // Init CPUs:\r |
45 | SekInit();\r |
46 | z80_init(); // init even if we aren't going to use it\r |
47 | \r |
cc68a136 |
48 | PicoInitMCD();\r |
e807ac75 |
49 | PicoSVPInit();\r |
be2c4208 |
50 | Pico32xInit();\r |
99bdfd31 |
51 | \r |
52 | PicoDrawInit();\r |
98a27142 |
53 | PicoDraw2Init();\r |
cc68a136 |
54 | }\r |
55 | \r |
56 | // to be called once on emu exit\r |
57 | void PicoExit(void)\r |
58 | {\r |
602133e1 |
59 | if (PicoAHW & PAHW_MCD)\r |
4f265db7 |
60 | PicoExitMCD();\r |
ca482e5d |
61 | PicoCartUnload();\r |
cc68a136 |
62 | z80_exit();\r |
63 | \r |
a4fa71d4 |
64 | free(Pico.sv.data);\r |
65 | Pico.sv.data = NULL;\r |
66 | Pico.sv.start = Pico.sv.end = 0;\r |
19886062 |
67 | pevt_dump();\r |
cc68a136 |
68 | }\r |
69 | \r |
1cb1584b |
70 | void PicoPower(void)\r |
71 | {\r |
053fd9b4 |
72 | Pico.m.frame_count = 0;\r |
88fd63ad |
73 | Pico.t.m68c_cnt = Pico.t.m68c_aim = 0;\r |
053fd9b4 |
74 | \r |
1cb1584b |
75 | // clear all memory of the emulated machine\r |
88fd63ad |
76 | memset(&PicoMem,0,sizeof(PicoMem));\r |
1cb1584b |
77 | \r |
78 | memset(&Pico.video,0,sizeof(Pico.video));\r |
79 | memset(&Pico.m,0,sizeof(Pico.m));\r |
80 | \r |
81 | Pico.video.pending_ints=0;\r |
82 | z80_reset();\r |
83 | \r |
531a8f38 |
84 | // my MD1 VA6 console has this in IO\r |
88fd63ad |
85 | PicoMem.ioports[1] = PicoMem.ioports[2] = PicoMem.ioports[3] = 0xff;\r |
531a8f38 |
86 | \r |
1cb1584b |
87 | // default VDP register values (based on Fusion)\r |
88 | Pico.video.reg[0] = Pico.video.reg[1] = 0x04;\r |
89 | Pico.video.reg[0xc] = 0x81;\r |
90 | Pico.video.reg[0xf] = 0x02;\r |
91 | \r |
602133e1 |
92 | if (PicoAHW & PAHW_MCD)\r |
1cb1584b |
93 | PicoPowerMCD();\r |
94 | \r |
db1d3564 |
95 | if (PicoOpt & POPT_EN_32X)\r |
974fdb5b |
96 | PicoPower32x();\r |
97 | \r |
1cb1584b |
98 | PicoReset();\r |
99 | }\r |
100 | \r |
1e6b5e39 |
101 | PICO_INTERNAL void PicoDetectRegion(void)\r |
cc68a136 |
102 | {\r |
1e6b5e39 |
103 | int support=0, hw=0, i;\r |
cc68a136 |
104 | unsigned char pal=0;\r |
cc68a136 |
105 | \r |
1e6b5e39 |
106 | if (PicoRegionOverride)\r |
cc68a136 |
107 | {\r |
108 | support = PicoRegionOverride;\r |
109 | }\r |
110 | else\r |
111 | {\r |
112 | // Read cartridge region data:\r |
af37bca8 |
113 | unsigned short *rd = (unsigned short *)(Pico.rom + 0x1f0);\r |
114 | int region = (rd[0] << 16) | rd[1];\r |
cc68a136 |
115 | \r |
af37bca8 |
116 | for (i = 0; i < 4; i++)\r |
cc68a136 |
117 | {\r |
af37bca8 |
118 | int c;\r |
cc68a136 |
119 | \r |
af37bca8 |
120 | c = region >> (i<<3);\r |
121 | c &= 0xff;\r |
122 | if (c <= ' ') continue;\r |
cc68a136 |
123 | \r |
51a902ae |
124 | if (c=='J') support|=1;\r |
125 | else if (c=='U') support|=4;\r |
126 | else if (c=='E') support|=8;\r |
127 | else if (c=='j') {support|=1; break; }\r |
128 | else if (c=='u') {support|=4; break; }\r |
129 | else if (c=='e') {support|=8; break; }\r |
cc68a136 |
130 | else\r |
131 | {\r |
132 | // New style code:\r |
133 | char s[2]={0,0};\r |
134 | s[0]=(char)c;\r |
135 | support|=strtol(s,NULL,16);\r |
136 | }\r |
137 | }\r |
138 | }\r |
139 | \r |
51a902ae |
140 | // auto detection order override\r |
141 | if (PicoAutoRgnOrder) {\r |
142 | if (((PicoAutoRgnOrder>>0)&0xf) & support) support = (PicoAutoRgnOrder>>0)&0xf;\r |
143 | else if (((PicoAutoRgnOrder>>4)&0xf) & support) support = (PicoAutoRgnOrder>>4)&0xf;\r |
144 | else if (((PicoAutoRgnOrder>>8)&0xf) & support) support = (PicoAutoRgnOrder>>8)&0xf;\r |
145 | }\r |
146 | \r |
cc68a136 |
147 | // Try to pick the best hardware value for English/50hz:\r |
148 | if (support&8) { hw=0xc0; pal=1; } // Europe\r |
149 | else if (support&4) hw=0x80; // USA\r |
150 | else if (support&2) { hw=0x40; pal=1; } // Japan PAL\r |
151 | else if (support&1) hw=0x00; // Japan NTSC\r |
152 | else hw=0x80; // USA\r |
153 | \r |
154 | Pico.m.hardware=(unsigned char)(hw|0x20); // No disk attached\r |
155 | Pico.m.pal=pal;\r |
1e6b5e39 |
156 | }\r |
157 | \r |
158 | int PicoReset(void)\r |
159 | {\r |
2ec9bec5 |
160 | if (Pico.romsize <= 0)\r |
161 | return 1;\r |
1e6b5e39 |
162 | \r |
12da51c2 |
163 | #if defined(CPU_CMP_R) || defined(CPU_CMP_W) || defined(DRC_CMP)\r |
6d797957 |
164 | PicoOpt |= POPT_DIS_VDP_FIFO|POPT_DIS_IDLE_DET;\r |
165 | #endif\r |
166 | \r |
1e6b5e39 |
167 | /* must call now, so that banking is reset, and correct vectors get fetched */\r |
2ec9bec5 |
168 | if (PicoResetHook)\r |
169 | PicoResetHook();\r |
1e6b5e39 |
170 | \r |
5f9a0d16 |
171 | memset(&PicoPadInt,0,sizeof(PicoPadInt));\r |
2ec9bec5 |
172 | emustatus = 0;\r |
173 | \r |
174 | if (PicoAHW & PAHW_SMS) {\r |
175 | PicoResetMS();\r |
176 | return 0;\r |
177 | }\r |
178 | \r |
179 | SekReset();\r |
8e4e84c2 |
180 | // ..but do not reset SekCycle* to not desync with addons\r |
181 | \r |
1e6b5e39 |
182 | // s68k doesn't have the TAS quirk, so we just globally set normal TAS handler in MCD mode (used by Batman games).\r |
183 | SekSetRealTAS(PicoAHW & PAHW_MCD);\r |
1e6b5e39 |
184 | \r |
1e6b5e39 |
185 | Pico.m.dirtyPal = 1;\r |
186 | \r |
1832075e |
187 | Pico.m.z80_bank68k = 0;\r |
af37bca8 |
188 | Pico.m.z80_reset = 1;\r |
1832075e |
189 | \r |
1e6b5e39 |
190 | PicoDetectRegion();\r |
e5fa9817 |
191 | Pico.video.status = 0x3428 | Pico.m.pal; // 'always set' bits | vblank | collision | pal\r |
cc68a136 |
192 | \r |
9d917eea |
193 | PsndReset(); // pal must be known here\r |
cc68a136 |
194 | \r |
1cb1584b |
195 | // create an empty "dma" to cause 68k exec start at random frame location\r |
2ec9bec5 |
196 | if (Pico.m.dma_xfers == 0 && !(PicoOpt & POPT_DIS_VDP_FIFO))\r |
1cb1584b |
197 | Pico.m.dma_xfers = rand() & 0x1fff;\r |
198 | \r |
5ed2a20e |
199 | SekFinishIdleDet();\r |
200 | \r |
602133e1 |
201 | if (PicoAHW & PAHW_MCD) {\r |
1cb1584b |
202 | PicoResetMCD();\r |
cc68a136 |
203 | return 0;\r |
204 | }\r |
5ed2a20e |
205 | \r |
206 | // reinit, so that checksum checks pass\r |
207 | if (!(PicoOpt & POPT_DIS_IDLE_DET))\r |
208 | SekInitIdleDet();\r |
cc68a136 |
209 | \r |
1f1ff763 |
210 | if (PicoOpt & POPT_EN_32X)\r |
be2c4208 |
211 | PicoReset32x();\r |
be2c4208 |
212 | \r |
1dceadae |
213 | // reset sram state; enable sram access by default if it doesn't overlap with ROM\r |
45f2f245 |
214 | Pico.m.sram_reg = 0;\r |
88fd63ad |
215 | if ((Pico.sv.flags & SRF_EEPROM) || Pico.romsize <= Pico.sv.start)\r |
45f2f245 |
216 | Pico.m.sram_reg |= SRR_MAPPED;\r |
cc68a136 |
217 | \r |
88fd63ad |
218 | if (Pico.sv.flags & SRF_ENABLED)\r |
219 | elprintf(EL_STATUS, "sram: %06x - %06x; eeprom: %i", Pico.sv.start, Pico.sv.end,\r |
220 | !!(Pico.sv.flags & SRF_EEPROM));\r |
cc68a136 |
221 | \r |
222 | return 0;\r |
223 | }\r |
224 | \r |
46bcb899 |
225 | // flush config changes before emu loop starts\r |
5e128c6d |
226 | void PicoLoopPrepare(void)\r |
227 | {\r |
228 | if (PicoRegionOverride)\r |
229 | // force setting possibly changed..\r |
230 | Pico.m.pal = (PicoRegionOverride == 2 || PicoRegionOverride == 8) ? 1 : 0;\r |
231 | \r |
2446536b |
232 | Pico.m.dirtyPal = 1;\r |
233 | rendstatus_old = -1;\r |
5e128c6d |
234 | }\r |
235 | \r |
e42a47e2 |
236 | // this table is wrong and should be removed\r |
237 | // keeping it for now to compensate wrong timing elswhere, mainly for Outrunners\r |
69996cb7 |
238 | static const int dma_timings[] = {\r |
e42a47e2 |
239 | 83, 166, 83, 83, // vblank: 32cell: dma2vram dma2[vs|c]ram vram_fill vram_copy\r |
240 | 102, 204, 102, 102, // vblank: 40cell:\r |
241 | 8, 16, 8, 8, // active: 32cell:\r |
242 | 17, 18, 9, 9 // ...\r |
4f672280 |
243 | };\r |
244 | \r |
69996cb7 |
245 | static const int dma_bsycles[] = {\r |
e42a47e2 |
246 | (488<<8)/83, (488<<8)/166, (488<<8)/83, (488<<8)/83,\r |
247 | (488<<8)/102, (488<<8)/204, (488<<8)/102, (488<<8)/102,\r |
248 | (488<<8)/8, (488<<8)/16, (488<<8)/8, (488<<8)/8,\r |
249 | (488<<8)/9, (488<<8)/18, (488<<8)/9, (488<<8)/9\r |
312e9ce1 |
250 | };\r |
251 | \r |
a4dfdb6d |
252 | // grossly inaccurate.. FIXME FIXXXMEE\r |
eff55556 |
253 | PICO_INTERNAL int CheckDMA(void)\r |
4f672280 |
254 | {\r |
69996cb7 |
255 | int burn = 0, xfers_can, dma_op = Pico.video.reg[0x17]>>6; // see gens for 00 and 01 modes\r |
256 | int xfers = Pico.m.dma_xfers;\r |
312e9ce1 |
257 | int dma_op1;\r |
4f672280 |
258 | \r |
312e9ce1 |
259 | if(!(dma_op&2)) dma_op = (Pico.video.type==1) ? 0 : 1; // setting dma_timings offset here according to Gens\r |
260 | dma_op1 = dma_op;\r |
261 | if(Pico.video.reg[12] & 1) dma_op |= 4; // 40 cell mode?\r |
262 | if(!(Pico.video.status&8)&&(Pico.video.reg[1]&0x40)) dma_op|=8; // active display?\r |
69996cb7 |
263 | xfers_can = dma_timings[dma_op];\r |
9761a7d0 |
264 | if(xfers <= xfers_can)\r |
265 | {\r |
4f672280 |
266 | if(dma_op&2) Pico.video.status&=~2; // dma no longer busy\r |
267 | else {\r |
69996cb7 |
268 | burn = xfers * dma_bsycles[dma_op] >> 8; // have to be approximate because can't afford division..\r |
4f672280 |
269 | }\r |
69996cb7 |
270 | Pico.m.dma_xfers = 0;\r |
4f672280 |
271 | } else {\r |
272 | if(!(dma_op&2)) burn = 488;\r |
69996cb7 |
273 | Pico.m.dma_xfers -= xfers_can;\r |
4f672280 |
274 | }\r |
275 | \r |
0c7d1ba3 |
276 | elprintf(EL_VDPDMA, "~Dma %i op=%i can=%i burn=%i [%u]",\r |
277 | Pico.m.dma_xfers, dma_op1, xfers_can, burn, SekCyclesDone());\r |
88fd63ad |
278 | //dprintf("~aim: %i, cnt: %i", Pico.t.m68c_aim, Pico.t.m68c_cnt);\r |
312e9ce1 |
279 | return burn;\r |
4f672280 |
280 | }\r |
281 | \r |
efcba75f |
282 | #include "pico_cmn.c"\r |
4b9c5888 |
283 | \r |
4b9c5888 |
284 | /* sync z80 to 68k */\r |
ae214f1c |
285 | PICO_INTERNAL void PicoSyncZ80(unsigned int m68k_cycles_done)\r |
cc68a136 |
286 | {\r |
a6523294 |
287 | int m68k_cnt;\r |
4b9c5888 |
288 | int cnt;\r |
a6523294 |
289 | \r |
88fd63ad |
290 | m68k_cnt = m68k_cycles_done - Pico.t.m68c_frame_start;\r |
291 | Pico.t.z80c_aim = cycles_68k_to_z80(m68k_cnt);\r |
292 | cnt = Pico.t.z80c_aim - Pico.t.z80c_cnt;\r |
cc68a136 |
293 | \r |
f6c49d38 |
294 | pprof_start(z80);\r |
295 | \r |
ae214f1c |
296 | elprintf(EL_BUSREQ, "z80 sync %i (%u|%u -> %u|%u)", cnt,\r |
88fd63ad |
297 | Pico.t.z80c_cnt, Pico.t.z80c_cnt * 15 / 7 / 488,\r |
298 | Pico.t.z80c_aim, Pico.t.z80c_aim * 15 / 7 / 488);\r |
4b9c5888 |
299 | \r |
300 | if (cnt > 0)\r |
88fd63ad |
301 | Pico.t.z80c_cnt += z80_run(cnt);\r |
f6c49d38 |
302 | \r |
303 | pprof_end(z80);\r |
cc68a136 |
304 | }\r |
305 | \r |
4b9c5888 |
306 | \r |
2aa27095 |
307 | void PicoFrame(void)\r |
cc68a136 |
308 | {\r |
f6c49d38 |
309 | pprof_start(frame);\r |
310 | \r |
8c1952f0 |
311 | Pico.m.frame_count++;\r |
312 | \r |
19954be1 |
313 | if (PicoAHW & PAHW_SMS) {\r |
314 | PicoFrameMS();\r |
f6c49d38 |
315 | goto end;\r |
cc68a136 |
316 | }\r |
19954be1 |
317 | \r |
fa8fb754 |
318 | if (PicoAHW & PAHW_32X) {\r |
319 | PicoFrame32x(); // also does MCD+32X\r |
f6c49d38 |
320 | goto end;\r |
3e49ffd0 |
321 | }\r |
cc68a136 |
322 | \r |
fa8fb754 |
323 | if (PicoAHW & PAHW_MCD) {\r |
324 | PicoFrameMCD();\r |
f6c49d38 |
325 | goto end;\r |
974fdb5b |
326 | }\r |
327 | \r |
cc68a136 |
328 | //if(Pico.video.reg[12]&0x2) Pico.video.status ^= 0x10; // change odd bit in interlace mode\r |
329 | \r |
19954be1 |
330 | PicoFrameStart();\r |
2aa27095 |
331 | PicoFrameHints();\r |
f6c49d38 |
332 | \r |
333 | end:\r |
334 | pprof_end(frame);\r |
cc68a136 |
335 | }\r |
336 | \r |
a12e0116 |
337 | void PicoFrameDrawOnly(void)\r |
338 | {\r |
87b0845f |
339 | if (!(PicoAHW & PAHW_SMS)) {\r |
340 | PicoFrameStart();\r |
341 | PicoDrawSync(223, 0);\r |
342 | } else {\r |
343 | PicoFrameDrawOnlyMS();\r |
344 | }\r |
a12e0116 |
345 | }\r |
346 | \r |
4609d0cd |
347 | void PicoGetInternal(pint_t which, pint_ret_t *r)\r |
8e5427a0 |
348 | {\r |
349 | switch (which)\r |
350 | {\r |
4609d0cd |
351 | case PI_ROM: r->vptr = Pico.rom; break;\r |
352 | case PI_ISPAL: r->vint = Pico.m.pal; break;\r |
353 | case PI_IS40_CELL: r->vint = Pico.video.reg[12]&1; break;\r |
354 | case PI_IS240_LINES: r->vint = Pico.m.pal && (Pico.video.reg[1]&8); break;\r |
8e5427a0 |
355 | }\r |
8e5427a0 |
356 | }\r |
357 | \r |
66fdc0f0 |
358 | // callback to output message from emu\r |
359 | void (*PicoMessage)(const char *msg)=NULL;\r |
cc68a136 |
360 | \r |