some more risky timing changes
[picodrive.git] / pico / pico.c
CommitLineData
cff531af 1/*\r
2 * PicoDrive\r
3 * (c) Copyright Dave, 2004\r
4 * (C) notaz, 2006-2010\r
5 *\r
6 * This work is licensed under the terms of MAME license.\r
7 * See COPYING file in the top-level directory.\r
8 */\r
cc68a136 9\r
efcba75f 10#include "pico_int.h"\r
cc68a136 11#include "sound/ym2612.h"\r
12\r
cc68a136 13struct Pico Pico;\r
5e128c6d 14int PicoOpt; \r
15int PicoSkipFrame; // skip rendering frame?\r
2b02d6e5 16int PicoPad[2]; // Joypads, format is MXYZ SACB RLDU\r
5f9a0d16 17int PicoPadInt[2]; // internal copy\r
5e128c6d 18int PicoAHW; // active addon hardware: PAHW_*\r
a76fad41 19int PicoQuirks; // game-specific quirks\r
5e128c6d 20int PicoRegionOverride; // override the region detection 0: Auto, 1: Japan NTSC, 2: Japan PAL, 4: US, 8: Europe\r
21int PicoAutoRgnOrder;\r
22\r
23struct PicoSRAM SRam;\r
24int emustatus; // rapid_ym2612, multi_ym_updates\r
602133e1 25\r
f8ef8ff7 26void (*PicoWriteSound)(int len) = NULL; // called at the best time to send sound buffer (PsndOut) to hardware\r
27void (*PicoResetHook)(void) = NULL;\r
b0677887 28void (*PicoLineHook)(void) = NULL;\r
cc68a136 29\r
cc68a136 30// to be called once on emu init\r
2aa27095 31void PicoInit(void)\r
cc68a136 32{\r
33 // Blank space for state:\r
34 memset(&Pico,0,sizeof(Pico));\r
35 memset(&PicoPad,0,sizeof(PicoPad));\r
5f9a0d16 36 memset(&PicoPadInt,0,sizeof(PicoPadInt));\r
cc68a136 37\r
ea38612f 38 Pico.est.Pico_video = &Pico.video;\r
39 Pico.est.Pico_vram = Pico.vram;\r
99bdfd31 40 Pico.est.PicoOpt = &PicoOpt;\r
ea38612f 41\r
cc68a136 42 // Init CPUs:\r
43 SekInit();\r
44 z80_init(); // init even if we aren't going to use it\r
45\r
cc68a136 46 PicoInitMCD();\r
e807ac75 47 PicoSVPInit();\r
be2c4208 48 Pico32xInit();\r
99bdfd31 49\r
50 PicoDrawInit();\r
98a27142 51 PicoDraw2Init();\r
cc68a136 52}\r
53\r
54// to be called once on emu exit\r
55void PicoExit(void)\r
56{\r
602133e1 57 if (PicoAHW & PAHW_MCD)\r
4f265db7 58 PicoExitMCD();\r
ca482e5d 59 PicoCartUnload();\r
cc68a136 60 z80_exit();\r
61\r
45f2f245 62 if (SRam.data)\r
63 free(SRam.data);\r
19886062 64 pevt_dump();\r
cc68a136 65}\r
66\r
1cb1584b 67void PicoPower(void)\r
68{\r
053fd9b4 69 Pico.m.frame_count = 0;\r
8e4e84c2 70 SekCycleCnt = SekCycleAim = 0;\r
053fd9b4 71\r
1cb1584b 72 // clear all memory of the emulated machine\r
b8a1c09a 73 memset(&Pico.ram,0,(unsigned char *)&Pico.rom - Pico.ram);\r
1cb1584b 74\r
75 memset(&Pico.video,0,sizeof(Pico.video));\r
76 memset(&Pico.m,0,sizeof(Pico.m));\r
77\r
78 Pico.video.pending_ints=0;\r
79 z80_reset();\r
80\r
531a8f38 81 // my MD1 VA6 console has this in IO\r
82 Pico.ioports[1] = Pico.ioports[2] = Pico.ioports[3] = 0xff;\r
83\r
1cb1584b 84 // default VDP register values (based on Fusion)\r
85 Pico.video.reg[0] = Pico.video.reg[1] = 0x04;\r
86 Pico.video.reg[0xc] = 0x81;\r
87 Pico.video.reg[0xf] = 0x02;\r
88\r
602133e1 89 if (PicoAHW & PAHW_MCD)\r
1cb1584b 90 PicoPowerMCD();\r
91\r
db1d3564 92 if (PicoOpt & POPT_EN_32X)\r
974fdb5b 93 PicoPower32x();\r
94\r
1cb1584b 95 PicoReset();\r
96}\r
97\r
1e6b5e39 98PICO_INTERNAL void PicoDetectRegion(void)\r
cc68a136 99{\r
1e6b5e39 100 int support=0, hw=0, i;\r
cc68a136 101 unsigned char pal=0;\r
cc68a136 102\r
1e6b5e39 103 if (PicoRegionOverride)\r
cc68a136 104 {\r
105 support = PicoRegionOverride;\r
106 }\r
107 else\r
108 {\r
109 // Read cartridge region data:\r
af37bca8 110 unsigned short *rd = (unsigned short *)(Pico.rom + 0x1f0);\r
111 int region = (rd[0] << 16) | rd[1];\r
cc68a136 112\r
af37bca8 113 for (i = 0; i < 4; i++)\r
cc68a136 114 {\r
af37bca8 115 int c;\r
cc68a136 116\r
af37bca8 117 c = region >> (i<<3);\r
118 c &= 0xff;\r
119 if (c <= ' ') continue;\r
cc68a136 120\r
51a902ae 121 if (c=='J') support|=1;\r
122 else if (c=='U') support|=4;\r
123 else if (c=='E') support|=8;\r
124 else if (c=='j') {support|=1; break; }\r
125 else if (c=='u') {support|=4; break; }\r
126 else if (c=='e') {support|=8; break; }\r
cc68a136 127 else\r
128 {\r
129 // New style code:\r
130 char s[2]={0,0};\r
131 s[0]=(char)c;\r
132 support|=strtol(s,NULL,16);\r
133 }\r
134 }\r
135 }\r
136\r
51a902ae 137 // auto detection order override\r
138 if (PicoAutoRgnOrder) {\r
139 if (((PicoAutoRgnOrder>>0)&0xf) & support) support = (PicoAutoRgnOrder>>0)&0xf;\r
140 else if (((PicoAutoRgnOrder>>4)&0xf) & support) support = (PicoAutoRgnOrder>>4)&0xf;\r
141 else if (((PicoAutoRgnOrder>>8)&0xf) & support) support = (PicoAutoRgnOrder>>8)&0xf;\r
142 }\r
143\r
cc68a136 144 // Try to pick the best hardware value for English/50hz:\r
145 if (support&8) { hw=0xc0; pal=1; } // Europe\r
146 else if (support&4) hw=0x80; // USA\r
147 else if (support&2) { hw=0x40; pal=1; } // Japan PAL\r
148 else if (support&1) hw=0x00; // Japan NTSC\r
149 else hw=0x80; // USA\r
150\r
151 Pico.m.hardware=(unsigned char)(hw|0x20); // No disk attached\r
152 Pico.m.pal=pal;\r
1e6b5e39 153}\r
154\r
155int PicoReset(void)\r
156{\r
2ec9bec5 157 if (Pico.romsize <= 0)\r
158 return 1;\r
1e6b5e39 159\r
12da51c2 160#if defined(CPU_CMP_R) || defined(CPU_CMP_W) || defined(DRC_CMP)\r
6d797957 161 PicoOpt |= POPT_DIS_VDP_FIFO|POPT_DIS_IDLE_DET;\r
162#endif\r
163\r
1e6b5e39 164 /* must call now, so that banking is reset, and correct vectors get fetched */\r
2ec9bec5 165 if (PicoResetHook)\r
166 PicoResetHook();\r
1e6b5e39 167\r
5f9a0d16 168 memset(&PicoPadInt,0,sizeof(PicoPadInt));\r
2ec9bec5 169 emustatus = 0;\r
170\r
171 if (PicoAHW & PAHW_SMS) {\r
172 PicoResetMS();\r
173 return 0;\r
174 }\r
175\r
176 SekReset();\r
8e4e84c2 177 // ..but do not reset SekCycle* to not desync with addons\r
178\r
1e6b5e39 179 // s68k doesn't have the TAS quirk, so we just globally set normal TAS handler in MCD mode (used by Batman games).\r
180 SekSetRealTAS(PicoAHW & PAHW_MCD);\r
1e6b5e39 181\r
1e6b5e39 182 Pico.m.dirtyPal = 1;\r
183\r
1832075e 184 Pico.m.z80_bank68k = 0;\r
af37bca8 185 Pico.m.z80_reset = 1;\r
1832075e 186\r
1e6b5e39 187 PicoDetectRegion();\r
e5fa9817 188 Pico.video.status = 0x3428 | Pico.m.pal; // 'always set' bits | vblank | collision | pal\r
cc68a136 189\r
9d917eea 190 PsndReset(); // pal must be known here\r
cc68a136 191\r
1cb1584b 192 // create an empty "dma" to cause 68k exec start at random frame location\r
2ec9bec5 193 if (Pico.m.dma_xfers == 0 && !(PicoOpt & POPT_DIS_VDP_FIFO))\r
1cb1584b 194 Pico.m.dma_xfers = rand() & 0x1fff;\r
195\r
5ed2a20e 196 SekFinishIdleDet();\r
197\r
602133e1 198 if (PicoAHW & PAHW_MCD) {\r
1cb1584b 199 PicoResetMCD();\r
cc68a136 200 return 0;\r
201 }\r
5ed2a20e 202\r
203 // reinit, so that checksum checks pass\r
204 if (!(PicoOpt & POPT_DIS_IDLE_DET))\r
205 SekInitIdleDet();\r
cc68a136 206\r
1f1ff763 207 if (PicoOpt & POPT_EN_32X)\r
be2c4208 208 PicoReset32x();\r
be2c4208 209\r
1dceadae 210 // reset sram state; enable sram access by default if it doesn't overlap with ROM\r
45f2f245 211 Pico.m.sram_reg = 0;\r
212 if ((SRam.flags & SRF_EEPROM) || Pico.romsize <= SRam.start)\r
213 Pico.m.sram_reg |= SRR_MAPPED;\r
cc68a136 214\r
45f2f245 215 if (SRam.flags & SRF_ENABLED)\r
216 elprintf(EL_STATUS, "sram: %06x - %06x; eeprom: %i", SRam.start, SRam.end,\r
217 !!(SRam.flags & SRF_EEPROM));\r
cc68a136 218\r
219 return 0;\r
220}\r
221\r
46bcb899 222// flush config changes before emu loop starts\r
5e128c6d 223void PicoLoopPrepare(void)\r
224{\r
225 if (PicoRegionOverride)\r
226 // force setting possibly changed..\r
227 Pico.m.pal = (PicoRegionOverride == 2 || PicoRegionOverride == 8) ? 1 : 0;\r
228\r
2446536b 229 Pico.m.dirtyPal = 1;\r
230 rendstatus_old = -1;\r
5e128c6d 231}\r
232\r
e42a47e2 233// this table is wrong and should be removed\r
234// keeping it for now to compensate wrong timing elswhere, mainly for Outrunners\r
69996cb7 235static const int dma_timings[] = {\r
e42a47e2 236 83, 166, 83, 83, // vblank: 32cell: dma2vram dma2[vs|c]ram vram_fill vram_copy\r
237 102, 204, 102, 102, // vblank: 40cell:\r
238 8, 16, 8, 8, // active: 32cell:\r
239 17, 18, 9, 9 // ...\r
4f672280 240};\r
241\r
69996cb7 242static const int dma_bsycles[] = {\r
e42a47e2 243 (488<<8)/83, (488<<8)/166, (488<<8)/83, (488<<8)/83,\r
244 (488<<8)/102, (488<<8)/204, (488<<8)/102, (488<<8)/102,\r
245 (488<<8)/8, (488<<8)/16, (488<<8)/8, (488<<8)/8,\r
246 (488<<8)/9, (488<<8)/18, (488<<8)/9, (488<<8)/9\r
312e9ce1 247};\r
248\r
a4dfdb6d 249// grossly inaccurate.. FIXME FIXXXMEE\r
eff55556 250PICO_INTERNAL int CheckDMA(void)\r
4f672280 251{\r
69996cb7 252 int burn = 0, xfers_can, dma_op = Pico.video.reg[0x17]>>6; // see gens for 00 and 01 modes\r
253 int xfers = Pico.m.dma_xfers;\r
312e9ce1 254 int dma_op1;\r
4f672280 255\r
312e9ce1 256 if(!(dma_op&2)) dma_op = (Pico.video.type==1) ? 0 : 1; // setting dma_timings offset here according to Gens\r
257 dma_op1 = dma_op;\r
258 if(Pico.video.reg[12] & 1) dma_op |= 4; // 40 cell mode?\r
259 if(!(Pico.video.status&8)&&(Pico.video.reg[1]&0x40)) dma_op|=8; // active display?\r
69996cb7 260 xfers_can = dma_timings[dma_op];\r
9761a7d0 261 if(xfers <= xfers_can)\r
262 {\r
4f672280 263 if(dma_op&2) Pico.video.status&=~2; // dma no longer busy\r
264 else {\r
69996cb7 265 burn = xfers * dma_bsycles[dma_op] >> 8; // have to be approximate because can't afford division..\r
4f672280 266 }\r
69996cb7 267 Pico.m.dma_xfers = 0;\r
4f672280 268 } else {\r
269 if(!(dma_op&2)) burn = 488;\r
69996cb7 270 Pico.m.dma_xfers -= xfers_can;\r
4f672280 271 }\r
272\r
0c7d1ba3 273 elprintf(EL_VDPDMA, "~Dma %i op=%i can=%i burn=%i [%u]",\r
274 Pico.m.dma_xfers, dma_op1, xfers_can, burn, SekCyclesDone());\r
312e9ce1 275 //dprintf("~aim: %i, cnt: %i", SekCycleAim, SekCycleCnt);\r
276 return burn;\r
4f672280 277}\r
278\r
efcba75f 279#include "pico_cmn.c"\r
4b9c5888 280\r
ae214f1c 281unsigned int last_z80_sync; /* in 68k cycles */\r
282int z80_cycle_cnt;\r
4b9c5888 283int z80_cycle_aim;\r
284int z80_scanline;\r
285int z80_scanline_cycles; /* cycles done until z80_scanline */\r
286\r
287/* sync z80 to 68k */\r
ae214f1c 288PICO_INTERNAL void PicoSyncZ80(unsigned int m68k_cycles_done)\r
cc68a136 289{\r
a6523294 290 int m68k_cnt;\r
4b9c5888 291 int cnt;\r
a6523294 292\r
293 m68k_cnt = m68k_cycles_done - last_z80_sync;\r
294 z80_cycle_aim += cycles_68k_to_z80(m68k_cnt);\r
4b9c5888 295 cnt = z80_cycle_aim - z80_cycle_cnt;\r
ae214f1c 296 last_z80_sync = m68k_cycles_done;\r
cc68a136 297\r
f6c49d38 298 pprof_start(z80);\r
299\r
ae214f1c 300 elprintf(EL_BUSREQ, "z80 sync %i (%u|%u -> %u|%u)", cnt,\r
e42a47e2 301 z80_cycle_cnt, z80_cycle_cnt / 228,\r
302 z80_cycle_aim, z80_cycle_aim / 228);\r
4b9c5888 303\r
304 if (cnt > 0)\r
305 z80_cycle_cnt += z80_run(cnt);\r
f6c49d38 306\r
307 pprof_end(z80);\r
cc68a136 308}\r
309\r
4b9c5888 310\r
2aa27095 311void PicoFrame(void)\r
cc68a136 312{\r
f6c49d38 313 pprof_start(frame);\r
314\r
8c1952f0 315 Pico.m.frame_count++;\r
316\r
19954be1 317 if (PicoAHW & PAHW_SMS) {\r
318 PicoFrameMS();\r
f6c49d38 319 goto end;\r
cc68a136 320 }\r
19954be1 321\r
fa8fb754 322 if (PicoAHW & PAHW_32X) {\r
323 PicoFrame32x(); // also does MCD+32X\r
f6c49d38 324 goto end;\r
3e49ffd0 325 }\r
cc68a136 326\r
fa8fb754 327 if (PicoAHW & PAHW_MCD) {\r
328 PicoFrameMCD();\r
f6c49d38 329 goto end;\r
974fdb5b 330 }\r
331\r
cc68a136 332 //if(Pico.video.reg[12]&0x2) Pico.video.status ^= 0x10; // change odd bit in interlace mode\r
333\r
19954be1 334 PicoFrameStart();\r
2aa27095 335 PicoFrameHints();\r
f6c49d38 336\r
337end:\r
338 pprof_end(frame);\r
cc68a136 339}\r
340\r
a12e0116 341void PicoFrameDrawOnly(void)\r
342{\r
87b0845f 343 if (!(PicoAHW & PAHW_SMS)) {\r
344 PicoFrameStart();\r
345 PicoDrawSync(223, 0);\r
346 } else {\r
347 PicoFrameDrawOnlyMS();\r
348 }\r
a12e0116 349}\r
350\r
4609d0cd 351void PicoGetInternal(pint_t which, pint_ret_t *r)\r
8e5427a0 352{\r
353 switch (which)\r
354 {\r
4609d0cd 355 case PI_ROM: r->vptr = Pico.rom; break;\r
356 case PI_ISPAL: r->vint = Pico.m.pal; break;\r
357 case PI_IS40_CELL: r->vint = Pico.video.reg[12]&1; break;\r
358 case PI_IS240_LINES: r->vint = Pico.m.pal && (Pico.video.reg[1]&8); break;\r
8e5427a0 359 }\r
8e5427a0 360}\r
361\r
66fdc0f0 362// callback to output message from emu\r
363void (*PicoMessage)(const char *msg)=NULL;\r
cc68a136 364\r