libretro: pass required arg to VirtualProtect
[picodrive.git] / pico / cd / mcd.c
CommitLineData
cff531af 1/*
2 * PicoDrive
ae214f1c 3 * (C) notaz, 2007,2013
cff531af 4 *
5 * This work is licensed under the terms of MAME license.
6 * See COPYING file in the top-level directory.
7 */
cc68a136 8
efcba75f 9#include "../pico_int.h"
43e6eaad 10#include "../sound/ym2612.h"
cc68a136 11
76276b0b 12extern unsigned char formatted_bram[4*0x10];
ae214f1c 13
a6523294 14static unsigned int mcd_m68k_cycle_mult;
15static unsigned int mcd_m68k_cycle_base;
16static unsigned int mcd_s68k_cycle_base;
89fa852d 17
cc68a136 18
2aa27095 19PICO_INTERNAL void PicoInitMCD(void)
cc68a136 20{
21 SekInitS68k();
cc68a136 22}
23
eff55556 24PICO_INTERNAL void PicoExitMCD(void)
cc68a136 25{
cc68a136 26}
27
1cb1584b 28PICO_INTERNAL void PicoPowerMCD(void)
29{
24aab4da 30 int fmt_size;
31
8e4e84c2 32 SekCycleCntS68k = SekCycleAimS68k = 0;
33
24aab4da 34 fmt_size = sizeof(formatted_bram);
1cb1584b 35 memset(Pico_mcd->prg_ram, 0, sizeof(Pico_mcd->prg_ram));
36 memset(Pico_mcd->word_ram2M, 0, sizeof(Pico_mcd->word_ram2M));
37 memset(Pico_mcd->pcm_ram, 0, sizeof(Pico_mcd->pcm_ram));
38 memset(Pico_mcd->bram, 0, sizeof(Pico_mcd->bram));
4fb43555 39 memcpy(Pico_mcd->bram + sizeof(Pico_mcd->bram) - fmt_size,
40 formatted_bram, fmt_size);
51a902ae 41 memset(Pico_mcd->s68k_regs, 0, sizeof(Pico_mcd->s68k_regs));
4f265db7 42 memset(&Pico_mcd->pcm, 0, sizeof(Pico_mcd->pcm));
5c69a605 43 memset(&Pico_mcd->m, 0, sizeof(Pico_mcd->m));
51a902ae 44
3f23709e 45 cdc_init();
274fcc35 46 gfx_init();
d0132772 47
4fb43555 48 // cold reset state (tested)
49 Pico_mcd->m.state_flags = PCD_ST_S68K_RST;
50 Pico_mcd->m.busreq = 2; // busreq on, s68k in reset
51 Pico_mcd->s68k_regs[3] = 1; // 2M word RAM mode, m68k access
4fb43555 52 memset(Pico_mcd->bios + 0x70, 0xff, 4);
53}
cc68a136 54
d0132772 55void pcd_soft_reset(void)
4fb43555 56{
7b3ddc11 57 elprintf(EL_CD, "cd: soft reset");
d0132772 58
3f23709e 59 Pico_mcd->m.s68k_pend_ints = 0;
60 cdc_reset();
274fcc35 61 cdd_reset();
3aa1e148 62#ifdef _ASM_CD_MEMORY_C
00bd648e 63 //PicoMemResetCDdecode(1); // don't have to call this in 2M mode
4ff2d527 64#endif
cc68a136 65
7b3ddc11 66 memset(&Pico_mcd->s68k_regs[0x38], 0, 9);
67 Pico_mcd->s68k_regs[0x38+9] = 0x0f; // default checksum
68
d0132772 69 pcd_event_schedule_s68k(PCD_EVENT_CDC, 12500000/75);
70
71 // TODO: test if register state/timers change
72}
73
74PICO_INTERNAL int PicoResetMCD(void)
75{
76 // reset button doesn't affect MCD hardware
77
88fd63ad 78 // use Pico.sv.data for RAM cart
93f9619e 79 if (PicoIn.opt & POPT_EN_MCD_RAMCART) {
88fd63ad 80 if (Pico.sv.data == NULL)
81 Pico.sv.data = calloc(1, 0x12000);
d6114368 82 }
88fd63ad 83 else if (Pico.sv.data != NULL) {
84 free(Pico.sv.data);
85 Pico.sv.data = NULL;
d6114368 86 }
88fd63ad 87 Pico.sv.start = Pico.sv.end = 0; // unused
6cadc2da 88
cc68a136 89 return 0;
90}
91
6901d0e4 92static void SekRunM68kOnce(void)
93{
94 int cyc_do;
95 pevt_log_m68k_o(EVT_RUN_START);
96
88fd63ad 97 if ((cyc_do = Pico.t.m68c_aim - Pico.t.m68c_cnt) > 0) {
98 Pico.t.m68c_cnt += cyc_do;
6901d0e4 99
100#if defined(EMU_C68K)
101 PicoCpuCM68k.cycles = cyc_do;
102 CycloneRun(&PicoCpuCM68k);
88fd63ad 103 Pico.t.m68c_cnt -= PicoCpuCM68k.cycles;
6901d0e4 104#elif defined(EMU_M68K)
88fd63ad 105 Pico.t.m68c_cnt += m68k_execute(cyc_do) - cyc_do;
6901d0e4 106#elif defined(EMU_F68K)
12f23dac 107 Pico.t.m68c_cnt += fm68k_emulate(&PicoCpuFM68k, cyc_do, 0) - cyc_do;
6901d0e4 108#endif
109 }
110
111 SekCyclesLeft = 0;
112
113 SekTrace(0);
114 pevt_log_m68k_o(EVT_RUN_END);
115}
116
117static void SekRunS68k(unsigned int to)
cc68a136 118{
119 int cyc_do;
ae214f1c 120
121 SekCycleAimS68k = to;
122 if ((cyc_do = SekCycleAimS68k - SekCycleCntS68k) <= 0)
123 return;
124
30e8aac4 125 if (SekShouldInterrupt())
126 Pico_mcd->m.s68k_poll_a = 0;
127
ae214f1c 128 SekCycleCntS68k += cyc_do;
129#if defined(EMU_C68K)
130 PicoCpuCS68k.cycles = cyc_do;
3aa1e148 131 CycloneRun(&PicoCpuCS68k);
ae214f1c 132 SekCycleCntS68k -= PicoCpuCS68k.cycles;
b837b69b 133#elif defined(EMU_M68K)
3aa1e148 134 m68k_set_context(&PicoCpuMS68k);
ae214f1c 135 SekCycleCntS68k += m68k_execute(cyc_do) - cyc_do;
ed4402a7 136 m68k_set_context(&PicoCpuMM68k);
3aa1e148 137#elif defined(EMU_F68K)
12f23dac 138 SekCycleCntS68k += fm68k_emulate(&PicoCpuFS68k, cyc_do, 0) - cyc_do;
cc68a136 139#endif
140}
141
8e4e84c2 142static void pcd_set_cycle_mult(void)
143{
144 // ~1.63 for NTSC, ~1.645 for PAL
145 if (Pico.m.pal)
e42a47e2 146 mcd_m68k_cycle_mult = ((12500000ull << 16) / (50*313*488));
8e4e84c2 147 else
a6523294 148 mcd_m68k_cycle_mult = ((12500000ull << 16) / (60*262*488)) + 1;
8e4e84c2 149}
68cba51e 150
ae214f1c 151unsigned int pcd_cycles_m68k_to_s68k(unsigned int c)
8022f53d 152{
a6523294 153 return (long long)c * mcd_m68k_cycle_mult >> 16;
8022f53d 154}
ae214f1c 155
156/* events */
157static void pcd_cdc_event(unsigned int now)
68cba51e 158{
ae214f1c 159 // 75Hz CDC update
274fcc35 160 cdd_update();
161
162 /* check if a new CDD command has been processed */
163 if (!(Pico_mcd->s68k_regs[0x4b] & 0xf0))
164 {
165 /* reset CDD command wait flag */
166 Pico_mcd->s68k_regs[0x4b] = 0xf0;
167
168 if (Pico_mcd->s68k_regs[0x33] & PCDS_IEN4) {
169 elprintf(EL_INTS|EL_CD, "s68k: cdd irq 4");
170 SekInterruptS68k(4);
171 }
172 }
173
ae214f1c 174 pcd_event_schedule(now, PCD_EVENT_CDC, 12500000/75);
175}
7336a99a 176
ae214f1c 177static void pcd_int3_timer_event(unsigned int now)
178{
179 if (Pico_mcd->s68k_regs[0x33] & PCDS_IEN3) {
180 elprintf(EL_INTS|EL_CD, "s68k: timer irq 3");
181 SekInterruptS68k(3);
182 }
7336a99a 183
ae214f1c 184 if (Pico_mcd->s68k_regs[0x31] != 0)
185 pcd_event_schedule(now, PCD_EVENT_TIMER3,
186 Pico_mcd->s68k_regs[0x31] * 384);
187}
188
ae214f1c 189static void pcd_dma_event(unsigned int now)
190{
3f23709e 191 cdc_dma_update();
ae214f1c 192}
68cba51e 193
ae214f1c 194typedef void (event_cb)(unsigned int now);
195
196/* times are in s68k (12.5MHz) cycles */
197unsigned int pcd_event_times[PCD_EVENT_COUNT];
198static unsigned int event_time_next;
199static event_cb *pcd_event_cbs[PCD_EVENT_COUNT] = {
24aab4da 200 pcd_cdc_event, // PCD_EVENT_CDC
201 pcd_int3_timer_event, // PCD_EVENT_TIMER3
202 gfx_update, // PCD_EVENT_GFX
203 pcd_dma_event, // PCD_EVENT_DMA
ae214f1c 204};
205
206void pcd_event_schedule(unsigned int now, enum pcd_event event, int after)
bf098bc5 207{
ae214f1c 208 unsigned int when;
209
210 when = now + after;
211 if (when == 0) {
212 // event cancelled
213 pcd_event_times[event] = 0;
214 return;
215 }
bf098bc5 216
ae214f1c 217 when |= 1;
bf098bc5 218
ae214f1c 219 elprintf(EL_CD, "cd: new event #%u %u->%u", event, now, when);
220 pcd_event_times[event] = when;
bf098bc5 221
ae214f1c 222 if (event_time_next == 0 || CYCLES_GT(event_time_next, when))
223 event_time_next = when;
bf098bc5 224}
225
ae214f1c 226void pcd_event_schedule_s68k(enum pcd_event event, int after)
4f265db7 227{
ae214f1c 228 if (SekCyclesLeftS68k > after)
229 SekEndRunS68k(after);
4f265db7 230
ae214f1c 231 pcd_event_schedule(SekCyclesDoneS68k(), event, after);
232}
4f265db7 233
ae214f1c 234static void pcd_run_events(unsigned int until)
235{
236 int oldest, oldest_diff, time;
237 int i, diff;
238
239 while (1) {
240 oldest = -1, oldest_diff = 0x7fffffff;
241
242 for (i = 0; i < PCD_EVENT_COUNT; i++) {
243 if (pcd_event_times[i]) {
244 diff = pcd_event_times[i] - until;
245 if (diff < oldest_diff) {
246 oldest_diff = diff;
247 oldest = i;
248 }
249 }
250 }
251
252 if (oldest_diff <= 0) {
253 time = pcd_event_times[oldest];
254 pcd_event_times[oldest] = 0;
255 elprintf(EL_CD, "cd: run event #%d %u", oldest, time);
256 pcd_event_cbs[oldest](time);
257 }
258 else if (oldest_diff < 0x7fffffff) {
259 event_time_next = pcd_event_times[oldest];
260 break;
261 }
262 else {
263 event_time_next = 0;
264 break;
265 }
266 }
4f265db7 267
ae214f1c 268 if (oldest != -1)
269 elprintf(EL_CD, "cd: next event #%d at %u",
270 oldest, event_time_next);
4f265db7 271}
272
08769494 273int pcd_sync_s68k(unsigned int m68k_target, int m68k_poll_sync)
ae214f1c 274{
275 #define now SekCycleCntS68k
a6523294 276 unsigned int s68k_target;
ae214f1c 277 unsigned int target;
b837b69b 278
a6523294 279 target = m68k_target - mcd_m68k_cycle_base;
280 s68k_target = mcd_s68k_cycle_base +
281 ((unsigned long long)target * mcd_m68k_cycle_mult >> 16);
282
08769494 283 elprintf(EL_CD, "s68k sync to %u, %u->%u",
284 m68k_target, now, s68k_target);
ae214f1c 285
4fb43555 286 if (Pico_mcd->m.busreq != 1) { /* busreq/reset */
ae214f1c 287 SekCycleCntS68k = SekCycleAimS68k = s68k_target;
288 pcd_run_events(m68k_target);
08769494 289 return 0;
ae214f1c 290 }
291
292 while (CYCLES_GT(s68k_target, now)) {
293 if (event_time_next && CYCLES_GE(now, event_time_next))
294 pcd_run_events(now);
295
296 target = s68k_target;
297 if (event_time_next && CYCLES_GT(target, event_time_next))
298 target = event_time_next;
299
300 SekRunS68k(target);
08769494 301 if (m68k_poll_sync && Pico_mcd->m.m68k_poll_cnt == 0)
302 break;
ae214f1c 303 }
08769494 304
305 return s68k_target - now;
ae214f1c 306 #undef now
c987bb5c 307}
ae214f1c 308
ba6e8bfd 309#define pcd_run_cpus_normal pcd_run_cpus
310//#define pcd_run_cpus_lockstep pcd_run_cpus
311
08769494 312static void SekSyncM68k(void);
313
fa8fb754 314void pcd_run_cpus_normal(int m68k_cycles)
08769494 315{
88fd63ad 316 Pico.t.m68c_aim += m68k_cycles;
30e8aac4 317 if (SekShouldInterrupt() || Pico_mcd->m.m68k_poll_cnt < 12)
cc5ffc3c 318 Pico_mcd->m.m68k_poll_cnt = 0;
319 else if (Pico_mcd->m.m68k_poll_cnt >= 16) {
88fd63ad 320 int s68k_left = pcd_sync_s68k(Pico.t.m68c_aim, 1);
08769494 321 if (s68k_left <= 0) {
ba6e8bfd 322 elprintf(EL_CDPOLL, "m68k poll [%02x] x%d @%06x",
08769494 323 Pico_mcd->m.m68k_poll_a, Pico_mcd->m.m68k_poll_cnt, SekPc);
88fd63ad 324 Pico.t.m68c_cnt = Pico.t.m68c_aim;
08769494 325 return;
326 }
88fd63ad 327 Pico.t.m68c_cnt = Pico.t.m68c_aim - (s68k_left * 40220 >> 16);
08769494 328 }
329
88fd63ad 330 while (CYCLES_GT(Pico.t.m68c_aim, Pico.t.m68c_cnt)) {
6901d0e4 331 SekRunM68kOnce();
332 if (Pico_mcd->m.need_sync) {
333 Pico_mcd->m.need_sync = 0;
88fd63ad 334 pcd_sync_s68k(Pico.t.m68c_cnt, 0);
6901d0e4 335 }
336 }
08769494 337}
338
fa8fb754 339void pcd_run_cpus_lockstep(int m68k_cycles)
ba6e8bfd 340{
88fd63ad 341 unsigned int target = Pico.t.m68c_aim + m68k_cycles;
ba6e8bfd 342 do {
88fd63ad 343 Pico.t.m68c_aim += 8;
ba6e8bfd 344 SekSyncM68k();
88fd63ad 345 pcd_sync_s68k(Pico.t.m68c_aim, 0);
346 } while (CYCLES_GT(target, Pico.t.m68c_aim));
cc5ffc3c 347
88fd63ad 348 Pico.t.m68c_aim = target;
ba6e8bfd 349}
350
ae214f1c 351#define PICO_CD
352#define CPUS_RUN(m68k_cycles) \
08769494 353 pcd_run_cpus(m68k_cycles)
ae214f1c 354
efcba75f 355#include "../pico_cmn.c"
cc68a136 356
357
a6523294 358void pcd_prepare_frame(void)
359{
360 pcd_set_cycle_mult();
361
362 // need this because we can't have direct mapping between
363 // master<->slave cycle counters because of overflows
88fd63ad 364 mcd_m68k_cycle_base = Pico.t.m68c_aim;
a6523294 365 mcd_s68k_cycle_base = SekCycleAimS68k;
366}
367
2aa27095 368PICO_INTERNAL void PicoFrameMCD(void)
cc68a136 369{
a6523294 370 PicoFrameStart();
cc68a136 371
a6523294 372 pcd_prepare_frame();
bf5fbbb4 373 PicoFrameHints();
cc68a136 374}
375
ae214f1c 376void pcd_state_loaded(void)
377{
378 unsigned int cycles;
379 int diff;
380
8e4e84c2 381 pcd_set_cycle_mult();
ae214f1c 382 pcd_state_loaded_mem();
383
33be04ca 384 memset(Pico_mcd->pcm_mixbuf, 0, sizeof(Pico_mcd->pcm_mixbuf));
385 Pico_mcd->pcm_mixbuf_dirty = 0;
386 Pico_mcd->pcm_mixpos = 0;
021e47b3 387 Pico_mcd->pcm_regs_dirty = 1;
33be04ca 388
ae214f1c 389 // old savestates..
88fd63ad 390 cycles = pcd_cycles_m68k_to_s68k(Pico.t.m68c_aim);
ae214f1c 391 diff = cycles - SekCycleAimS68k;
392 if (diff < -1000 || diff > 1000) {
393 SekCycleCntS68k = SekCycleAimS68k = cycles;
394 }
395 if (pcd_event_times[PCD_EVENT_CDC] == 0) {
396 pcd_event_schedule(SekCycleAimS68k, PCD_EVENT_CDC, 12500000/75);
397
398 if (Pico_mcd->s68k_regs[0x31])
399 pcd_event_schedule(SekCycleAimS68k, PCD_EVENT_TIMER3,
400 Pico_mcd->s68k_regs[0x31] * 384);
ae214f1c 401 }
334d9fb6 402
403 diff = cycles - Pico_mcd->pcm.update_cycles;
404 if ((unsigned int)diff > 12500000/50)
33be04ca 405 Pico_mcd->pcm.update_cycles = cycles;
8e4e84c2 406
407 // reschedule
408 event_time_next = 0;
409 pcd_run_events(SekCycleCntS68k);
ae214f1c 410}
cc68a136 411
ae214f1c 412// vim:shiftwidth=2:ts=2:expandtab