cff531af |
1 | /* |
2 | * PicoDrive |
ae214f1c |
3 | * (C) notaz, 2007,2013 |
7bf552b5 |
4 | * (C) irixxxx, 2019-2024 |
cff531af |
5 | * |
6 | * This work is licensed under the terms of MAME license. |
7 | * See COPYING file in the top-level directory. |
8 | */ |
cc68a136 |
9 | |
efcba75f |
10 | #include "../pico_int.h" |
43e6eaad |
11 | #include "../sound/ym2612.h" |
de5da52e |
12 | #include "megasd.h" |
cc68a136 |
13 | |
76276b0b |
14 | extern unsigned char formatted_bram[4*0x10]; |
ae214f1c |
15 | |
a6523294 |
16 | static unsigned int mcd_m68k_cycle_mult; |
9f01ce95 |
17 | static unsigned int mcd_s68k_cycle_mult; |
a6523294 |
18 | static unsigned int mcd_m68k_cycle_base; |
19 | static unsigned int mcd_s68k_cycle_base; |
89fa852d |
20 | |
02ff0254 |
21 | mcd_state *Pico_mcd; |
cc68a136 |
22 | |
549dd407 |
23 | PICO_INTERNAL void PicoCreateMCD(unsigned char *bios_data, int bios_size) |
24 | { |
25 | if (!Pico_mcd) { |
26 | Pico_mcd = plat_mmap(0x05000000, sizeof(mcd_state), 0, 0); |
f4ab2647 |
27 | if (Pico_mcd == NULL) { |
28 | elprintf(EL_STATUS, "OOM"); |
29 | return; |
30 | } |
549dd407 |
31 | } |
f4ab2647 |
32 | memset(Pico_mcd, 0, sizeof(mcd_state)); |
33 | |
549dd407 |
34 | if (bios_data && bios_size > 0) { |
35 | if (bios_size > sizeof(Pico_mcd->bios)) |
36 | bios_size = sizeof(Pico_mcd->bios); |
37 | memcpy(Pico_mcd->bios, bios_data, bios_size); |
38 | } |
39 | } |
40 | |
2aa27095 |
41 | PICO_INTERNAL void PicoInitMCD(void) |
cc68a136 |
42 | { |
43 | SekInitS68k(); |
cc68a136 |
44 | } |
45 | |
eff55556 |
46 | PICO_INTERNAL void PicoExitMCD(void) |
cc68a136 |
47 | { |
ef3241d2 |
48 | cdd_unload(); |
02ff0254 |
49 | if (Pico_mcd) { |
50 | plat_munmap(Pico_mcd, sizeof(mcd_state)); |
51 | Pico_mcd = NULL; |
52 | } |
cc68a136 |
53 | } |
54 | |
1cb1584b |
55 | PICO_INTERNAL void PicoPowerMCD(void) |
56 | { |
24aab4da |
57 | int fmt_size; |
58 | |
f16f0d64 |
59 | SekResetS68k(); |
8e4e84c2 |
60 | SekCycleCntS68k = SekCycleAimS68k = 0; |
61 | |
24aab4da |
62 | fmt_size = sizeof(formatted_bram); |
1cb1584b |
63 | memset(Pico_mcd->prg_ram, 0, sizeof(Pico_mcd->prg_ram)); |
64 | memset(Pico_mcd->word_ram2M, 0, sizeof(Pico_mcd->word_ram2M)); |
65 | memset(Pico_mcd->pcm_ram, 0, sizeof(Pico_mcd->pcm_ram)); |
66 | memset(Pico_mcd->bram, 0, sizeof(Pico_mcd->bram)); |
4fb43555 |
67 | memcpy(Pico_mcd->bram + sizeof(Pico_mcd->bram) - fmt_size, |
68 | formatted_bram, fmt_size); |
51a902ae |
69 | memset(Pico_mcd->s68k_regs, 0, sizeof(Pico_mcd->s68k_regs)); |
4f265db7 |
70 | memset(&Pico_mcd->pcm, 0, sizeof(Pico_mcd->pcm)); |
5c69a605 |
71 | memset(&Pico_mcd->m, 0, sizeof(Pico_mcd->m)); |
51a902ae |
72 | |
3f23709e |
73 | cdc_init(); |
274fcc35 |
74 | gfx_init(); |
d0132772 |
75 | |
4fb43555 |
76 | // cold reset state (tested) |
77 | Pico_mcd->m.state_flags = PCD_ST_S68K_RST; |
78 | Pico_mcd->m.busreq = 2; // busreq on, s68k in reset |
79 | Pico_mcd->s68k_regs[3] = 1; // 2M word RAM mode, m68k access |
549dd407 |
80 | if (Pico.romsize == 0) // no HINT vector from gate array for MSU |
81 | memset(Pico_mcd->bios + 0x70, 0xff, 4); |
33600005 |
82 | pcd_event_schedule_s68k(PCD_EVENT_CDC, 12500000/75); |
a85010ba |
83 | |
84 | cdc_reset(); |
85 | cdd_reset(); |
4fb43555 |
86 | } |
cc68a136 |
87 | |
d0132772 |
88 | void pcd_soft_reset(void) |
4fb43555 |
89 | { |
7b3ddc11 |
90 | elprintf(EL_CD, "cd: soft reset"); |
d0132772 |
91 | |
3f23709e |
92 | Pico_mcd->m.s68k_pend_ints = 0; |
93 | cdc_reset(); |
274fcc35 |
94 | cdd_reset(); |
3aa1e148 |
95 | #ifdef _ASM_CD_MEMORY_C |
00bd648e |
96 | //PicoMemResetCDdecode(1); // don't have to call this in 2M mode |
4ff2d527 |
97 | #endif |
cc68a136 |
98 | |
7b3ddc11 |
99 | memset(&Pico_mcd->s68k_regs[0x38], 0, 9); |
100 | Pico_mcd->s68k_regs[0x38+9] = 0x0f; // default checksum |
101 | |
d0132772 |
102 | pcd_event_schedule_s68k(PCD_EVENT_CDC, 12500000/75); |
103 | |
104 | // TODO: test if register state/timers change |
105 | } |
106 | |
107 | PICO_INTERNAL int PicoResetMCD(void) |
108 | { |
109 | // reset button doesn't affect MCD hardware |
110 | |
88fd63ad |
111 | // use Pico.sv.data for RAM cart |
b9312048 |
112 | if (Pico.romsize == 0) { |
113 | if (PicoIn.opt & POPT_EN_MCD_RAMCART) { |
114 | if (Pico.sv.data == NULL) |
115 | Pico.sv.data = calloc(1, 0x12000); |
116 | } |
117 | else if (Pico.sv.data != NULL) { |
118 | free(Pico.sv.data); |
119 | Pico.sv.data = NULL; |
120 | } |
121 | Pico.sv.start = Pico.sv.end = 0; // unused |
d6114368 |
122 | } |
6cadc2da |
123 | |
cc68a136 |
124 | return 0; |
125 | } |
126 | |
6901d0e4 |
127 | static void SekRunS68k(unsigned int to) |
cc68a136 |
128 | { |
129 | int cyc_do; |
ae214f1c |
130 | |
131 | SekCycleAimS68k = to; |
132 | if ((cyc_do = SekCycleAimS68k - SekCycleCntS68k) <= 0) |
133 | return; |
134 | |
2fa02d5a |
135 | pprof_start(s68k); |
ae214f1c |
136 | SekCycleCntS68k += cyc_do; |
137 | #if defined(EMU_C68K) |
138 | PicoCpuCS68k.cycles = cyc_do; |
3aa1e148 |
139 | CycloneRun(&PicoCpuCS68k); |
ae214f1c |
140 | SekCycleCntS68k -= PicoCpuCS68k.cycles; |
b837b69b |
141 | #elif defined(EMU_M68K) |
3aa1e148 |
142 | m68k_set_context(&PicoCpuMS68k); |
ae214f1c |
143 | SekCycleCntS68k += m68k_execute(cyc_do) - cyc_do; |
ed4402a7 |
144 | m68k_set_context(&PicoCpuMM68k); |
3aa1e148 |
145 | #elif defined(EMU_F68K) |
12f23dac |
146 | SekCycleCntS68k += fm68k_emulate(&PicoCpuFS68k, cyc_do, 0) - cyc_do; |
cc68a136 |
147 | #endif |
9f01ce95 |
148 | SekCyclesLeftS68k = 0; |
2fa02d5a |
149 | pprof_end(s68k); |
cc68a136 |
150 | } |
151 | |
7263343d |
152 | void PicoMCDPrepare(void) |
8e4e84c2 |
153 | { |
588881c4 |
154 | // 12500000/(osc/7), ~1.63 for NTSC, ~1.645 for PAL |
7263343d |
155 | #define DIV_ROUND(x,y) ((x)+(y)/2) / (y) // round to nearest, x/y+0.5 -> (x+y/2)/y |
156 | unsigned int osc = (Pico.m.pal ? OSC_PAL : OSC_NTSC); |
588881c4 |
157 | mcd_m68k_cycle_mult = DIV_ROUND(7 * 12500000ull << 16, osc); |
7263343d |
158 | mcd_s68k_cycle_mult = DIV_ROUND(1ull * osc << 16, 7 * 12500000); |
8e4e84c2 |
159 | } |
68cba51e |
160 | |
ae214f1c |
161 | unsigned int pcd_cycles_m68k_to_s68k(unsigned int c) |
8022f53d |
162 | { |
a6523294 |
163 | return (long long)c * mcd_m68k_cycle_mult >> 16; |
8022f53d |
164 | } |
ae214f1c |
165 | |
166 | /* events */ |
167 | static void pcd_cdc_event(unsigned int now) |
68cba51e |
168 | { |
588881c4 |
169 | int audio = Pico_mcd->s68k_regs[0x36] & 0x1; |
170 | |
ae214f1c |
171 | // 75Hz CDC update |
274fcc35 |
172 | cdd_update(); |
173 | |
588881c4 |
174 | // main 68k cycles since frame start |
175 | int cycles = 1LL*(now-mcd_s68k_cycle_base) * mcd_s68k_cycle_mult >> 16; |
176 | // samples@rate since frame start |
177 | int samples = 1LL * cycles_68k_to_z80(cycles) * Pico.snd.clkz_mult >> 20; |
178 | // samples@44100Hz since frame start |
179 | samples = samples * Pico.snd.cdda_mult >> 16; |
180 | if (samples < 2352/4) // save offset to 1st used sample for state saving |
181 | Pico_mcd->m.cdda_lba_offset = 2352/4 - samples; |
182 | |
183 | /* if audio just turned on, store start offset for sound */ |
184 | audio &= !(Pico_mcd->s68k_regs[0x36] & 0x1); |
185 | if (audio) { |
186 | Pico_mcd->m.cdda_lba_offset = 0; // starting with full lba |
187 | Pico_mcd->cdda_frame_offs = samples; |
188 | } |
189 | |
274fcc35 |
190 | /* check if a new CDD command has been processed */ |
191 | if (!(Pico_mcd->s68k_regs[0x4b] & 0xf0)) |
192 | { |
193 | /* reset CDD command wait flag */ |
194 | Pico_mcd->s68k_regs[0x4b] = 0xf0; |
dd7c8c05 |
195 | } |
274fcc35 |
196 | |
dd7c8c05 |
197 | if ((Pico_mcd->s68k_regs[0x33] & PCDS_IEN4) && (Pico_mcd->s68k_regs[0x37] & 4)) { |
198 | elprintf(EL_INTS|EL_CD, "s68k: cdd irq 4"); |
199 | pcd_irq_s68k(4, 1); |
274fcc35 |
200 | } |
201 | |
33600005 |
202 | msd_update(); |
203 | |
ae214f1c |
204 | pcd_event_schedule(now, PCD_EVENT_CDC, 12500000/75); |
205 | } |
7336a99a |
206 | |
ae214f1c |
207 | static void pcd_int3_timer_event(unsigned int now) |
208 | { |
209 | if (Pico_mcd->s68k_regs[0x33] & PCDS_IEN3) { |
210 | elprintf(EL_INTS|EL_CD, "s68k: timer irq 3"); |
eb36d9c7 |
211 | pcd_irq_s68k(3, 1); |
ae214f1c |
212 | } |
7336a99a |
213 | |
ae214f1c |
214 | if (Pico_mcd->s68k_regs[0x31] != 0) |
215 | pcd_event_schedule(now, PCD_EVENT_TIMER3, |
178a9b68 |
216 | (Pico_mcd->s68k_regs[0x31]+1) * 384); |
ae214f1c |
217 | } |
218 | |
ae214f1c |
219 | static void pcd_dma_event(unsigned int now) |
220 | { |
3f23709e |
221 | cdc_dma_update(); |
ae214f1c |
222 | } |
68cba51e |
223 | |
ae214f1c |
224 | typedef void (event_cb)(unsigned int now); |
225 | |
226 | /* times are in s68k (12.5MHz) cycles */ |
227 | unsigned int pcd_event_times[PCD_EVENT_COUNT]; |
228 | static unsigned int event_time_next; |
229 | static event_cb *pcd_event_cbs[PCD_EVENT_COUNT] = { |
24aab4da |
230 | pcd_cdc_event, // PCD_EVENT_CDC |
231 | pcd_int3_timer_event, // PCD_EVENT_TIMER3 |
232 | gfx_update, // PCD_EVENT_GFX |
233 | pcd_dma_event, // PCD_EVENT_DMA |
ae214f1c |
234 | }; |
235 | |
236 | void pcd_event_schedule(unsigned int now, enum pcd_event event, int after) |
bf098bc5 |
237 | { |
ae214f1c |
238 | unsigned int when; |
239 | |
178a9b68 |
240 | if ((now|after) == 0) { |
ae214f1c |
241 | // event cancelled |
242 | pcd_event_times[event] = 0; |
243 | return; |
244 | } |
bf098bc5 |
245 | |
178a9b68 |
246 | when = now + after; |
ae214f1c |
247 | when |= 1; |
bf098bc5 |
248 | |
ae214f1c |
249 | elprintf(EL_CD, "cd: new event #%u %u->%u", event, now, when); |
250 | pcd_event_times[event] = when; |
bf098bc5 |
251 | |
ae214f1c |
252 | if (event_time_next == 0 || CYCLES_GT(event_time_next, when)) |
253 | event_time_next = when; |
bf098bc5 |
254 | } |
255 | |
ae214f1c |
256 | void pcd_event_schedule_s68k(enum pcd_event event, int after) |
4f265db7 |
257 | { |
691abdfa |
258 | SekEndRunS68k(after); |
4f265db7 |
259 | |
ae214f1c |
260 | pcd_event_schedule(SekCyclesDoneS68k(), event, after); |
261 | } |
4f265db7 |
262 | |
ae214f1c |
263 | static void pcd_run_events(unsigned int until) |
264 | { |
265 | int oldest, oldest_diff, time; |
266 | int i, diff; |
267 | |
268 | while (1) { |
269 | oldest = -1, oldest_diff = 0x7fffffff; |
270 | |
271 | for (i = 0; i < PCD_EVENT_COUNT; i++) { |
272 | if (pcd_event_times[i]) { |
273 | diff = pcd_event_times[i] - until; |
274 | if (diff < oldest_diff) { |
275 | oldest_diff = diff; |
276 | oldest = i; |
277 | } |
278 | } |
279 | } |
280 | |
281 | if (oldest_diff <= 0) { |
282 | time = pcd_event_times[oldest]; |
283 | pcd_event_times[oldest] = 0; |
284 | elprintf(EL_CD, "cd: run event #%d %u", oldest, time); |
285 | pcd_event_cbs[oldest](time); |
286 | } |
287 | else if (oldest_diff < 0x7fffffff) { |
288 | event_time_next = pcd_event_times[oldest]; |
289 | break; |
290 | } |
291 | else { |
292 | event_time_next = 0; |
293 | break; |
294 | } |
295 | } |
4f265db7 |
296 | |
ae214f1c |
297 | if (oldest != -1) |
298 | elprintf(EL_CD, "cd: next event #%d at %u", |
299 | oldest, event_time_next); |
4f265db7 |
300 | } |
301 | |
eb36d9c7 |
302 | void pcd_irq_s68k(int irq, int state) |
303 | { |
304 | if (state) { |
305 | SekInterruptS68k(irq); |
c36dbc1d |
306 | Pico_mcd->m.state_flags &= ~PCD_ST_S68K_POLL; |
02db2308 |
307 | Pico_mcd->m.s68k_poll_cnt = 0; |
eb36d9c7 |
308 | } else |
309 | SekInterruptClearS68k(irq); |
310 | } |
311 | |
08769494 |
312 | int pcd_sync_s68k(unsigned int m68k_target, int m68k_poll_sync) |
ae214f1c |
313 | { |
314 | #define now SekCycleCntS68k |
a6523294 |
315 | unsigned int s68k_target; |
ae214f1c |
316 | unsigned int target; |
b837b69b |
317 | |
a6523294 |
318 | target = m68k_target - mcd_m68k_cycle_base; |
319 | s68k_target = mcd_s68k_cycle_base + |
320 | ((unsigned long long)target * mcd_m68k_cycle_mult >> 16); |
321 | |
08769494 |
322 | elprintf(EL_CD, "s68k sync to %u, %u->%u", |
323 | m68k_target, now, s68k_target); |
ae214f1c |
324 | |
4fb43555 |
325 | if (Pico_mcd->m.busreq != 1) { /* busreq/reset */ |
ae214f1c |
326 | SekCycleCntS68k = SekCycleAimS68k = s68k_target; |
9f01ce95 |
327 | pcd_run_events(s68k_target); |
08769494 |
328 | return 0; |
ae214f1c |
329 | } |
330 | |
331 | while (CYCLES_GT(s68k_target, now)) { |
332 | if (event_time_next && CYCLES_GE(now, event_time_next)) |
333 | pcd_run_events(now); |
334 | |
335 | target = s68k_target; |
336 | if (event_time_next && CYCLES_GT(target, event_time_next)) |
337 | target = event_time_next; |
338 | |
8eeb3426 |
339 | if (Pico_mcd->m.state_flags & (PCD_ST_S68K_POLL|PCD_ST_S68K_SLEEP)) |
9b61ba71 |
340 | SekCycleCntS68k = SekCycleAimS68k = target; |
341 | else |
342 | SekRunS68k(target); |
343 | |
08769494 |
344 | if (m68k_poll_sync && Pico_mcd->m.m68k_poll_cnt == 0) |
345 | break; |
ae214f1c |
346 | } |
08769494 |
347 | |
348 | return s68k_target - now; |
ae214f1c |
349 | #undef now |
c987bb5c |
350 | } |
ae214f1c |
351 | |
ba6e8bfd |
352 | #define pcd_run_cpus_normal pcd_run_cpus |
353 | //#define pcd_run_cpus_lockstep pcd_run_cpus |
354 | |
7263343d |
355 | static void SekAimM68k(int cyc, int mult); |
8eeb3426 |
356 | static int SekSyncM68k(int once); |
08769494 |
357 | |
fa8fb754 |
358 | void pcd_run_cpus_normal(int m68k_cycles) |
08769494 |
359 | { |
dd7c8c05 |
360 | SekAimM68k(m68k_cycles, 0x108); |
9b61ba71 |
361 | |
362 | while (CYCLES_GT(Pico.t.m68c_aim, Pico.t.m68c_cnt)) { |
8eeb3426 |
363 | if (SekShouldInterrupt()) { |
364 | Pico_mcd->m.state_flags &= ~PCD_ST_M68K_POLL; |
9b61ba71 |
365 | Pico_mcd->m.m68k_poll_cnt = 0; |
8eeb3426 |
366 | } |
9b61ba71 |
367 | |
368 | #ifdef USE_POLL_DETECT |
c36dbc1d |
369 | if (Pico_mcd->m.state_flags & PCD_ST_M68K_POLL) { |
fbebab69 |
370 | int s68k_left; |
9b61ba71 |
371 | // main CPU is polling, (wake and) run sub only |
4a55f64a |
372 | if (Pico_mcd->m.state_flags & (PCD_ST_S68K_POLL|PCD_ST_S68K_SLEEP)) { |
373 | Pico_mcd->m.state_flags &= ~(PCD_ST_S68K_POLL|PCD_ST_S68K_SLEEP); |
374 | Pico_mcd->m.s68k_poll_cnt = 0; |
375 | } |
fbebab69 |
376 | s68k_left = pcd_sync_s68k(Pico.t.m68c_aim, 1); |
9b61ba71 |
377 | |
378 | Pico.t.m68c_cnt = Pico.t.m68c_aim; |
fbebab69 |
379 | if (s68k_left > 0) |
380 | Pico.t.m68c_cnt -= ((long long)s68k_left * mcd_s68k_cycle_mult >> 16); |
8eeb3426 |
381 | if (Pico_mcd->m.state_flags & (PCD_ST_S68K_POLL|PCD_ST_S68K_SLEEP)) { |
9b61ba71 |
382 | // slave has stopped, wake master to avoid lockups |
c36dbc1d |
383 | Pico_mcd->m.state_flags &= ~PCD_ST_M68K_POLL; |
9b61ba71 |
384 | Pico_mcd->m.m68k_poll_cnt = 0; |
385 | } |
8eeb3426 |
386 | |
ba6e8bfd |
387 | elprintf(EL_CDPOLL, "m68k poll [%02x] x%d @%06x", |
08769494 |
388 | Pico_mcd->m.m68k_poll_a, Pico_mcd->m.m68k_poll_cnt, SekPc); |
fbebab69 |
389 | } else |
9b61ba71 |
390 | #endif |
b02b3923 |
391 | { |
8eeb3426 |
392 | SekSyncM68k(1); |
b02b3923 |
393 | // make sure sub doesn't get too far out of sync with main |
394 | if (!(Pico_mcd->m.state_flags & (PCD_ST_S68K_POLL|PCD_ST_S68K_SLEEP)) && |
395 | pcd_cycles_m68k_to_s68k(Pico.t.m68c_aim - mcd_m68k_cycle_base) > |
396 | 5000 + SekCycleAimS68k - mcd_s68k_cycle_base) |
397 | pcd_sync_s68k(Pico.t.m68c_cnt, 0); |
398 | } |
8eeb3426 |
399 | if (Pico_mcd->m.state_flags & PCD_ST_S68K_SYNC) { |
400 | Pico_mcd->m.state_flags &= ~PCD_ST_S68K_SYNC; |
88fd63ad |
401 | pcd_sync_s68k(Pico.t.m68c_cnt, 0); |
6901d0e4 |
402 | } |
403 | } |
08769494 |
404 | } |
405 | |
fa8fb754 |
406 | void pcd_run_cpus_lockstep(int m68k_cycles) |
ba6e8bfd |
407 | { |
88fd63ad |
408 | unsigned int target = Pico.t.m68c_aim + m68k_cycles; |
cc5ffc3c |
409 | |
b02b3923 |
410 | while (CYCLES_GT(target, Pico.t.m68c_aim)) { |
411 | int cycles = target - Pico.t.m68c_aim; |
412 | if (cycles > 8) cycles = 8; |
413 | SekAimM68k(cycles, 0x108); |
414 | SekSyncM68k(1); |
415 | pcd_sync_s68k(Pico.t.m68c_cnt, 0); |
416 | } |
ba6e8bfd |
417 | } |
418 | |
ae214f1c |
419 | #define PICO_CD |
420 | #define CPUS_RUN(m68k_cycles) \ |
08769494 |
421 | pcd_run_cpus(m68k_cycles) |
ae214f1c |
422 | |
efcba75f |
423 | #include "../pico_cmn.c" |
cc68a136 |
424 | |
425 | |
a6523294 |
426 | void pcd_prepare_frame(void) |
427 | { |
a6523294 |
428 | // need this because we can't have direct mapping between |
429 | // master<->slave cycle counters because of overflows |
88fd63ad |
430 | mcd_m68k_cycle_base = Pico.t.m68c_aim; |
a6523294 |
431 | mcd_s68k_cycle_base = SekCycleAimS68k; |
432 | } |
433 | |
2aa27095 |
434 | PICO_INTERNAL void PicoFrameMCD(void) |
cc68a136 |
435 | { |
a6523294 |
436 | PicoFrameStart(); |
cc68a136 |
437 | |
a6523294 |
438 | pcd_prepare_frame(); |
bf5fbbb4 |
439 | PicoFrameHints(); |
cc68a136 |
440 | } |
441 | |
ae214f1c |
442 | void pcd_state_loaded(void) |
443 | { |
444 | unsigned int cycles; |
ae214f1c |
445 | |
446 | pcd_state_loaded_mem(); |
447 | |
33be04ca |
448 | memset(Pico_mcd->pcm_mixbuf, 0, sizeof(Pico_mcd->pcm_mixbuf)); |
449 | Pico_mcd->pcm_mixbuf_dirty = 0; |
450 | Pico_mcd->pcm_mixpos = 0; |
021e47b3 |
451 | Pico_mcd->pcm_regs_dirty = 1; |
33be04ca |
452 | |
ae214f1c |
453 | // old savestates.. |
88fd63ad |
454 | cycles = pcd_cycles_m68k_to_s68k(Pico.t.m68c_aim); |
e6bb77d1 |
455 | if (CYCLES_GE(cycles - SekCycleAimS68k, 12500000/60)) { |
ae214f1c |
456 | SekCycleCntS68k = SekCycleAimS68k = cycles; |
457 | } |
458 | if (pcd_event_times[PCD_EVENT_CDC] == 0) { |
459 | pcd_event_schedule(SekCycleAimS68k, PCD_EVENT_CDC, 12500000/75); |
460 | |
461 | if (Pico_mcd->s68k_regs[0x31]) |
462 | pcd_event_schedule(SekCycleAimS68k, PCD_EVENT_TIMER3, |
b02b3923 |
463 | (Pico_mcd->s68k_regs[0x31]+1) * 384); |
ae214f1c |
464 | } |
334d9fb6 |
465 | |
e6bb77d1 |
466 | if (CYCLES_GE(cycles - Pico_mcd->pcm.update_cycles, 12500000/50)) |
33be04ca |
467 | Pico_mcd->pcm.update_cycles = cycles; |
8e4e84c2 |
468 | |
8eeb3426 |
469 | if (Pico_mcd->m.need_sync) { |
470 | Pico_mcd->m.state_flags |= PCD_ST_S68K_SYNC; |
471 | Pico_mcd->m.need_sync = 0; |
472 | } |
473 | |
8e4e84c2 |
474 | // reschedule |
475 | event_time_next = 0; |
476 | pcd_run_events(SekCycleCntS68k); |
a85010ba |
477 | |
478 | // msd |
479 | msd_load(); |
ae214f1c |
480 | } |
cc68a136 |
481 | |
ae214f1c |
482 | // vim:shiftwidth=2:ts=2:expandtab |