let it build on msvc
[picodrive.git] / pico / cd / mcd.c
CommitLineData
cff531af 1/*
2 * PicoDrive
ae214f1c 3 * (C) notaz, 2007,2013
cff531af 4 *
5 * This work is licensed under the terms of MAME license.
6 * See COPYING file in the top-level directory.
7 */
cc68a136 8
efcba75f 9#include "../pico_int.h"
43e6eaad 10#include "../sound/ym2612.h"
cc68a136 11
76276b0b 12extern unsigned char formatted_bram[4*0x10];
ae214f1c 13
a6523294 14static unsigned int mcd_m68k_cycle_mult;
15static unsigned int mcd_m68k_cycle_base;
16static unsigned int mcd_s68k_cycle_base;
89fa852d 17
721cd396 18void (*PicoMCDopenTray)(void) = NULL;
d687ef50 19void (*PicoMCDcloseTray)(void) = NULL;
89fa852d 20
cc68a136 21
2aa27095 22PICO_INTERNAL void PicoInitMCD(void)
cc68a136 23{
24 SekInitS68k();
cc68a136 25}
26
eff55556 27PICO_INTERNAL void PicoExitMCD(void)
cc68a136 28{
cc68a136 29}
30
1cb1584b 31PICO_INTERNAL void PicoPowerMCD(void)
32{
24aab4da 33 int fmt_size;
34
8e4e84c2 35 SekCycleCntS68k = SekCycleAimS68k = 0;
36
24aab4da 37 fmt_size = sizeof(formatted_bram);
1cb1584b 38 memset(Pico_mcd->prg_ram, 0, sizeof(Pico_mcd->prg_ram));
39 memset(Pico_mcd->word_ram2M, 0, sizeof(Pico_mcd->word_ram2M));
40 memset(Pico_mcd->pcm_ram, 0, sizeof(Pico_mcd->pcm_ram));
41 memset(Pico_mcd->bram, 0, sizeof(Pico_mcd->bram));
4fb43555 42 memcpy(Pico_mcd->bram + sizeof(Pico_mcd->bram) - fmt_size,
43 formatted_bram, fmt_size);
51a902ae 44 memset(Pico_mcd->s68k_regs, 0, sizeof(Pico_mcd->s68k_regs));
4f265db7 45 memset(&Pico_mcd->pcm, 0, sizeof(Pico_mcd->pcm));
5c69a605 46 memset(&Pico_mcd->m, 0, sizeof(Pico_mcd->m));
51a902ae 47
3f23709e 48 cdc_init();
274fcc35 49 gfx_init();
d0132772 50
4fb43555 51 // cold reset state (tested)
52 Pico_mcd->m.state_flags = PCD_ST_S68K_RST;
53 Pico_mcd->m.busreq = 2; // busreq on, s68k in reset
54 Pico_mcd->s68k_regs[3] = 1; // 2M word RAM mode, m68k access
4fb43555 55 memset(Pico_mcd->bios + 0x70, 0xff, 4);
56}
cc68a136 57
d0132772 58void pcd_soft_reset(void)
4fb43555 59{
7b3ddc11 60 elprintf(EL_CD, "cd: soft reset");
d0132772 61
3f23709e 62 Pico_mcd->m.s68k_pend_ints = 0;
63 cdc_reset();
274fcc35 64 cdd_reset();
3aa1e148 65#ifdef _ASM_CD_MEMORY_C
00bd648e 66 //PicoMemResetCDdecode(1); // don't have to call this in 2M mode
4ff2d527 67#endif
cc68a136 68
7b3ddc11 69 memset(&Pico_mcd->s68k_regs[0x38], 0, 9);
70 Pico_mcd->s68k_regs[0x38+9] = 0x0f; // default checksum
71
d0132772 72 pcd_event_schedule_s68k(PCD_EVENT_CDC, 12500000/75);
73
74 // TODO: test if register state/timers change
75}
76
77PICO_INTERNAL int PicoResetMCD(void)
78{
79 // reset button doesn't affect MCD hardware
80
88fd63ad 81 // use Pico.sv.data for RAM cart
af37bca8 82 if (PicoOpt & POPT_EN_MCD_RAMCART) {
88fd63ad 83 if (Pico.sv.data == NULL)
84 Pico.sv.data = calloc(1, 0x12000);
d6114368 85 }
88fd63ad 86 else if (Pico.sv.data != NULL) {
87 free(Pico.sv.data);
88 Pico.sv.data = NULL;
d6114368 89 }
88fd63ad 90 Pico.sv.start = Pico.sv.end = 0; // unused
6cadc2da 91
cc68a136 92 return 0;
93}
94
6901d0e4 95static void SekRunM68kOnce(void)
96{
97 int cyc_do;
98 pevt_log_m68k_o(EVT_RUN_START);
99
88fd63ad 100 if ((cyc_do = Pico.t.m68c_aim - Pico.t.m68c_cnt) > 0) {
101 Pico.t.m68c_cnt += cyc_do;
6901d0e4 102
103#if defined(EMU_C68K)
104 PicoCpuCM68k.cycles = cyc_do;
105 CycloneRun(&PicoCpuCM68k);
88fd63ad 106 Pico.t.m68c_cnt -= PicoCpuCM68k.cycles;
6901d0e4 107#elif defined(EMU_M68K)
88fd63ad 108 Pico.t.m68c_cnt += m68k_execute(cyc_do) - cyc_do;
6901d0e4 109#elif defined(EMU_F68K)
88fd63ad 110 Pico.t.m68c_cnt += fm68k_emulate(cyc_do, 0) - cyc_do;
6901d0e4 111#endif
112 }
113
114 SekCyclesLeft = 0;
115
116 SekTrace(0);
117 pevt_log_m68k_o(EVT_RUN_END);
118}
119
120static void SekRunS68k(unsigned int to)
cc68a136 121{
122 int cyc_do;
ae214f1c 123
124 SekCycleAimS68k = to;
125 if ((cyc_do = SekCycleAimS68k - SekCycleCntS68k) <= 0)
126 return;
127
30e8aac4 128 if (SekShouldInterrupt())
129 Pico_mcd->m.s68k_poll_a = 0;
130
ae214f1c 131 SekCycleCntS68k += cyc_do;
132#if defined(EMU_C68K)
133 PicoCpuCS68k.cycles = cyc_do;
3aa1e148 134 CycloneRun(&PicoCpuCS68k);
ae214f1c 135 SekCycleCntS68k -= PicoCpuCS68k.cycles;
b837b69b 136#elif defined(EMU_M68K)
3aa1e148 137 m68k_set_context(&PicoCpuMS68k);
ae214f1c 138 SekCycleCntS68k += m68k_execute(cyc_do) - cyc_do;
ed4402a7 139 m68k_set_context(&PicoCpuMM68k);
3aa1e148 140#elif defined(EMU_F68K)
ae214f1c 141 g_m68kcontext = &PicoCpuFS68k;
99ade2ee 142 SekCycleCntS68k += fm68k_emulate(cyc_do, 0) - cyc_do;
ae214f1c 143 g_m68kcontext = &PicoCpuFM68k;
cc68a136 144#endif
145}
146
8e4e84c2 147static void pcd_set_cycle_mult(void)
148{
149 // ~1.63 for NTSC, ~1.645 for PAL
150 if (Pico.m.pal)
e42a47e2 151 mcd_m68k_cycle_mult = ((12500000ull << 16) / (50*313*488));
8e4e84c2 152 else
a6523294 153 mcd_m68k_cycle_mult = ((12500000ull << 16) / (60*262*488)) + 1;
8e4e84c2 154}
68cba51e 155
ae214f1c 156unsigned int pcd_cycles_m68k_to_s68k(unsigned int c)
8022f53d 157{
a6523294 158 return (long long)c * mcd_m68k_cycle_mult >> 16;
8022f53d 159}
ae214f1c 160
161/* events */
162static void pcd_cdc_event(unsigned int now)
68cba51e 163{
ae214f1c 164 // 75Hz CDC update
274fcc35 165 cdd_update();
166
167 /* check if a new CDD command has been processed */
168 if (!(Pico_mcd->s68k_regs[0x4b] & 0xf0))
169 {
170 /* reset CDD command wait flag */
171 Pico_mcd->s68k_regs[0x4b] = 0xf0;
172
173 if (Pico_mcd->s68k_regs[0x33] & PCDS_IEN4) {
174 elprintf(EL_INTS|EL_CD, "s68k: cdd irq 4");
175 SekInterruptS68k(4);
176 }
177 }
178
ae214f1c 179 pcd_event_schedule(now, PCD_EVENT_CDC, 12500000/75);
180}
7336a99a 181
ae214f1c 182static void pcd_int3_timer_event(unsigned int now)
183{
184 if (Pico_mcd->s68k_regs[0x33] & PCDS_IEN3) {
185 elprintf(EL_INTS|EL_CD, "s68k: timer irq 3");
186 SekInterruptS68k(3);
187 }
7336a99a 188
ae214f1c 189 if (Pico_mcd->s68k_regs[0x31] != 0)
190 pcd_event_schedule(now, PCD_EVENT_TIMER3,
191 Pico_mcd->s68k_regs[0x31] * 384);
192}
193
ae214f1c 194static void pcd_dma_event(unsigned int now)
195{
3f23709e 196 cdc_dma_update();
ae214f1c 197}
68cba51e 198
ae214f1c 199typedef void (event_cb)(unsigned int now);
200
201/* times are in s68k (12.5MHz) cycles */
202unsigned int pcd_event_times[PCD_EVENT_COUNT];
203static unsigned int event_time_next;
204static event_cb *pcd_event_cbs[PCD_EVENT_COUNT] = {
24aab4da 205 pcd_cdc_event, // PCD_EVENT_CDC
206 pcd_int3_timer_event, // PCD_EVENT_TIMER3
207 gfx_update, // PCD_EVENT_GFX
208 pcd_dma_event, // PCD_EVENT_DMA
ae214f1c 209};
210
211void pcd_event_schedule(unsigned int now, enum pcd_event event, int after)
bf098bc5 212{
ae214f1c 213 unsigned int when;
214
215 when = now + after;
216 if (when == 0) {
217 // event cancelled
218 pcd_event_times[event] = 0;
219 return;
220 }
bf098bc5 221
ae214f1c 222 when |= 1;
bf098bc5 223
ae214f1c 224 elprintf(EL_CD, "cd: new event #%u %u->%u", event, now, when);
225 pcd_event_times[event] = when;
bf098bc5 226
ae214f1c 227 if (event_time_next == 0 || CYCLES_GT(event_time_next, when))
228 event_time_next = when;
bf098bc5 229}
230
ae214f1c 231void pcd_event_schedule_s68k(enum pcd_event event, int after)
4f265db7 232{
ae214f1c 233 if (SekCyclesLeftS68k > after)
234 SekEndRunS68k(after);
4f265db7 235
ae214f1c 236 pcd_event_schedule(SekCyclesDoneS68k(), event, after);
237}
4f265db7 238
ae214f1c 239static void pcd_run_events(unsigned int until)
240{
241 int oldest, oldest_diff, time;
242 int i, diff;
243
244 while (1) {
245 oldest = -1, oldest_diff = 0x7fffffff;
246
247 for (i = 0; i < PCD_EVENT_COUNT; i++) {
248 if (pcd_event_times[i]) {
249 diff = pcd_event_times[i] - until;
250 if (diff < oldest_diff) {
251 oldest_diff = diff;
252 oldest = i;
253 }
254 }
255 }
256
257 if (oldest_diff <= 0) {
258 time = pcd_event_times[oldest];
259 pcd_event_times[oldest] = 0;
260 elprintf(EL_CD, "cd: run event #%d %u", oldest, time);
261 pcd_event_cbs[oldest](time);
262 }
263 else if (oldest_diff < 0x7fffffff) {
264 event_time_next = pcd_event_times[oldest];
265 break;
266 }
267 else {
268 event_time_next = 0;
269 break;
270 }
271 }
4f265db7 272
ae214f1c 273 if (oldest != -1)
274 elprintf(EL_CD, "cd: next event #%d at %u",
275 oldest, event_time_next);
4f265db7 276}
277
08769494 278int pcd_sync_s68k(unsigned int m68k_target, int m68k_poll_sync)
ae214f1c 279{
280 #define now SekCycleCntS68k
a6523294 281 unsigned int s68k_target;
ae214f1c 282 unsigned int target;
b837b69b 283
a6523294 284 target = m68k_target - mcd_m68k_cycle_base;
285 s68k_target = mcd_s68k_cycle_base +
286 ((unsigned long long)target * mcd_m68k_cycle_mult >> 16);
287
08769494 288 elprintf(EL_CD, "s68k sync to %u, %u->%u",
289 m68k_target, now, s68k_target);
ae214f1c 290
4fb43555 291 if (Pico_mcd->m.busreq != 1) { /* busreq/reset */
ae214f1c 292 SekCycleCntS68k = SekCycleAimS68k = s68k_target;
293 pcd_run_events(m68k_target);
08769494 294 return 0;
ae214f1c 295 }
296
297 while (CYCLES_GT(s68k_target, now)) {
298 if (event_time_next && CYCLES_GE(now, event_time_next))
299 pcd_run_events(now);
300
301 target = s68k_target;
302 if (event_time_next && CYCLES_GT(target, event_time_next))
303 target = event_time_next;
304
305 SekRunS68k(target);
08769494 306 if (m68k_poll_sync && Pico_mcd->m.m68k_poll_cnt == 0)
307 break;
ae214f1c 308 }
08769494 309
310 return s68k_target - now;
ae214f1c 311 #undef now
c987bb5c 312}
ae214f1c 313
ba6e8bfd 314#define pcd_run_cpus_normal pcd_run_cpus
315//#define pcd_run_cpus_lockstep pcd_run_cpus
316
08769494 317static void SekSyncM68k(void);
318
fa8fb754 319void pcd_run_cpus_normal(int m68k_cycles)
08769494 320{
88fd63ad 321 Pico.t.m68c_aim += m68k_cycles;
30e8aac4 322 if (SekShouldInterrupt() || Pico_mcd->m.m68k_poll_cnt < 12)
cc5ffc3c 323 Pico_mcd->m.m68k_poll_cnt = 0;
324 else if (Pico_mcd->m.m68k_poll_cnt >= 16) {
88fd63ad 325 int s68k_left = pcd_sync_s68k(Pico.t.m68c_aim, 1);
08769494 326 if (s68k_left <= 0) {
ba6e8bfd 327 elprintf(EL_CDPOLL, "m68k poll [%02x] x%d @%06x",
08769494 328 Pico_mcd->m.m68k_poll_a, Pico_mcd->m.m68k_poll_cnt, SekPc);
88fd63ad 329 Pico.t.m68c_cnt = Pico.t.m68c_aim;
08769494 330 return;
331 }
88fd63ad 332 Pico.t.m68c_cnt = Pico.t.m68c_aim - (s68k_left * 40220 >> 16);
08769494 333 }
334
88fd63ad 335 while (CYCLES_GT(Pico.t.m68c_aim, Pico.t.m68c_cnt)) {
6901d0e4 336 SekRunM68kOnce();
337 if (Pico_mcd->m.need_sync) {
338 Pico_mcd->m.need_sync = 0;
88fd63ad 339 pcd_sync_s68k(Pico.t.m68c_cnt, 0);
6901d0e4 340 }
341 }
08769494 342}
343
fa8fb754 344void pcd_run_cpus_lockstep(int m68k_cycles)
ba6e8bfd 345{
88fd63ad 346 unsigned int target = Pico.t.m68c_aim + m68k_cycles;
ba6e8bfd 347 do {
88fd63ad 348 Pico.t.m68c_aim += 8;
ba6e8bfd 349 SekSyncM68k();
88fd63ad 350 pcd_sync_s68k(Pico.t.m68c_aim, 0);
351 } while (CYCLES_GT(target, Pico.t.m68c_aim));
cc5ffc3c 352
88fd63ad 353 Pico.t.m68c_aim = target;
ba6e8bfd 354}
355
ae214f1c 356#define PICO_CD
357#define CPUS_RUN(m68k_cycles) \
08769494 358 pcd_run_cpus(m68k_cycles)
ae214f1c 359
efcba75f 360#include "../pico_cmn.c"
cc68a136 361
362
a6523294 363void pcd_prepare_frame(void)
364{
365 pcd_set_cycle_mult();
366
367 // need this because we can't have direct mapping between
368 // master<->slave cycle counters because of overflows
88fd63ad 369 mcd_m68k_cycle_base = Pico.t.m68c_aim;
a6523294 370 mcd_s68k_cycle_base = SekCycleAimS68k;
371}
372
2aa27095 373PICO_INTERNAL void PicoFrameMCD(void)
cc68a136 374{
a6523294 375 PicoFrameStart();
cc68a136 376
a6523294 377 pcd_prepare_frame();
bf5fbbb4 378 PicoFrameHints();
cc68a136 379}
380
ae214f1c 381void pcd_state_loaded(void)
382{
383 unsigned int cycles;
384 int diff;
385
8e4e84c2 386 pcd_set_cycle_mult();
ae214f1c 387 pcd_state_loaded_mem();
388
33be04ca 389 memset(Pico_mcd->pcm_mixbuf, 0, sizeof(Pico_mcd->pcm_mixbuf));
390 Pico_mcd->pcm_mixbuf_dirty = 0;
391 Pico_mcd->pcm_mixpos = 0;
021e47b3 392 Pico_mcd->pcm_regs_dirty = 1;
33be04ca 393
ae214f1c 394 // old savestates..
88fd63ad 395 cycles = pcd_cycles_m68k_to_s68k(Pico.t.m68c_aim);
ae214f1c 396 diff = cycles - SekCycleAimS68k;
397 if (diff < -1000 || diff > 1000) {
398 SekCycleCntS68k = SekCycleAimS68k = cycles;
399 }
400 if (pcd_event_times[PCD_EVENT_CDC] == 0) {
401 pcd_event_schedule(SekCycleAimS68k, PCD_EVENT_CDC, 12500000/75);
402
403 if (Pico_mcd->s68k_regs[0x31])
404 pcd_event_schedule(SekCycleAimS68k, PCD_EVENT_TIMER3,
405 Pico_mcd->s68k_regs[0x31] * 384);
ae214f1c 406 }
334d9fb6 407
408 diff = cycles - Pico_mcd->pcm.update_cycles;
409 if ((unsigned int)diff > 12500000/50)
33be04ca 410 Pico_mcd->pcm.update_cycles = cycles;
8e4e84c2 411
412 // reschedule
413 event_time_next = 0;
414 pcd_run_events(SekCycleCntS68k);
ae214f1c 415}
cc68a136 416
ae214f1c 417// vim:shiftwidth=2:ts=2:expandtab